会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 2. 发明授权
    • SOI substrate and semiconductor integrated circuit device
    • SOI衬底和半导体集成电路器件
    • US07256456B2
    • 2007-08-14
    • US10739166
    • 2003-12-19
    • Hiroaki OhkuboMasayuki FurumiyaRyota YamamotoYasutaka Nakashiba
    • Hiroaki OhkuboMasayuki FurumiyaRyota YamamotoYasutaka Nakashiba
    • H01L27/12H01L27/01H01L31/0392
    • H01L21/743H01L21/84H01L27/1203
    • A semiconductor IC device includes a base substrate comprising P−-type silicon, a first P+-type silicon layer is provided on the base substrate, and an N+-type silicon layer and a second P+-type silicon layer are provided in the same layer thereon. The impurity concentration of the first P+-type silicon layer and the N+-type silicon layer is higher than that of the base substrate. Also, a buried oxide layer and an SOI layer are provided on the entire upper surface of the N+-type silicon layer and the second P+-type silicon layer. The first P+-type silicon layer is connected to ground potential wiring GND, and the N+-type silicon layer is connected to power-supply potential wiring VDD. Accordingly, a decoupling capacitor, which is connected in parallel to the power supply, is formed between the P+-type silicon layer and the N+-type silicon layer.
    • 半导体IC器件包括基底衬底,其包括P型 - 硅,第一P + +型硅层设置在基底衬底上,并且N + +型硅层和第二P + +型硅层设置在其上的同一层中。 第一P + + / - 型硅层和N + + - 型硅层的杂质浓度高于基底衬底的杂质浓度。 此外,在N + +型硅层和第二P + +型硅层的整个上表面上设置掩埋氧化物层和SOI层。 第一P + + / - 型硅层连接到地电位布线GND,并且N + +型硅层连接到电源电位布线VDD。 因此,在P + +型硅层和N + +型硅层之间形成与电源并联连接的去耦电容器。