会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 5. 发明授权
    • Diagnosing mixed scan chain and system logic defects
    • 诊断混合扫描链和系统逻辑缺陷
    • US07788561B2
    • 2010-08-31
    • US11838858
    • 2007-08-14
    • Yu HuangWu-Tung ChengRuifeng Guo
    • Yu HuangWu-Tung ChengRuifeng Guo
    • G01R31/28
    • G01R31/318569
    • Technologies disclosed herein can be used to diagnose defects on die having both scan chain and system logic defects, including in situations where the presence of one or more faults in the system logic potentially obscures the detectability of one or more faults in the scan chains (or channels) and vice versa. At least some embodiments employ an iterative approach where at least some scan chain faults are identified, these chain faults are used to identify system logic faults, and then additional chain faults are identified using the system logic faults and vice versa. Failing bits can be partitioned into at least two groups: failing bits determined as being caused by system logic failures, and failing bits determined as being possibly caused by chain defects, system logic defects, or the compound effects of both types of defects.
    • 本文公开的技术可用于诊断具有扫描链和系统逻辑缺陷的裸片上的缺陷,包括在系统逻辑中存在一个或多个故障潜在地掩盖扫描链中的一个或多个故障的可检测性的情况下(或 频道),反之亦然。 至少一些实施例采用迭代方法,其中识别出至少一些扫描链故障,这些链故障用于识别系统逻辑故障,然后使用系统逻辑故障来识别附加链故障,反之亦然。 失败的位可被划分为至少两组:确定为由系统逻辑故障引起的故障位,以及确定为可能由链缺陷,系统逻辑缺陷或两种类型的缺陷的复合效应引起的故障位。