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1. 发明授权

US08632691B2 Interface treatment method for germanium-based device 有权
标题翻译：锗基装置的界面处理方法
公开(公告)号：US08632691B2
公开(公告)日：2014-01-21
申请号：US13702562
申请日：2012-06-14
申请人： Ru Huang , Min Li , Xia An , Ming Li , Meng Lin , Xing Zhang
发明人： Ru Huang , Min Li , Xia An , Ming Li , Meng Lin , Xing Zhang
IPC分类号： B44C1/22 , C03C15/00 , C03C25/68 , C23F1/00 , C25F3/00
CPC分类号： H01L21/02052 , H01L21/306
摘要： Disclosed herein is an interface treatment method for germanium-based device, which belongs to the field of manufacturing technologies of ultra large scaled integrated (ULSI) circuits. In the method, the natural oxide layer on the surface of the germanium-based substrate is removed by using a concentrated hydrochloric acid solution having a mass percentage concentration of 15%˜36%, and dangling bonds of the surface are performed a passivation treatment by using a diluted hydrochloric acid solution having a mass percentage concentration of 5%˜10% so as to form a stable passivation layer on the surface. This method makes a good foundation for depositing a high-K (high dielectric constant) gate dielectric on the surface of the germanium-based substrate after cleaning and passivating, enhances quality of the interface between the gate dielectric and the substrate, and improves the electrical performance of germanium-based MOS device.
摘要翻译：本文公开了一种锗系器件的接口处理方法，属于超大规模集成（ULSI）电路制造技术领域。在该方法中，通过使用质量百分比浓度为15％〜36％的浓盐酸溶液除去锗系基板表面上的天然氧化物层，并且通过使表面的悬空键进行钝化处理使用质量百分比浓度为5％〜10％的稀盐酸溶液，以在表面上形成稳定的钝化层。该方法为清洗和钝化后在锗基基板表面上沉积高K（高介电常数）栅极电介质提供了良好的基础，提高了栅极电介质和基板之间界面的质量，改善了电气锗系MOS器件的性能。

2. 发明申请

US20130309875A1 INTERFACE TREATMENT METHOD FOR GERMANIUM-BASED DEVICE 有权
标题翻译：用于基于锗的器件的接口处理方法
公开(公告)号：US20130309875A1
公开(公告)日：2013-11-21
申请号：US13702562
申请日：2012-06-14
申请人： Ru Huang , Min Li , Xia An , Ming Li , Meng Lin , Xing Zhang
发明人： Ru Huang , Min Li , Xia An , Ming Li , Meng Lin , Xing Zhang
IPC分类号： H01L21/02
CPC分类号： H01L21/02052 , H01L21/306
摘要： Disclosed herein is an interface treatment method for germanium-based device, which belongs to the field of manufacturing technologies of ultra large scaled integrated (ULSI) circuits. In the method, the natural oxide layer on ther surface of the germanium-based substrate is removed by using a concentrated hydrochloric acid solution having a mass percentage concentration of 15%˜36%, and dangling bonds of the surface are performed a passivation treatment by using a diluted hydrochloric acid solution having a mass percentage concentration of 5%˜10% so as to form a stable passivation layer on the surface. This method makes a good foundation for depositing a high-K (high dielectric constant) gate dielectric on the surface of the germanium-based substrate after cleaning and passivating, enhances quality of the interface between the gate dielectric and the substrate, and improves the electrical performance of germanium-based MOS device.
摘要翻译：本文公开了一种锗系器件的接口处理方法，属于超大规模集成（ULSI）电路制造技术领域。在该方法中，通过使用质量百分比浓度为15％〜36％的浓盐酸溶液除去锗基底板的表面上的天然氧化物层，并且通过以下方式进行钝化处理：使用质量百分比浓度为5％〜10％的稀盐酸溶液，以在表面上形成稳定的钝化层。该方法为清洗和钝化后在锗基基板表面上沉积高K（高介电常数）栅极电介质提供了良好的基础，提高了栅极电介质和基板之间界面的质量，改善了电气锗系MOS器件的性能。

3. 发明授权

US09147597B2 Method for isolating active regions in germanium-based MOS device 有权
标题翻译：在锗系MOS器件中分离有源区的方法
公开(公告)号：US09147597B2
公开(公告)日：2015-09-29
申请号：US14344050
申请日：2012-06-14
申请人： Ming Li , Min Li , Ru Huang , Xia An , Xing Zhang
发明人： Ming Li , Min Li , Ru Huang , Xia An , Xing Zhang
IPC分类号： H01L21/76 , H01L21/762 , H01L21/763
CPC分类号： H01L21/76232 , H01L21/02052 , H01L21/02236 , H01L21/02255 , H01L21/28255 , H01L21/32 , H01L21/7621 , H01L21/763
摘要： Disclosed herein is a method for isolating active regions in a germanium-based MOS device. A surface of a germanium-based substrate is covered by a thin polysilicon layer or a poly-SiGe layer, and an isolation structure of germanium dioxide covered by a silicon dioxide layer or a SiGe oxide layer on top is formed by means of two steps of oxidation in a case of the active regions are protected. Such two steps of oxidation using the polysilicon layer or the poly-SiGe layer as a sacrificial layer is advantageous to improve the isolation quality of a fabricated germanium dioxide and to reduce a beak effect occurred during a local field oxygen oxidation so as to dramatically elevate the performance of the germanium device.
摘要翻译：本文公开了一种用于隔离锗基MOS器件中的有源区的方法。基于锗的衬底的表面被薄的多晶硅层或多晶硅层覆盖，并且通过两个步骤形成由二氧化硅层或顶部的SiGe氧化物层覆盖的二氧化锗的隔离结构在活性区域的情况下的氧化被保护。使用多晶硅层或多晶硅层作为牺牲层的这两个氧化步骤有利于提高制造的二氧化锗的隔离质量，并且减少在局部场氧氧化期间发生的喙效应，从而显着提升锗器件的性能。

4. 发明申请

US20150031188A1 METHOD FOR ISOLATING ACTIVE REGIONS IN GERMANIUM-BASED MOS DEVICE 有权
标题翻译：用于在基于锗的MOS器件中隔离有源区的方法
公开(公告)号：US20150031188A1
公开(公告)日：2015-01-29
申请号：US14344050
申请日：2012-06-14
申请人： Ming Li , Min Li , Ru Huang , Xia An , Xing Zhang
发明人： Ming Li , Min Li , Ru Huang , Xia An , Xing Zhang
IPC分类号： H01L21/762
CPC分类号： H01L21/76232 , H01L21/02052 , H01L21/02236 , H01L21/02255 , H01L21/28255 , H01L21/32 , H01L21/7621 , H01L21/763
摘要： Disclosed herein is a method for isolating active regions in a germanium-based MOS device. A surface of a germanium-based substrate is covered by a thin polysilicon layer or a poly-SiGe layer, and an isolation structure of germanium dioxide covered by a silicon dioxide layer or a SiGe oxide layer on top is formed by means of two steps of oxidation in a case of the active regions are protected. Such two steps of oxidation using the polysilicon layer or the poly-SiGe layer as a sacrificial layer is advantageous to improve the isolation quality of a fabricated germanium dioxide and to reduce a beak effect occurred during a local field oxygen oxidation so as to dramatically elevate the performance of the germanium device.
摘要翻译：本文公开了一种用于隔离锗基MOS器件中的有源区的方法。基于锗的衬底的表面被薄的多晶硅层或多晶硅层覆盖，并且通过两个步骤形成由二氧化硅层或顶部的SiGe氧化物层覆盖的二氧化锗的隔离结构在活性区域的情况下的氧化被保护。使用多晶硅层或多晶硅层作为牺牲层的这两个氧化步骤有利于提高制造的二氧化锗的隔离质量，并且减少在局部场氧氧化期间发生的喙效应，从而显着提升锗器件的性能。

5. 发明申请

US20150024561A1 METHOD FOR FABRICATING A FINFET IN A LARGE SCALE INTEGRATED CIRCUIT 有权
标题翻译：在大规模集成电路中制造FINFET的方法
公开(公告)号：US20150024561A1
公开(公告)日：2015-01-22
申请号：US13877763
申请日：2012-05-02
申请人： Ming Li , Ru Huang
发明人： Ming Li , Ru Huang
IPC分类号： H01L21/8234 , H01L29/66
CPC分类号： H01L21/823456 , H01L21/26506 , H01L21/2652 , H01L21/26586 , H01L21/28123 , H01L21/823431 , H01L21/823481 , H01L29/165 , H01L29/41783 , H01L29/66545 , H01L29/66628 , H01L29/66795 , H01L29/6681 , H01L29/66818 , H01L29/785
摘要： Systems and methods of fabricating a FinFET in large scale integrated circuit are disclosed. One illustrative method relates to a dummy gate process, wherein the fin structure is only formed in the gate electrode region by performing a photolithography process and an etching of a first dummy gate on a flat STI surface using chemical mechanical polishing, forming drain and source regions, depositing a medium dielectric layer, polishing the medium dielectric layer till the top of the first dummy gate is exposed through the chemical mechanical polishing process again, removing the dummy gate material via a dry etching and a wet etching, and continuously etching the STI dielectric layer with the hard mask formed by the medium dielectric layer, thereafter performing the deposition of real gate dielectric and gate electrode material to complete the device structure.
摘要翻译：公开了在大规模集成电路中制造FinFET的系统和方法。一种说明性的方法涉及虚拟栅极工艺，其中仅通过使用化学机械抛光在平坦STI表面上执行光刻工艺和蚀刻第一伪栅极而在栅电极区域中形成鳍结构，形成漏极和源极区，沉积介质介质层，再次通过化学机械抛光工艺对介质介质层进行抛光，直到第一虚拟栅极的顶部暴露出来，通过干蚀刻和湿蚀刻去除虚拟栅极材料，并连续蚀刻STI电介质层，其中由介质介质层形成的硬掩模，然后执行真栅极电介质和栅电极材料的沉积以完成器件结构。

6. 发明授权

US09136178B2 Method for fabricating a finFET in a large scale integrated circuit 有权
标题翻译：在大规模集成电路中制造finFET的方法
公开(公告)号：US09136178B2
公开(公告)日：2015-09-15
申请号：US13877763
申请日：2012-05-02
申请人： Ming Li , Ru Huang
发明人： Ming Li , Ru Huang
IPC分类号： H01L21/8238 , H01L21/8234 , H01L21/28 , H01L29/417 , H01L29/66 , H01L29/165 , H01L29/78 , H01L21/265
CPC分类号： H01L21/823456 , H01L21/26506 , H01L21/2652 , H01L21/26586 , H01L21/28123 , H01L21/823431 , H01L21/823481 , H01L29/165 , H01L29/41783 , H01L29/66545 , H01L29/66628 , H01L29/66795 , H01L29/6681 , H01L29/66818 , H01L29/785
摘要： Systems and methods of fabricating a FinFET in large scale integrated circuit are disclosed. One illustrative method relates to a dummy gate process, wherein the fin structure is only formed in the gate electrode region by performing a photolithography process and an etching of a first dummy gate on a flat STI surface using chemical mechanical polishing, forming drain and source regions, depositing a medium dielectric layer, polishing the medium dielectric layer till the top of the first dummy gate is exposed through the chemical mechanical polishing process again, removing the dummy gate material via a dry etching and a wet etching, and continuously etching the STI dielectric layer with the hard mask formed by the medium dielectric layer, thereafter performing the deposition of real gate dielectric and gate electrode material to complete the device structure.
摘要翻译：公开了在大规模集成电路中制造FinFET的系统和方法。一种说明性的方法涉及虚拟栅极工艺，其中仅通过使用化学机械抛光在平坦STI表面上执行光刻工艺和蚀刻第一伪栅极而在栅电极区域中形成鳍结构，形成漏极和源极区，沉积介质介质层，再次通过化学机械抛光工艺对介质介质层进行抛光，直到第一虚拟栅极的顶部暴露出来，通过干蚀刻和湿蚀刻去除虚拟栅极材料，并连续蚀刻STI电介质层，其中由介质介质层形成的硬掩模，然后执行真栅极电介质和栅电极材料的沉积以完成器件结构。

7. 发明公开

US20240142071A1 COMBINATION LIGHT STRING 审中-公开
公开(公告)号：US20240142071A1
公开(公告)日：2024-05-02
申请号：US17983542
申请日：2022-11-09
申请人： Ming Li
发明人： Ming Li
IPC分类号： F21S4/10 , F21V33/00 , H05B47/155
CPC分类号： F21S4/10 , F21V33/0056 , H05B47/155 , F21Y2115/10
摘要： The invention discloses a combination light string, comprising: line lamps, wherein a plurality of the line lamps are respectively connected in parallel on an electric wire; bulb lamps, wherein a plurality of the bulb lamps are respectively connected in parallel on the electric wire, and the bulb lamps are connected in series with the line lamps; control units, which are respectively connected to each of the line lamps and each of the bulb lamps; at least one bulb lamp is provided between any adjacent two line lamps; the control unit can individually control the working states of all the line lamps, and the control unit can individually control the working states of the bulb lamps, so as to realize the control of each of the line lamps and each of the bulb lamps.

8. 外观设计

USD982559S1 Remote controller 有权
公开(公告)号：USD982559S1
公开(公告)日：2023-04-04
申请号：US29767611
申请日：2021-01-25
申请人： Ming Li
设计人： Ming Li

9. 外观设计

USD968843S1 Soap dispenser 有权
公开(公告)号：USD968843S1
公开(公告)日：2022-11-08
申请号：US29844818
申请日：2022-07-01
申请人： Pan Liao , Ming Li
设计人： Ming Li , Xiaoyan Jiang

10. 外观设计

USD903191S1 Electronic cigarette 有权
公开(公告)号：USD903191S1
公开(公告)日：2020-11-24
申请号：US29695097
申请日：2019-06-14
申请人： Ming Li
设计人： Ming Li
摘要： FIG. 1 is a perspective view of the electronic cigarette showing my new design;
FIG. 2 is a front elevational view thereof;
FIG. 3 is a rear elevational view thereof;
FIG. 4 is a left side elevational view thereof;
FIG. 5 is a right side elevational view thereof;
FIG. 6 is a top plan view thereof; and,
FIG. 7 is a bottom plan view thereof.

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