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    • 1. 发明授权
    • Bipolar transistor with floating guard region under extrinsic base
    • 双极晶体管,外部基极具有浮动保护区域
    • US5221856A
    • 1993-06-22
    • US833599
    • 1992-02-10
    • Ronald DekkerMartinus C. A. M. KoolenHenricus G. R. Maas
    • Ronald DekkerMartinus C. A. M. KoolenHenricus G. R. Maas
    • H01L21/225H01L21/285H01L21/32H01L21/3213H01L21/3215H01L21/331H01L21/60H01L29/732
    • H01L21/76897H01L21/2257H01L21/28506H01L21/28525H01L21/32H01L21/32134H01L21/32155H01L29/66242H01L29/66272H01L29/7325
    • A first device region (10) of one conductivity type adjacent one major surface (1a) of a semiconductor body (1) has a relatively highly doped subsidiary region (11) spaced from the one major surface (1a) by a relatively lowly doped subsidiary region (12). A second device region (20) of the opposite conductivity type within the subsidiary region (12) has an intrinsic subsidiary region (21) and an extrinsic subsidiary region (23,24) surrounding the intrinsic subsidiary region (21) forming respective first and second pn junctions (22,25) with the relatively lowly doped subsidiary region (12). A third device region (30) of the one conductivity type is formed within the intrinsic subsidiary region (21) surface (1a). An additional region (60,60',61,62) is provided beneath the extrinsic subsidiary region (23,24) so as to lie within the spread of the depletion region (250) associated with the second pn junction (25) when the first and second pn junction (22,25) are reverse-biassed thereby extending the depletion region (250) beneath the emitter region (30) to cause an increase in the Early voltage (V.sub.eaf) of the device.
    • 与半导体本体(1)的一个主表面(1a)相邻的一种导电类型的第一器件区域(10)具有相对高度掺杂的辅助区域(11),该区域通过相对低掺杂的子元件与一个主表面(1a)间隔开 区域(12)。 在辅助区域(12)内具有相反导电类型的第二设备区域(20)具有内部辅助区域(21)和围绕内部辅助区域(21)的外在辅助区域(23,24),形成相应的第一和第二 pn结(22,25)与相对低掺杂的辅助区域(12)。 一个导电类型的第三器件区域(30)形成在本征辅助区域(21)表面(1a)内。 在外部辅助区域(23,24)的下方提供附加区域(60,60',61,62),以便当位于与第二pn结(25)相关联的耗尽区域(250)的扩展区内时 第一和第二pn结(22,25)被反向偏压,从而将耗尽区(250)延伸到发射极区(30)之下,以引起器件的早期电压(Veaf)的增加。
    • 4. 发明授权
    • Method of manufacturing a semiconductor device whereby a laterally
bounded semiconductor zone is formed in a semiconductor body in a
self-aligning manner
    • 制造半导体器件的方法,由此横向界限的半导体区以自对准方式形成在半导体本体中
    • US5405789A
    • 1995-04-11
    • US141888
    • 1993-10-22
    • Ronald DekkerHenricus G. R. MaasArmand PruijmboomWilhelmus T. A. J. Van Den Einden
    • Ronald DekkerHenricus G. R. MaasArmand PruijmboomWilhelmus T. A. J. Van Den Einden
    • H01L21/28H01L21/331H01L21/335H01L21/336H01L21/8249H01L29/78H01L21/265
    • H01L29/66303H01L21/28H01L21/8249H01L29/66416
    • A method of manufacturing a semiconductor device with a semiconductor element which includes a semiconductor zone (19) situated below an electrode (18) and adjoining a surface (5) of a semiconductor body (1), which semiconductor zone substantially does not project outside the electrode (18) in lateral direction. The electrode (18) is here formed on the surface (5) of the semiconductor body (1), after which semiconductor material adjoining the surface (5) and not covered by the electrode (18) is removed by an etching treatment, whereby the position of the semiconductor zone (19) below the electrode (18) is defined. Before the electrode (18) is formed, a surface zone (16) adjoining the surface (5) is formed in the semiconductor body (1) with a depth and a doping such as are desired for the semiconductor zone (19) to be formed below the electrode (18), after which the electrode (18) is formed on this surface zone and, during the etching treatment, the portion of the surface zone (16) not covered by the electrode (18) is etched away through its entire thickness. Conducting materials such as aluminium or aluminium alloys may be used for the electrode (18), i.e. materials which are not resistant to temperatures necessary for forming semiconductor zones through diffusion.
    • 一种制造具有半导体元件的半导体器件的方法,该半导体元件包括位于电极(18)下方并邻接半导体本体(1)的表面(5)的半导体区(19),该半导体区基本上不会突出在半导体本体 电极(18)。 此时,电极(18)形成在半导体本体(1)的表面(5)上,然后通过蚀刻处理去除邻接表面(5)并且未被电极(18)覆盖的半导体材料,由此, 限定电极(18)下方的半导体区域(19)的位置。 在形成电极(18)之前,在半导体本体(1)中形成与表面(5)相邻的表面区域(16),以形成半导体区域(19)所需的深度和掺杂 在电极(18)的下方,之后在该表面区域上形成电极(18),并且在蚀刻处理期间,未被电极(18)覆盖的表面区域(16)的部分通过其整个 厚度。 可以使用诸如铝或铝合金的导电材料用于电极(18),即不耐受通过扩散形成半导体区域所需的温度的材料。
    • 7. 发明授权
    • Semiconductor device with a bipolar transistor formed in a layer of
semiconductor material provided on an insulating substrate
    • 半导体器件具有形成在绝缘衬底上的半导体材料层中的双极晶体管
    • US5629554A
    • 1997-05-13
    • US637012
    • 1996-04-24
    • Henricus G. R. MaasRonald DekkerArmand Pruijmboom
    • Henricus G. R. MaasRonald DekkerArmand Pruijmboom
    • H01L29/73H01L21/331H01L29/735H01L27/082H01L27/102H01L29/70H01L31/11
    • H01L29/66265H01L29/7317
    • A semiconductor device with a bipolar transistor formed in a layer of semiconductor material (2) provided on an insulating substrate (1), in which material a collector zone (4), a base zone (5), and an emitter zone (6) are provided below a strip of insulating material (3) situated on the layer (2), which zones are connected to contact regions (7, 8, 9, 10) lying adjacent the strip (3), three of the contact regions (8, 9, 10) lying next to one another at a same side of the strip (3), of which two (8 and 9) are connected to the base zone (5) while the third (10), which lies between the former two (8 and 9), is connected to the emitter zone (6). The three contact regions (8, 9, 10) situated next to another at the same side of the strip (3) are provided alternately in the layer of semiconductor material (2) and in a further layer of semiconductor material (19) extending up to the strip (3). The three contact regions (8, 9, 10) connected to the base zone (5) and the emitter zone (6) may be provided with mutual interspacings which are smaller than the details which can be realised in a photoresist layer by means of the photolithographic process to be used in the manufacture of the transistor. As a result, the transistor can be manufactured with a very small extrinsic base.
    • 一种具有双极晶体管的半导体器件,其形成在设置在绝缘基板(1)上的半导体材料层(2)中,其中,集电区(4),基极区(5)和发射极区(6) 设置在位于层(2)上的绝缘材料条(3)的下方,这些区域连接到位于条带(3)附近的接触区域(7,8,9,10),三个接触区域(8) ,9,10)彼此相邻放置在条带(3)的同一侧,其中两个(8和9)连接到基部区域(5),而第三个(10)位于前者 两个(8和9)连接到发射区(6)。 位于带(3)的同一侧的另一侧的三个接触区域(8,9,10)交替地设置在半导体材料层(2)中,并在另一层半导体材料(19)中向上延伸 (3)。 连接到基部区域(5)和发射极区域(6)的三个接触区域(8,9,10)可以具有相对的间隔,该相互间隔小于可以通过光刻胶层 光刻工艺用于制造晶体管。 结果,晶体管可以用非常小的外在基极制造。
    • 9. 发明授权
    • Magnetic head with integrated circuit on a rigid body
    • 磁头与集成电路在刚体上
    • US06580583B1
    • 2003-06-17
    • US08966229
    • 1997-11-07
    • Derk J. AdelerhofRonald DekkerHenricus G. R. Maas
    • Derk J. AdelerhofRonald DekkerHenricus G. R. Maas
    • G11B5147
    • G11B5/127G11B5/31
    • A thin-film magnetic head has a semiconductor substrate in which there is an integrated circuit, and on which a magnetic layer structure is arranged. During manufacturing the integrated circuit is formed on one side of the semiconductor substrate, and that side of the semiconductor substrate is then secured to a carrier body by a securing layer. The substrate may then be ground or etched to a thickness less than 35&mgr;m before forming the magnetic layer structure on the opposite side. Securing to the carrier body prevents deformation of the layer structure during manufacturing, so that the resulting head has reproducible properties. Preferably a support body is secured over the layer structure. The head face is then formed such that the layer structure and the support and carrier bodies terminate in it.
    • 薄膜磁头具有半导体衬底,其中存在集成电路,并且在其上布置有磁性层结构。 在制造期间,集成电路形成在半导体衬底的一侧上,然后通过固定层将半导体衬底的该侧固定到载体上。 然后可以在形成相对侧的磁性层结构之前将衬底研磨或蚀刻至小于35μm的厚度。 固定到承载体防止制造过程中的层结构的变形,从而得到的头具有可重现的性质。 优选地,支撑体固定在层结构上。 然后形成头部表面,使得层结构和支撑体和载体主体终止于其中。