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1. 发明申请

US20160111138A1 SEMICONDUCTOR MEMORY DEVICE 审中-公开
标题翻译：半导体存储器件
公开(公告)号：US20160111138A1
公开(公告)日：2016-04-21
申请号：US14725102
申请日：2015-05-29
申请人： Rohm Co., Ltd.
发明人： Shintaro IZUMI , Tomoki NAKAGAWA , Hiroshi KAWAGUCHI , Masahiko YOSHIMOTO
IPC分类号： G11C11/22 , G11C29/08
CPC分类号： G11C14/0072 , G11C11/221 , G11C11/2259 , G11C29/08 , G11C29/50
摘要： Proposed as a configuration, a controlling method, and a testing method for a ferroelectric shadow memory are (1) a bit line non-precharge method, in which no precharging of a bit line is performed during a read/write operation; (2) a plate line charge share method, in which electric charge is shared between plate lines that are driven sequentially during store/recall operation; (3) a word line boost method, in which the potential on a word line is raised during a write operation; (4) a plate line driver boost method, in which the driving capacity of a plate line driver is raised during a store/recall operation; and (5) a testing method for detecting a defect in a ferroelectric capacitor by arbitrarily setting a potential on a bit line from outside a chip.
摘要翻译：作为配置，铁电阴影存储器的控制方法和测试方法，提出以下步骤：（1）在读/写操作期间不执行位线预充电的位线非预充电方法; （2）平板线电荷共享方法，其中在存储/调用操作期间顺序驱动的板线之间共享电荷; （3）在写入操作期间字线上的电位升高的字线升压方法; （4）一种板线驱动器升压方法，其中在行存储/调用操作期间升高板式驱动器的驱动能力; 以及（5）通过从芯片外部任意设定位线上的电位来检测铁电电容器的缺陷的测试方法。

2. 发明申请

US20170278558A1 SEMICONDUCTOR MEMORY DEVICE 有权
公开(公告)号：US20170278558A1
公开(公告)日：2017-09-28
申请号：US15615998
申请日：2017-06-07
申请人： Rohm Co., Ltd.
发明人： Shintaro IZUMI , Tomoki NAKAGAWA , Hiroshi KAWAGUCHI , Masahiko Yoshimoto
IPC分类号： G11C11/22 , G11C29/50 , G11C29/08
CPC分类号： G11C14/0072 , G11C11/221 , G11C11/2259 , G11C29/08 , G11C29/50
摘要： Proposed as a configuration, a controlling method, and a testing method for a ferroelectric shadow memory are (1) a bit line non-precharge method, in which no precharging of a bit line is performed during a read/write operation; (2) a plate line charge share method, in which electric charge is shared between plate lines that are driven sequentially during store/recall operation; (3) a word line boost method, in which the potential on a word line is raised during a write operation; (4) a plate line driver boost method, in which the driving capacity of a plate line driver is raised during a store/recall operation; and (5) a testing method for detecting a defect in a ferroelectric capacitor by arbitrarily setting a potential on a bit line from outside a chip.

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