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    • 5. 发明授权
    • Method and apparatus for managing a return stack
    • 用于管理返回堆栈的方法和装置
    • US07203826B2
    • 2007-04-10
    • US11061975
    • 2005-02-18
    • Rodney Wayne SmithJames Norris DieffenderferJeffrey Todd BridgesThomas Andrew Sartorius
    • Rodney Wayne SmithJames Norris DieffenderferJeffrey Todd BridgesThomas Andrew Sartorius
    • G06F9/38
    • G06F9/3806G06F9/30054G06F9/4486
    • A processor includes a return stack circuit used for predicting procedure return addresses for instruction pre-fetching, wherein a return stack controller determines the number of return levels associated with a given return instruction, and pops that number of return addresses from the return stack. Popping multiple return addresses from the return stack permits the processor to pre-fetch the return address of the original calling procedure in a chain of successive procedure calls. In one embodiment, the return stack controller reads the number of return levels from a value embedded in the return instruction. A complementary compiler calculates the return level values for given return instructions and embeds those values in them at compile-time. In another embodiment, the return stack circuit dynamically tracks the number of return levels by counting the procedure calls (branches) in a chain of successive procedure calls.
    • 处理器包括用于预测用于指令预取的过程返回地址的返回堆栈电路,其中返回堆栈控制器确定与给定返回指令相关联的返回电平的数量,并且从返回堆栈中弹出该返回地址的数量。 从返回堆栈弹出多个返回地址允许处理器在连续的过程调用链中预取原始调用过程的返回地址。 在一个实施例中,返回堆栈控制器从嵌入在返回指令中的值读取返回电平的数量。 补充编译器计算给定返回指令的返回值,并在编译时嵌入这些值。 在另一个实施例中,返回堆栈电路通过对连续过程调用链中的过程调用(分支)进行计数来动态地跟踪返回电平的数量。
    • 9. 发明授权
    • Methods and apparatus to insure correct predecode
    • 确保正确预解码的方法和装置
    • US07376815B2
    • 2008-05-20
    • US11066957
    • 2005-02-25
    • Rodney Wayne SmithJames Norris DieffenderferJeffrey Todd BridgesThomas Andrew Sartorius
    • Rodney Wayne SmithJames Norris DieffenderferJeffrey Todd BridgesThomas Andrew Sartorius
    • G06F9/30
    • G06F9/30149G06F8/447G06F9/382
    • Techniques for ensuring a synchronized predecoding of an instruction string are disclosed. The instruction string contains instructions from a variable length instruction set and embedded data. One technique includes defining a granule to be equal to the smallest length instruction in the instruction set and defining the number of granules that compose the longest length instruction in the instruction set to be MAX. The technique further includes determining the end of an embedded data segment, when a program is compiled or assembled into the instruction string and inserting a padding of length, MAX−1, into the instruction string to the end of the embedded data. Upon predecoding of the padded instruction string, a predecoder maintains synchronization with the instructions in the padded instruction string even if embedded data is coincidentally encoded to resemble an existing instruction in the variable length instruction set.
    • 公开了用于确保指令串的同步预解码的技术。 指令串包含来自可变长度指令集和嵌入数据的指令。 一种技术包括定义一个等于指令集中最小长度指令的粒子,并将构成指令集中最长指令的粒子数定义为MAX。 该技术还包括当程序被编译或组装成指令串并将长度为MAX-1的填充插入到嵌入数据的结尾的指令串中时,确定嵌入数据段的结束。 在预编译填充指令串时,即使嵌入数据被巧合地编码成类似于可变长度指令集中的现有指令,预解码器也保持与填充指令串中的指令的同步。