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    • 1. 发明授权
    • Simplified vertical deflection circuit
    • 简化垂直偏转电路
    • US4277729A
    • 1981-07-07
    • US94287
    • 1979-11-19
    • Robert L. Rodgers, III
    • Robert L. Rodgers, III
    • H03K4/58H03K4/72H04N3/223H01J29/54
    • H03K4/725H03K4/58H04N3/223
    • A simplified bootstrap deflection circuit includes a sawtooth capacitor with one end grounded. First and second serially connected resistors provide charging current to form a ramp voltage across the capacitor. The noninverting input of an amplifier is coupled to receive the ramp. The amplifier output is coupled to a deflection winding and current sensing resistor. A feedback path couples the current sensing resistor to the inverting input terminal. A resistor is coupled to the inverting input terminal and to a reference potential. A bootstrap capacitor couples sawtooth feedback voltage at the inverting input terminal to the junction of the first and second capacitors for producing a constant voltage across the second resistor for linearizing the ramp. The feedback path includes a series variable resistor which acts as a centering control.
    • 简化的自举偏转电路包括一端接地的锯齿电容器。 第一和第二串联电阻器提供充电电流以在电容器两端形成斜坡电压。 放大器的同相输入被耦合以接收斜坡。 放大器输出耦合到偏转绕组和电流检测电阻。 反馈路径将电流检测电阻耦合到反相输入端。 电阻器耦合到反相输入端子和参考电位。 自举电容器将反相输入端子处的锯齿波反馈电压耦合到第一和第二电容器的结,用于在第二电阻器两端产生恒定的电压,以使斜坡线性化。 反馈路径包括用作定心控制的串联可变电阻器。
    • 2. 发明授权
    • Relaxation oscillators with electrical control of periodicities of
oscillation
    • 具有振荡周期性电气控制的松弛振荡器
    • US4292605A
    • 1981-09-29
    • US94752
    • 1979-11-15
    • Robert L. Rodgers, III
    • Robert L. Rodgers, III
    • H03K3/03H03K3/28
    • H03K3/03
    • In this relaxation oscillator first and second electrically controlled constant current generators are used to provide proportionately related first and second currents to first and second terminals, respectively, between which the timing capacitor is connected. Set-reset, or R-S, flip-flop means is set and reset by the voltage at the first and second terminals, respectively, departing in a first sense from the voltage at a reference voltage bus by a predetermined amount. First switching means responds to the R-S flip-flop reset condition to complete a connection of the first terminal to the reference voltage bus and responds to the R-S flip-flop set condition to interrupt that connection. Second switching means responds to the R-S flip-flop set condition to complete a connection of the second terminal to the reference voltage bus and responds to the R-S flip-flop reset condition to interrupt that connection. The rate at which oscillations proceed is linearly related to the amplitudes of the proportionately related currents supplied by the first and second constant current generators.
    • 在这种张弛振荡器中,第一和第二电控恒流发生器分别用于向定时电容器连接的第一和第二端子提供比例相关的第一和第二电流。 设置复位或R-S,触发器装置被分别由第一和第二端子处的电压设置和复位,从第一方面偏离参考电压母线处的电压预定量。 第一开关装置响应R-S触发器复位条件,以完成第一端子与参考电压总线的连接,并响应R-S触发器设置条件以中断该连接。 第二开关装置响应于R-S触发器设定条件以完成第二端子与参考电压总线的连接,并响应于R-S触发器复位条件以中断该连接。 振荡进行的速率与由第一和第二恒定电流发生器提供的比例相关的电流的振幅线性相关。
    • 4. 发明授权
    • Television synchronizing system operable from nonstandard signals
    • 可从非标准信号操作的电视同步系统
    • US4253116A
    • 1981-02-24
    • US98179
    • 1979-11-27
    • Robert L. Rodgers, III
    • Robert L. Rodgers, III
    • H04N5/06H04N5/04
    • H04N5/06
    • A synchronizing signal for a television camera includes a count-down system by which standard horizontal and vertical synchronizing signals are generated and added to the video signals being produced. In order to allow the camera to be synchronized to a nonstandard source of synchronizing signals such as a television game, computer with TV display, another television camera or a video recorder for allowing split-screen applications, the count-down system is phase-locked to the external sync portions of the external sync signals. Thus, standard sync signals are produced by the camera at a rate controlled by a nonstandard sync source. In order to prevent slewing of the system during the vertical equalizing or synchronizing portions of the external sync signals, the phase-lock loop which controls the frequency of the count-down system is inhibited during at least the vertical synchronizing and equalizing pulse portions of the external synchronizing signals.
    • 用于电视摄像机的同步信号包括一个倒计时系统,通过该系统产生标准的水平和垂直同步信号并将其加到正在产生的视频信号上。 为了允许摄像机与非标准同步信号源同步,例如电视游戏机,具有电视显示器的计算机,用于允许分屏应用的另一电视摄像机或录像机,倒计时系统被锁相 到外部同步信号的外部同步部分。 因此,标准同步信号由相机以非标准同步源控制的速率产生。 为了防止在外部同步信号的垂直均衡或同步部分期间系统的回转,在至少垂直同步和均衡脉冲部分期间禁止控制倒计数系统的频率的锁相环 外部同步信号。