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1. 发明授权

US07719344B1 Stabilization component for a substrate potential regulation circuit 有权
标题翻译：稳定元件用于衬底电位调节电路
公开(公告)号：US07719344B1
公开(公告)日：2010-05-18
申请号：US11358482
申请日：2006-02-21
申请人： Tien-Min Chen , Robert Fu
发明人： Tien-Min Chen , Robert Fu
IPC分类号： G05F1/10 , G05F3/02
CPC分类号： G05F3/205
摘要： A stabilization component for substrate potential regulation for an integrated circuit device. A comparator is coupled to a charge pump to control the charge pump to drive a substrate potential. A stabilization component is coupled to the comparator and is operable to correct an over-charge of the substrate by shunting current from the substrate.
摘要翻译：用于集成电路器件的衬底电位调节的稳定元件。比较器耦合到电荷泵以控制电荷泵来驱动衬底电位。稳定组件耦合到比较器，并且可操作以通过从衬底分流电流来校正衬底的过充电。

2. 发明授权

US08350616B1 Variable output charge pump circuit 有权
标题翻译：可变输出电荷泵电路
公开(公告)号：US08350616B1
公开(公告)日：2013-01-08
申请号：US10712522
申请日：2003-11-12
申请人： Robert Fu , Tien-Min Chen
发明人： Robert Fu , Tien-Min Chen
IPC分类号： G05F1/10 , G05F3/02
CPC分类号： H02M3/07
摘要： A drive frequency source with two selectable output frequencies connected to two charge pump arrays. A first array of basic charge pump units is connected to the first output frequency and a second array of basic charge pump units is connected to the output frequency. One or more of the basic charge pump units making up the aforementioned first and second charge pump arrays has an enable input allowing its output current contribution to be added or subtracted from the total array output. The output of the first array is coupled to a P-type substrate and the output of the second array is coupled to an N-well residing in the P-type substrate. A controller may be coupled to the drive frequency source for selecting the output frequencies, and an output monitor may be coupled between the array outputs and the controller to provide feedback.
摘要翻译：具有两个可选输出频率的驱动频率源连接到两个电荷泵阵列。基本电荷泵单元的第一阵列连接到第一输出频率，第二阵列的基本电荷泵单元连接到输出频率。构成上述第一和第二电荷泵阵列的一个或多个基本电荷泵单元具有允许其输出电流贡献从总阵列输出相加或减去的使能输入。第一阵列的输出耦合到P型衬底，并且第二阵列的输出耦合到位于P型衬底中的N阱。控制器可以耦合到驱动频率源以选择输出频率，并且输出监视器可以耦合在阵列输出和控制器之间以提供反馈。

3. 发明授权

US08022747B2 System for substrate potential regulation during power-up in integrated circuits 有权
标题翻译：集成电路上电期间衬底电位调节系统
公开(公告)号：US08022747B2
公开(公告)日：2011-09-20
申请号：US12628010
申请日：2009-11-30
申请人： Robert Fu , Tien-Min Chen
发明人： Robert Fu , Tien-Min Chen
IPC分类号： H03K3/011
CPC分类号： H01L27/0222 , H01L21/823892 , H01L29/78 , H03K2217/0018
摘要： An integrated circuit with body-bias inputs coordinated by a switch at initial power application. A switch coupled to the N-well bias and P-type substrate bias lines of an integrated circuit selectively couples the substrate to ground or the substrate bias supply, depending upon the state of the bias supply lines. During power-up and the initial application of the N-well bias, the substrate is coupled to ground to prevent a leakage induce rise in the substrate potential. Upon sensing the presence of the substrate bias potential on the substrate bias line, the switch couples the substrate to the substrate bias line instead of ground. In another embodiment, a switch indirectly senses the availability of the substrate bias potential by sensing a charge pump enable signal.
摘要翻译：在初始电源施加时，具有由开关协调的体偏置输入的集成电路。耦合到集成电路的N阱偏压和P型衬底偏置线的开关根据偏置电源线的状态选择性地将衬底耦合到接地或衬底偏置电源。在上电和初始施加N阱偏压期间，衬底耦合到地，以防止漏极引起衬底电位的上升。在感测到衬底偏置线上的衬底偏置电位的存在之后，开关将衬底耦合到衬底偏置线而不是接地。在另一个实施例中，开关通过感测电荷泵使能信号间接地感测到衬底偏置电位的可用性。

4. 发明申请

US20100073075A1 SYSTEM FOR SUBSTRATE POTENTIAL REGULATION DURING POWER-UP IN INTEGRATED CIRCUITS 有权
标题翻译：在集成电路加电期间的基极电位调节系统
公开(公告)号：US20100073075A1
公开(公告)日：2010-03-25
申请号：US12628010
申请日：2009-11-30
申请人： Robert Fu , Tien-Min Chen
发明人： Robert Fu , Tien-Min Chen
IPC分类号： H03K3/01
CPC分类号： H01L27/0222 , H01L21/823892 , H01L29/78 , H03K2217/0018
摘要： An integrated circuit with body-bias inputs coordinated by a switch at initial power application. A switch coupled to the N-well bias and P-type substrate bias lines of an integrated circuit selectively couples the substrate to ground or the substrate bias supply, depending upon the state of the bias supply lines. During power-up and the initial application of the N-well bias, the substrate is coupled to ground to prevent a leakage induce rise in the substrate potential. Upon sensing the presence of the substrate bias potential on the substrate bias line, the switch couples the substrate to the substrate bias line instead of ground. In another embodiment, a switch indirectly senses the availability of the substrate bias potential by sensing a charge pump enable signal.
摘要翻译：在初始电源施加时，具有由开关协调的体偏置输入的集成电路。耦合到集成电路的N阱偏压和P型衬底偏置线的开关根据偏置电源线的状态选择性地将衬底耦合到接地或衬底偏置电源。在上电和初始施加N阱偏压期间，衬底耦合到地，以防止漏极引起衬底电位的上升。在感测到衬底偏置线上的衬底偏置电位的存在之后，开关将衬底耦合到衬底偏置线而不是接地。在另一个实施例中，开关通过感测电荷泵使能信号间接地感测到衬底偏置电位的可用性。

5. 发明授权

US07642835B1 System for substrate potential regulation during power-up in integrated circuits 有权
标题翻译：集成电路上电期间衬底电位调节系统
公开(公告)号：US07642835B1
公开(公告)日：2010-01-05
申请号：US10712523
申请日：2003-11-12
申请人： Robert Fu , Tien-Min Chen
发明人： Robert Fu , Tien-Min Chen
IPC分类号： H03K3/01 , H01L25/00
CPC分类号： H01L27/0222 , H01L21/823892 , H01L29/78 , H03K2217/0018
摘要： An integrated circuit with body-bias inputs coordinated by a switch at initial power application. A switch coupled to the N-well bias and P-type substrate bias lines of an integrated circuit selectively couples the substrate to ground or the substrate bias supply, depending upon the state of the bias supply lines. During power-up and the initial application of the N-well bias, the substrate is coupled to ground to prevent a leakage induce rise in the substrate potential. Upon sensing the presence of the substrate bias potential on the substrate bias line, the switch couples the substrate to the substrate bias line instead of ground. In another embodiment, a switch indirectly senses the availability of the substrate bias potential by sensing a charge pump enable signal.
摘要翻译：在初始电源施加时，具有由开关协调的体偏置输入的集成电路。耦合到集成电路的N阱偏压和P型衬底偏置线的开关根据偏置电源线的状态选择性地将衬底耦合到接地或衬底偏置电源。在上电和初始施加N阱偏压期间，衬底耦合到地，以防止漏极引起衬底电位的上升。在感测到衬底偏置线上的衬底偏置电位的存在之后，开关将衬底耦合到衬底偏置线而不是接地。在另一个实施例中，开关通过感测电荷泵使能信号间接地感测到衬底偏置电位的可用性。

6. 发明授权

US08085084B2 System for substrate potential regulation during power-up in integrated circuits 有权
公开(公告)号：US08085084B2
公开(公告)日：2011-12-27
申请号：US12628054
申请日：2009-11-30
申请人： Robert Fu , Tien-Min Chen
发明人： Robert Fu , Tien-Min Chen
IPC分类号： H03K3/00
CPC分类号： H01L27/0222 , H01L21/823892 , H01L29/78 , H03K2217/0018
摘要： An integrated circuit with body-bias inputs coordinated by a switch at initial power application. A switch coupled to the N-well bias and P-type substrate bias lines of an integrated circuit selectively couples the substrate to ground or the substrate bias supply, depending upon the state of the bias supply lines. During power-up and the initial application of the N-well bias, the substrate is coupled to ground to prevent a leakage induce rise in the substrate potential. Upon sensing the presence of the substrate bias potential on the substrate bias line, the switch couples the substrate to the substrate bias line instead of ground. In another embodiment, a switch indirectly senses the availability of the substrate bias potential by sensing a charge pump enable signal.

7. 发明申请

US20100073076A1 SYSTEM FOR SUBSTRATE POTENTIAL REGULATION DURING POWER-UP IN INTEGRATED CIRCUITS 有权
公开(公告)号：US20100073076A1
公开(公告)日：2010-03-25
申请号：US12628054
申请日：2009-11-30
申请人： Robert Fu , Tien-Min Chen
发明人： Robert Fu , Tien-Min Chen
IPC分类号： H03K3/01
CPC分类号： H01L27/0222 , H01L21/823892 , H01L29/78 , H03K2217/0018
摘要： An integrated circuit with body-bias inputs coordinated by a switch at initial power application. A switch coupled to the N-well bias and P-type substrate bias lines of an integrated circuit selectively couples the substrate to ground or the substrate bias supply, depending upon the state of the bias supply lines. During power-up and the initial application of the N-well bias, the substrate is coupled to ground to prevent a leakage induce rise in the substrate potential. Upon sensing the presence of the substrate bias potential on the substrate bias line, the switch couples the substrate to the substrate bias line instead of ground. In another embodiment, a switch indirectly senses the availability of the substrate bias potential by sensing a charge pump enable signal.

8. 发明授权

US07012461B1 Stabilization component for a substrate potential regulation circuit 有权
标题翻译：稳定元件用于衬底电位调节电路
公开(公告)号：US07012461B1
公开(公告)日：2006-03-14
申请号：US10747022
申请日：2003-12-23
申请人： Tien-Min Chen , Robert Fu
发明人： Tien-Min Chen , Robert Fu
IPC分类号： G05F3/02
CPC分类号： G05F3/205
摘要： A stabilization component for substrate potential regulation for an integrated circuit device. A comparator is coupled to a charge pump to control the charge pump to drive a substrate potential. A stabilization component is coupled to the comparator and is operable to correct an over-charge of the substrate by shunting current from the substrate.
摘要翻译：用于集成电路器件的衬底电位调节的稳定元件。比较器耦合到电荷泵以控制电荷泵来驱动衬底电位。稳定组件耦合到比较器，并且可操作以通过从衬底分流电流来校正衬底的过充电。

9. 发明授权

US07362165B1 Servo loop for well bias voltage source 有权
标题翻译：井偏压电源的伺服回路
公开(公告)号：US07362165B1
公开(公告)日：2008-04-22
申请号：US11591431
申请日：2006-10-31
申请人： Tien-Min Chen
发明人： Tien-Min Chen
IPC分类号： G05F1/10
CPC分类号： H02M3/07 , G11C5/145 , H02M2003/071
摘要： A servo loop for a charge pump including comparator. A variable resistor and comparator are in series and couple the output of the charge pump to an enable input. A current source/sink coupled to the variable resistor provide a first input voltage to the comparator, with the second input of the comparator being coupled to ground or Vdd. A shunt circuit in parallel with the load at the output of the charge pump is also coupled to the output of the comparator. The charge pump and shunt are alternately enabled and disabled by the comparator to maintain a body-bias supply voltage. The servo loop may be configured to provide body-bias for NFETs or PFETs.
摘要翻译：包括比较器的电荷泵伺服回路。可变电阻和比较器串联并将电荷泵的输出耦合到使能输入。耦合到可变电阻器的电流源/宿提供到比较器的第一输入电压，比较器的第二输入端耦合到地或Vdd。与电荷泵的输出处的负载并联的并联电路也耦合到比较器的输出端。电荷泵和分流器由比较器交替使能和禁止，以保持体偏置电源电压。伺服环路可被配置为为NFET或PFET提供体偏置。

10. 发明授权

US06285585B1 Output switching implementation for a flash memory device 有权
标题翻译：闪存设备的输出切换实现
公开(公告)号：US06285585B1
公开(公告)日：2001-09-04
申请号：US09421471
申请日：1999-10-19
申请人： Kazuhiro Kurihara , Tien-Min Chen
发明人： Kazuhiro Kurihara , Tien-Min Chen
IPC分类号： G11C1400
CPC分类号： G11C7/1057 , G11C7/1051 , G11C7/106 , G11C16/26
摘要： An output buffer control circuit for a simultaneous operation flash memory device is disclosed. The output buffer control circuit receives signals indicating when an equalization or address transition detect phase of operation is happening and blocks the output enable input signal from reaching the output buffers of the memory device. This prevents the output buffers from switching.
摘要翻译：公开了一种用于同时操作的闪速存储器件的输出缓冲器控制电路。输出缓冲器控制电路接收指示何时发生均衡或地址转换检测操作阶段的信号，并阻止输出使能输入信号到达存储器件的输出缓冲器。这样可以防止输出缓冲区的切换。

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