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1. 发明申请

US20110121868A1 CLOCK BUFFER 有权
标题翻译：时钟缓冲
公开(公告)号：US20110121868A1
公开(公告)日：2011-05-26
申请号：US13017436
申请日：2011-01-31
申请人： Robert F. Payne , Marco Corsi , Tien-Ling Hsieh
发明人： Robert F. Payne , Marco Corsi , Tien-Ling Hsieh
IPC分类号： H03B1/00
CPC分类号： H03M1/002 , H03M1/1245
摘要： An apparatus is provided. The apparatus comprises a first bipolar junction transistor (BJT) differential pair having a first BJT and a second BJT, a second BJT differential pair having a third BJT and a fourth BJT, a first clamp having a fifth BJT and a sixth BJT, and a second clamp having a seventh BJT and an eighth BJT. The collector and base of the third BJT are respectively coupled to the collector and base of the first BJT, and the collector and base of the fourth BJT are respectively coupled to the collector and base of the second BJT. The bases of first, second, third, and fourth BJTs receive an input clock signal. The emitters of the fifth and sixth BJTs are coupled to the collectors of the first and third BJTs, while the emitters of the seventh and eight BJTs are coupled to the collectors of the second and fourth BJTs. The bases of the fifth and seventh BJT are adapted to receive a low clamping voltage, and the bases of the sixth and eighth BJTs are adapted to receive a high clamping voltage. Additionally, the first and second clamps is coupled to the collectors of the first, second, third, and fourth BJTs.
摘要翻译：提供了一种装置。该装置包括具有第一BJT和第二BJT的第一双极结型晶体管（BJT）差分对，具有第三BJT和第四BJT的第二BJT差分对，具有第五BJT和第六BJT的第一钳位，以及第二夹具具有第七BJT和第八BJT。第三BJT的集电极和基极分别耦合到第一BJT的集电极和基极，并且第四BJT的集电极和基极分别耦合到第二BJT的集电极和基极。第一，第二，第三和第四BJT的基极接收输入时钟信号。第五和第六BJT的发射器耦合到第一和第三BJT的集电极，而第七和第八BJT的发射极耦合到第二和第四BJT的集电极。第五和第七BJT的基极适于接收低钳位电压，并且第六和第八BJT的基极适于接收高钳位电压。另外，第一和第二夹具耦合到第一，第二，第三和第四BJT的收集器。

2. 发明申请

US20100213986A1 CLOCK BUFFER 有权
标题翻译：时钟缓冲
公开(公告)号：US20100213986A1
公开(公告)日：2010-08-26
申请号：US12393188
申请日：2009-02-26
申请人： Robert F. Payne , Marco Corsi , Tien-Ling Hsieh
发明人： Robert F. Payne , Marco Corsi , Tien-Ling Hsieh
IPC分类号： H03B1/00
CPC分类号： H03M1/002 , H03M1/1245
摘要： An apparatus is provided. The apparatus comprises a first bipolar junction transistor (BJT) differential pair having a first BJT and a second BJT, a second BJT differential pair having a third BJT and a fourth BJT, a first clamp having a fifth BJT and a sixth BJT, and a second clamp having a seventh BJT and an eighth BJT. The collector and base of the third BJT are respectively coupled to the collector and base of the first BJT, and the collector and base of the fourth BJT are respectively coupled to the collector and base of the second BJT. The bases of first, second, third, and fourth BJTs receive an input clock signal. The emitters of the fifth and sixth BJTs are coupled to the collectors of the first and third BJTs, while the emitters of the seventh and eight BJTs are coupled to the collectors of the second and fourth BJTs. The bases of the fifth and seventh BJT are adapted to receive a low clamping voltage, and the bases of the sixth and eighth BJTs are adapted to receive a high clamping voltage. Additionally, the first and second clamps is coupled to the collectors of the first, second, third, and fourth BJTs.
摘要翻译：提供了一种装置。该装置包括具有第一BJT和第二BJT的第一双极结型晶体管（BJT）差分对，具有第三BJT和第四BJT的第二BJT差分对，具有第五BJT和第六BJT的第一钳位，以及第二夹具具有第七BJT和第八BJT。第三BJT的集电极和基极分别耦合到第一BJT的集电极和基极，并且第四BJT的集电极和基极分别耦合到第二BJT的集电极和基极。第一，第二，第三和第四BJT的基极接收输入时钟信号。第五和第六BJT的发射器耦合到第一和第三BJT的集电极，而第七和第八BJT的发射极耦合到第二和第四BJT的集电极。第五和第七BJT的基极适于接收低钳位电压，并且第六和第八BJT的基极适于接收高钳位电压。另外，第一和第二夹具耦合到第一，第二，第三和第四BJT的收集器。

3. 发明授权

US07990188B2 Clock buffer 有权
标题翻译：时钟缓冲
公开(公告)号：US07990188B2
公开(公告)日：2011-08-02
申请号：US13017436
申请日：2011-01-31
申请人： Robert F. Payne , Marco Corsi , Tien-Ling Hsieh
发明人： Robert F. Payne , Marco Corsi , Tien-Ling Hsieh
IPC分类号： H03B1/00
CPC分类号： H03M1/002 , H03M1/1245
摘要： An apparatus is provided. The apparatus comprises a first bipolar junction transistor (BJT) differential pair having a first BJT and a second BJT, a second BJT differential pair having a third BJT and a fourth BJT, a first clamp having a fifth BJT and a sixth BJT, and a second clamp having a seventh BJT and an eighth BJT. The collector and base of the third BJT are respectively coupled to the collector and base of the first BJT, and the collector and base of the fourth BJT are respectively coupled to the collector and base of the second BJT. The bases of first, second, third, and fourth BJTs receive an input clock signal. The emitters of the fifth and sixth BJTs are coupled to the collectors of the first and third BJTs, while the emitters of the seventh and eight BJTs are coupled to the collectors of the second and fourth BJTs. The bases of the fifth and seventh BJT are adapted to receive a low clamping voltage, and the bases of the sixth and eighth BJTs are adapted to receive a high clamping voltage. Additionally, the first and second clamps is coupled to the collectors of the first, second, third, and fourth BJTs.
摘要翻译：提供了一种装置。该装置包括具有第一BJT和第二BJT的第一双极结型晶体管（BJT）差分对，具有第三BJT和第四BJT的第二BJT差分对，具有第五BJT和第六BJT的第一钳位，以及第二夹具具有第七BJT和第八BJT。第三BJT的集电极和基极分别耦合到第一BJT的集电极和基极，并且第四BJT的集电极和基极分别耦合到第二BJT的集电极和基极。第一，第二，第三和第四BJT的基极接收输入时钟信号。第五和第六BJT的发射器耦合到第一和第三BJT的集电极，而第七和第八BJT的发射极耦合到第二和第四BJT的集电极。第五和第七BJT的基极适于接收低钳位电压，并且第六和第八BJT的基极适于接收高钳位电压。另外，第一和第二夹具耦合到第一，第二，第三和第四BJT的收集器。

4. 发明授权

US07906995B2 Clock buffer 有权
公开(公告)号：US07906995B2
公开(公告)日：2011-03-15
申请号：US12393188
申请日：2009-02-26
申请人： Robert F. Payne , Marco Corsi , Tien-Ling Hsieh
发明人： Robert F. Payne , Marco Corsi , Tien-Ling Hsieh
IPC分类号： H03B1/00
CPC分类号： H03M1/002 , H03M1/1245
摘要： An apparatus is provided. The apparatus comprises a first bipolar junction transistor (BJT) differential pair having a first BJT and a second BJT, a second BJT differential pair having a third BJT and a fourth BJT, a first clamp having a fifth BJT and a sixth BJT, and a second clamp having a seventh BJT and an eighth BJT. The collector and base of the third BJT are respectively coupled to the collector and base of the first BJT, and the collector and base of the fourth BJT are respectively coupled to the collector and base of the second BJT. The bases of first, second, third, and fourth BJTs receive an input clock signal. The emitters of the fifth and sixth BJTs are coupled to the collectors of the first and third BJTs, while the emitters of the seventh and eight BJTs are coupled to the collectors of the second and fourth BJTs. The bases of the fifth and seventh BJT are adapted to receive a low clamping voltage, and the bases of the sixth and eighth BJTs are adapted to receive a high clamping voltage. Additionally, the first and second clamps is coupled to the collectors of the first, second, third, and fourth BJTs.

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