专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07176919B2 Recirculating shade tree blender for a graphics system 有权
标题翻译：用于图形系统的循环遮光树搅拌机
公开(公告)号：US07176919B2
公开(公告)日：2007-02-13
申请号：US11242138
申请日：2005-10-04
申请人： Robert A. Drebin , Timothy J. Van Hook , Patrick Y. Law , Mark M. Leather , Matthew Komsthoeft
发明人： Robert A. Drebin , Timothy J. Van Hook , Patrick Y. Law , Mark M. Leather , Matthew Komsthoeft
IPC分类号： G06T15/50
CPC分类号： G06T15/80 , G06T15/005 , G06T15/50
摘要： A graphics system including a custom graphics and audio processor produces exciting 2D and 3D graphics and surround sound. A relatively low chip-footprint, versatile texture environment (TEV) processing subsystem is implemented in a pipelined graphics system circulates computed color and alpha data over multiple texture blending/shading cycles (stages). The texture-environment subsystem combines per-vertex lighting, textures and constant (rasterized) colors to form computed pixel color prior to fogging and final pixel blending. Blending operations for color (RGB) and alpha components are independently processed by a single sub-blend unit that is reused over multiple processing stages to combine multiple textures.
摘要翻译：包括定制图形和音频处理器的图形系统产生令人兴奋的2D和3D图形和环绕声。在流水线图形系统中实现了相对较低的芯片占用面积多样化的纹理环境（TEV）处理子系统，通过多个纹理混合/阴影循环（阶段）循环计算的颜色和alpha数据。纹理环境子系统结合了每顶点照明，纹理和常量（光栅化）颜色，以在雾化和最终像素混合之前形成计算的像素颜色。颜色（RGB）和alpha组件的混合操作由单个子混合单元独立处理，该单个子混合单元在多个处理阶段重复使用以组合多个纹理。

2. 发明授权

US07034828B1 Recirculating shade tree blender for a graphics system 有权
标题翻译：用于图形系统的循环遮光树搅拌机
公开(公告)号：US07034828B1
公开(公告)日：2006-04-25
申请号：US09722367
申请日：2000-11-28
申请人： Robert A. Drebin , Timothy J. Van Hook , Patrick Y. Law , Mark M. Leather , Matthew Komsthoeft
发明人： Robert A. Drebin , Timothy J. Van Hook , Patrick Y. Law , Mark M. Leather , Matthew Komsthoeft
IPC分类号： G06T15/60
CPC分类号： G06T15/80 , G06T15/005 , G06T15/50
摘要： A hardware-accelerated recirculating programmable texture blender/shader arrangement circulates computed color and alpha data over multiple texture blending/shading cycles (stages) to provide multi-texturing and other effects. Up to sixteen independently programmable consecutive stages, forming a chain of blending operations, are supported for applying multiple textures to a single object in a single rendering pass.
摘要翻译：硬件加速循环可编程纹理混合器/着色器布置在多个纹理混合/阴影循环（阶段）中循环计算的颜色和alpha数据，以提供多纹理和其他效果。支持多达十六个独立可编程的连续阶段，形成混合操作链，用于在单个渲染过程中将多个纹理应用于单个对象。

3. 发明授权

US07307638B2 Method and apparatus for interleaved processing of direct and indirect texture coordinates in a graphics system 有权
公开(公告)号：US07307638B2
公开(公告)日：2007-12-11
申请号：US11152283
申请日：2005-06-15
申请人： Mark M. Leather , Robert A. Drebin , Timothy J. Van Hook
发明人： Mark M. Leather , Robert A. Drebin , Timothy J. Van Hook
IPC分类号： G09G5/00 , G06T11/40 , G06T17/00 , A63F9/24 , G06K9/56 , G06T15/20 , G06K9/36
CPC分类号： G06T15/04 , G06T15/005
摘要： A graphics system including a custom graphics and audio processor produces exciting 2D and 3D graphics and surround sound. The system includes a graphics and audio processor including a 3D graphics pipeline and an audio digital signal processor. The graphics pipeline renders and prepares images for display at least in part in response to polygon vertex attribute data and texel color data stored as a texture images in an associated memory. An efficient texturing pipeline arrangement achieves a relatively low chip-footprint by utilizing a single texture coordinate/data processing unit that interleaves the processing of logical direct and indirect texture coordinate data and a texture lookup data feedback path for “recirculating” indirect texture lookup data retrieved from a single texture retrieval unit back to the texture coordinate/data processing unit. Versatile indirect texture referencing is achieved by using the same texture coordinate/data processing unit to transform the recirculated texture lookup data into offsets that may be added to the texture coordinates of a direct texture lookup. A generalized indirect texture API function is provided that supports defining at least four indirect texture referencing operations and allows for selectively associating one of at least eight different texture images with each indirect texture defined. Retrieved indirect texture lookup data is processed as multi-bit binary data triplets of three, four, five, or eight bits. The data triplets are multiplied by a 3×2 texture coordinate offset matrix before being optionally combined with regular non-indirect coordinate data or coordinate data from a previous cycle/stage of processing. Values of the offset matrix elements are variable and may be dynamically defined for each cycle/stage using selected constants. Two additional variable matrix configurations are also defined containing element values obtained from current direct texture coordinates. Circuitry for optionally biasing and scaling retrieved texture data is also provided.

4. 发明授权

US07002591B1 Method and apparatus for interleaved processing of direct and indirect texture coordinates in a graphics system 有权
公开(公告)号：US07002591B1
公开(公告)日：2006-02-21
申请号：US09722382
申请日：2000-11-28
申请人： Mark M. Leather , Robert A. Drebin , Timothy J. Van Hook
发明人： Mark M. Leather , Robert A. Drebin , Timothy J. Van Hook
IPC分类号： G09G5/00 , G06T17/00
CPC分类号： G06T15/04 , G06T15/005
摘要： A graphics system including a custom graphics and audio processor produces exciting 2D and 3D graphics and surround sound. The system includes a graphics and audio processor including a 3D graphics pipeline and an audio digital signal processor. The graphics pipeline renders and prepares images for display at least in part in response to polygon vertex attribute data and texel color data stored as a texture images in an associated memory. An efficient texturing pipeline arrangement achieves a relatively low chip-footprint by utilizing a single texture coordinate/data processing unit that interleaves the processing of logical direct and indirect texture coordinate data and a texture lookup data feedback path for “recirculating” indirect texture lookup data retrieved from a single texture retrieval unit back to the texture coordinate/data processing unit. Versatile indirect texture referencing is achieved by using the same texture coordinate/data processing unit to transform the recirculated texture lookup data into offsets that may be added to the texture coordinates of a direct texture lookup. A generalized indirect texture API function is provided that supports defining at least four indirect texture referencing operations and allows for selectively associating one of at least eight different texture images with each indirect texture defined. Retrieved indirect texture lookup data is processed as multi-bit binary data triplets of three, four, five, or eight bits. The data triplets are multiplied by a 3×2 texture coordinate offset matrix before being optionally combined with regular non-indirect coordinate data or coordinate data from a previous cycle/stage of processing. Values of the offset matrix elements are variable and may be dynamically defined for each cycle/stage using selected constants. Two additional variable matrix configurations are also defined containing element values obtained from current direct texture coordinates. Circuitry for optionally biasing and scaling retrieved texture data is also provided.

5. 发明授权

US07184059B1 Graphics system with copy out conversions between embedded frame buffer and main memory 有权
标题翻译：嵌入式帧缓冲区和主内存之间具有复制转换的图形系统
公开(公告)号：US07184059B1
公开(公告)日：2007-02-27
申请号：US09722663
申请日：2000-11-28
申请人： Farhad Fouladi , Mark M. Leather , Robert Moore , Howard Cheng , Timothy J. Van Hook
发明人： Farhad Fouladi , Mark M. Leather , Robert Moore , Howard Cheng , Timothy J. Van Hook
IPC分类号： G09G5/02 , G09G5/397 , G06T1/20
CPC分类号： G09G5/363 , G06T15/005 , G09G5/02 , G09G5/391 , G09G5/393 , G09G5/399 , G09G2320/0247 , G09G2320/0276 , G09G2340/0407 , G09G2360/127
摘要： A graphics system including a custom graphics and audio processor produces exciting 2D and 3D graphics and surround sound. The system includes a graphics and audio processor including a 3D graphics pipeline and an audio digital signal processor. The graphics processor includes an embedded frame buffer for storing frame data prior to sending the frame data to an external location, such as main memory. A copy pipeline is provided which converts the data from one format to another format prior to writing the data to the external location. The conversion may be from one RGB color format to another RGB color format, from one YUV format to another YUV format, from an RGB color format to a YUV color format, or from a YUV color format to an RGB color format. The formatted data is either transferred to a display buffer, for use by the video interface, or to a texture buffer, for use as a texture by the graphics pipeline in a subsequent rendering process.
摘要翻译：包括定制图形和音频处理器的图形系统产生令人兴奋的2D和3D图形和环绕声。该系统包括包括3D图形流水线和音频数字信号处理器的图形和音频处理器。图形处理器包括用于在将帧数据发送到诸如主存储器的外部位置之前存储帧数据的嵌入式帧缓冲器。提供了一个复制流水线，在将数据写入外部位置之前，将数据从一种格式转换为另一种格式。该转换可以是从一种RGB颜色格式到另一种RGB颜色格式，从一种YUV格式到另一种YUV格式，从RGB颜色格式到YUV颜色格式，或者从YUV颜色格式到RGB颜色格式。格式化的数据被传送到显示缓冲器，供视频接口或纹理缓冲区使用，用于随后渲染过程中图形管线的纹理。

6. 发明授权

US07317459B2 Graphics system with copy out conversions between embedded frame buffer and main memory for producing a streaming video image as a texture on a displayed object image 有权
标题翻译：在嵌入式帧缓冲器和主存储器之间具有拷贝转换的图形系统，用于在显示的对象图像上生成流视频图像作为纹理
公开(公告)号：US07317459B2
公开(公告)日：2008-01-08
申请号：US11604374
申请日：2006-11-27
申请人： Farhad Fouladi , Mark M. Leather , Robert Moore , Howard Cheng , Timothy J. Van Hook
发明人： Farhad Fouladi , Mark M. Leather , Robert Moore , Howard Cheng , Timothy J. Van Hook
IPC分类号： G09G5/02 , G09G5/397 , G06T1/20
CPC分类号： G09G5/363 , G06T15/005 , G09G5/02 , G09G5/391 , G09G5/393 , G09G5/399 , G09G2320/0247 , G09G2320/0276 , G09G2340/0407 , G09G2360/127
摘要： A graphics processor includes an embedded frame buffer for storing frame data prior to sending the frame data to an external location, such as main memory. A copy pipeline is provided which converts the data from one format to another format prior to writing the data to the external location. The conversion may be from one RGB color format to another RGB color format, from one YUV format to another YUV format, from an RGB color format to a YUV color format, or from a YUV color format to an RGB color format. MPEG image data initially stored in main memory in a YUV format as a texture is transferred to the embedded frame buffer prior to initiating a copy-out process via the copy pipeline from the embedded frame buffer to an external frame buffer in main memory. During the copy-out process, pixels are converted from YUV format to an RGB format. A new texture image containing MPEG image data is placed in the embedded frame buffer prior to each successive copy out process operation so as to produce a streaming video image as a surface texture on at least a portion of a displayed object image.
摘要翻译：图形处理器包括用于在将帧数据发送到诸如主存储器的外部位置之前存储帧数据的嵌入式帧缓冲器。提供了一个复制流水线，在将数据写入外部位置之前，将数据从一种格式转换为另一种格式。该转换可以是从一种RGB颜色格式到另一种RGB颜色格式，从一种YUV格式到另一种YUV格式，从RGB颜色格式到YUV颜色格式，或者从YUV颜色格式到RGB颜色格式。最初以YUV格式存储在主存储器中的作为纹理的MPEG图像数据在通过复制流水线从嵌入式帧缓冲器发送到主存储器中的外部帧缓冲器之前被发送到嵌入式帧缓冲器。在复制过程中，像素从YUV格式转换为RGB格式。在每个连续的拷贝输出处理操作之前，将包含MPEG图像数据的新纹理图像放置在嵌入式帧缓冲器中，以便在所显示的对象图像的至少一部分上产生作为表面纹理的流式视频图像。

7. 发明申请

US20120183215A1 METHOD AND APPARATUS FOR COMPRESSION OF MULTI-SAMPLED ANTI-ALIASING COLOR DATA 有权
标题翻译：多采样抗锯齿数据压缩方法与装置
公开(公告)号：US20120183215A1
公开(公告)日：2012-07-19
申请号：US13352455
申请日：2012-01-18
申请人： Timothy J. Van Hook , Farhad Fouladi , Gordon Elder, III
发明人： Timothy J. Van Hook , Farhad Fouladi , Gordon Elder, III
IPC分类号： G06K9/36 , G06T9/00
CPC分类号： G06T9/00 , G06T11/40 , H04N1/644 , H04N19/186 , H04N19/423
摘要： The present invention provides a scheme for compressing the color components of image data, and in particular, data used in multi-sampled anti-aliasing applications. Adjacent pixels are grouped into rectangular tiles, with the sample colors stored in compressed formats accessible via an encoded pointer. In one embodiment, duplicate colors are stored once. Unlike prior compression schemes that rely on pixel to pixel correlation, the present invention takes advantages of the sample to sample correlation that exists within the pixels. A memory and graphics processor configuration incorporating the tile compression schemes is also provided. The configuration defines the tile sizes in main memory and cache memory. In one embodiment, graphics processor relies on a Tile Format Table (TFT) to process incoming tiles in compressed formats. The present invention reduces memory consumption and speeds up essential and oft-repeated operations in rendering. Thus it is valuable in the design and manufacture of graphic sub-systems.
摘要翻译：本发明提供了一种用于压缩图像数据的颜色分量的方案，特别是用于多采样抗锯齿应用中的数据。相邻像素被分组成矩形瓦片，样本颜色以压缩格式存储，可通过编码指针访问。在一个实施例中，重复的颜色被存储一次。与依赖于像素到像素相关的先前的压缩方案不同，本发明利用样本对存在于像素内的相关性进行采样的优点。还提供了并入瓦片压缩方案的存储器和图形处理器配置。该配置定义主存储器和高速缓冲存储器中的磁贴大小。在一个实施例中，图形处理器依赖于平铺格式表（Tile Format Table，TFT格式表）来处理压缩格式的传入片。本发明减少了存储器消耗并加速了渲染中的基本和重复操作。因此，它在图形子系统的设计和制造中是有价值的。

8. 发明授权

US06630933B1 Method and apparatus for compression and decompression of Z data 有权
标题翻译： Z数据的压缩和解压缩方法和装置
公开(公告)号：US06630933B1
公开(公告)日：2003-10-07
申请号：US09653055
申请日：2000-09-01
申请人： Timothy J. Van Hook
发明人： Timothy J. Van Hook
IPC分类号： G06T1540
CPC分类号： G06T9/001 , G06T15/405
摘要： The present invention provides a scheme for compressing the depth, or Z, components of image data. The data is grouped into a plurality of tiles. A test is performed to determine if a tile can be compressed so that its size after compression is less than its size before compression. If so, the tile is compressed. A tile table includes a flag that can be set for each tile that is compressed. In a data transfer from memory to a graphics processor, the tile table is examined to identify those tiles that are compressed and must be decompressed prior to use. In one scheme the number of primitives that are contained in a tile are determined. If the number of primitives is less than one third of the number of pixels in a tile, an assumption is made that the tile can be compressed. For example, for an 8×8 tile, if the number of primitives is equal to or less than 21, the tile is compressed. In one embodiment, the compression scheme comprises storing a plane equation for each primitive and storing the fragment ID (FID) for each pixel in a primitive.
摘要翻译：本发明提供一种用于压缩图像数据的深度或Z分量的方案。数据被分组成多个瓦片。执行测试以确定是否可以压缩瓦片，使其压缩后的大小小于压缩前的大小。如果是这样，瓦片被压缩。瓦片表包括可以为压缩的每个瓦片设置的标志。在从存储器到图形处理器的数据传输中，检查瓦片表以识别在使用之前被压缩并且必须被解压缩的瓦片。在一个方案中，确定包含在瓦片中的图元的数量。如果图元的数量少于图块中的像素数量的三分之一，则假设可以压缩图块。例如，对于8×8瓦片，如果图元的数量等于或小于21，则该瓦片被压缩。在一个实施例中，压缩方案包括存储每个基元的平面等式，并将每个像素的片段ID（FID）存储在原语中。

9. 发明授权

US06571328B2 Method and apparatus for obtaining a scalar value directly from a vector register 有权
公开(公告)号：US06571328B2
公开(公告)日：2003-05-27
申请号：US09919451
申请日：2001-08-01
申请人： Yu-Chung C. Liao , Peter A. Sandon , Howard Cheng , Timothy J. Van Hook
发明人： Yu-Chung C. Liao , Peter A. Sandon , Howard Cheng , Timothy J. Van Hook
IPC分类号： G06F938
CPC分类号： G06F9/30145 , G06F9/30014 , G06F9/30025 , G06F9/30032 , G06F9/30036 , G06F9/30112 , G06F9/3013 , G06F9/30185 , G06F9/30192
摘要： A method and apparatus for obtaining a scalar value from a vector register for use in a mixed vector and scalar instruction, including providing a vector in a vector register file, and embedding a location identifier of the scalar value within the vector in the bits defining the mixed vector and scalar instruction. The scalar value can be used directly from the vector register without the need to load the scalar to a scalar register prior to executing the instruction. The scalar location identifier may be embedded in the secondary op code of the instruction, or the instruction may have dedicated bits for providing the location of the scalar within the vector.

10. 发明授权

US5933157A Central processing unit with integrated graphics functions 失效
公开(公告)号：US5933157A
公开(公告)日：1999-08-03
申请号：US635271
申请日：1996-04-19
申请人： Timothy J. Van Hook , Leslie Dean Kohn , Robert Yung
发明人： Timothy J. Van Hook , Leslie Dean Kohn , Robert Yung
IPC分类号： G06T11/00 , G06T1/20 , G09G5/00
CPC分类号： G06F9/3885 , G06F17/10 , G06T1/20
摘要： The integer execution unit (IEU) of a central processing unit (CPU) is provided with a graphics status register (GSR) for storing a graphics data scaling factor and a graphics data alignment address offset. Additionally, the CPU is provided with a graphics execution unit (GRU) for executing a number of graphics operations in accordance to the graphics data scaling factor and alignment address offset, the graphics data having a number of graphics data formats. In one embodiment, the GRU is also used to execute a number of graphics data addition, subtraction, rounding, expansion, merge, alignment, multiplication, logical, compare, and pixel distance operations. The graphics data operations are categorized into a first and a second category, and the GRU concurrently executes one graphics operations from each category. Furthermore, under this embodiment, the IEU is also used to execute a number of graphics data edge handling and 3-D array addressing operations, while the load and store unit (LSU) of the CPU is also used to execute a number of graphics data load and store operations, including conditional store operations.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式