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1. 发明授权

US07989844B2 Semiconductor device and method of manufacturing such a device 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07989844B2
公开(公告)日：2011-08-02
申请号：US10545736
申请日：2004-02-12
申请人： Rob Van Dalen , Prabhat Agarwal , Jan Willem Slotboom , Gerrit Elbert Johannes Koops
发明人： Rob Van Dalen , Prabhat Agarwal , Jan Willem Slotboom , Gerrit Elbert Johannes Koops
IPC分类号： H01L29/732 , H01L29/737
CPC分类号： H01L29/66242 , H01L29/7378
摘要： The invention relates to a semiconductor device with a substrate (11) and a semiconductor body (12) with a heterojunction bipolar, in particular npn, transistor with an emitter region (1), a base region (2) and a collector region (3), which are provided with, respectively, a first, a second and a third connection conductor (4, 5, 6), and wherein the bandgap of the base region (2) is smaller than that of the collector region (3) or of the emitter region (1), for example by the use of a silicon-germanium mixed crystal instead of pure silicon in the base region (2). Such a device is characterized by a very high speed, but its transistor shows a relatively low BVeeo. In a device (10) according to the invention the doping flux of the emitter region (1) is locally reduced by a further semiconductor region (20) of the second conductivity type which is embedded in the emitter region (1). In this way, on the one hand, a low-impedance emitter contact is ensured, while locally the Gummel number is increased without the drawbacks normally associated with such an increase. In this way, the hole current in the, npn, transistor is increased and thus the gain is decreased. The relatively high gain of a Si—Ge transistor is responsible for the low BVCeOf which is consequently avoided in a device (10) according to the invention. Preferably the further semiconductor region (20) is recessed in the emitter region (1) and said emitter region (1) preferably comprises a lower doped part that borders on the base region (2) and that is situated below the further semiconductor region (20). The invention also comprises a method of manufacturing a semiconductor device (10) according to the invention.
摘要翻译：本发明涉及具有衬底（11）和具有异质结双极性的半导体本体（12）的半导体器件，特别是具有发射极区域（1），基极区域（2）和集电极区域（3）的npn晶体管），其分别设置有第一，第二和第三连接导体（4,5,6），并且其中所述基极区域（2）的带隙小于所述集电极区域（3）的带隙或的发射极区域（1），例如通过在基极区域（2）中使用硅 - 锗混合晶体代替纯硅。这种器件的特点是非常高的速度，但其晶体管显示相对较低的BVeeo。在根据本发明的器件（10）中，发射极区域（1）的掺杂通量被嵌入在发射极区域（1）中的第二导电类型的另外的半导体区域（20）局部地减小。以这种方式，一方面，确保了低阻抗发射极接触，而局部地增加了Gummel数量，而没有通常与这种增加相关联的缺点。以这种方式，npn晶体管中的空穴电流增加，因此增益降低。 Si-Ge晶体管的相对高的增益负责在本发明的器件（10）中避免的低BVCeOf。优选地，另外的半导体区域（20）凹陷在发射极区域（1）中，并且所述发射极区域（1）优选地包括在基极区域（2）上接合并位于另外的半导体区域（20）下方的下部掺杂部分）。本发明还包括制造根据本发明的半导体器件（10）的方法。

2. 发明授权

US07671447B2 Bipolar transistor and method of manufacturing the same 有权
标题翻译：双极晶体管及其制造方法
公开(公告)号：US07671447B2
公开(公告)日：2010-03-02
申请号：US11632614
申请日：2005-07-07
申请人： Andreas Hubertus Montree , Jan Willem Slotboom , Prabhat Agarwal , Philippe Meunier-Beillard
发明人： Andreas Hubertus Montree , Jan Willem Slotboom , Prabhat Agarwal , Philippe Meunier-Beillard
IPC分类号： H01L23/58
CPC分类号： H01L29/7317 , H01L29/1004 , H01L29/365 , H01L29/66265 , H01L29/735 , H01L2924/0002 , H01L2924/00
摘要： The invention relates to a semiconductor device (10) with a semiconductor body (12) comprising a bipolar transistor with an emitter region (1), a base region (2) and a collector region (3) of, respectively, a first conductivity type, a second conductivity type, opposite to the first conductivity type, and the first conductivity type, wherein, viewed in projection, the emitter region (1) is positioned above or below the base region (2), and the collector region (3) laterally borders the base region (2). According to the invention, the base region (2) comprises a highly doped subregion (2A) the doping concentration of which has a delta-shaped profile in the thickness direction, and said highly doped sub-region (2A) extends laterally as far as the collector region (3). Such a lateral bipolar transistor has excellent high-frequency properties and a relatively high breakdown voltage between the base and collector regions (2, 3), implying that the device is suitable for high power applications. The doping concentration lies preferably between about 1019 and about 1020 at/cm3, and the thickness of the sub-region (2A) lies between 1 and 15 nm and preferably between 1 and 10 nm. The invention also comprises a method of manufacturing such a device (10).
摘要翻译：本发明涉及具有半导体本体（12）的半导体器件（10），该半导体器件（12）包括分别具有第一导电类型的发射极区域（1），基极区域（2）和集电极区域（3），与第一导电类型相反的第二导电类型和第一导电类型，其中，从投影中观察，发射极区域（1）位于基极区域（2）的上方或下方，并且集电极区域（3）横向地邻接基部区域（2）。根据本发明，基极区域（2）包括其掺杂浓度在厚度方向上具有δ形轮廓的高掺杂子区域（2A），并且所述高度掺杂子区域（2A）横向延伸至收集器区域（3）。这种横向双极晶体管在基极和集电极区域（2,3）之间具有优异的高频特性和较高的击穿电压，这意味着该器件适用于高功率应用。掺杂浓度优选介于约1019至约1020 at / cm3，子区（2A）的厚度在1至15nm之间，优选在1至10nm之间。本发明还包括制造这种装置（10）的方法。

3. 发明申请

US20090114950A1 Semiconductor Device and Method of Manufacturing such a Device 审中-公开
标题翻译：半导体装置及其制造方法
公开(公告)号：US20090114950A1
公开(公告)日：2009-05-07
申请号：US11597533
申请日：2005-05-19
申请人： Prabhat Agarwal , Jan Willem Slotboom , Gerben Doornbos
发明人： Prabhat Agarwal , Jan Willem Slotboom , Gerben Doornbos
IPC分类号： H01L21/336 , H01L21/8249 , H01L21/8232 , H01L29/78 , H01L29/80 , H01L21/8234 , H01L21/8248
CPC分类号： H01L21/8249
摘要： The invention relates to a semiconductor device (10) comprising a substrate (11) and a semiconductor body (1) of silicon having a semiconductor layer structure comprising, in succession, a first and a second semiconductor layer (2, 3), and having a surface region of a first conductivity type which is provided with a field effect transistor (M) with a channel of a second conductivity type, opposite to the first conductivity type, wherein the surface region is provided with source and drain regions (4A, 4B) of the second conductivity type for the field effect transistor (M) and with—interposed between said source and drain regions—a channel region (3A) with a lower doping concentration which forms part of the second semiconductor layer (3) and with a buried first-conductivity-type semiconductor region (2A), buried below the channel region (3A), with a doping concentration that is much higher than that of the channel region (3A) and which forms part of the first semiconductor layer (2). According to the invention, the semiconductor body (1) is provided not only with the field effect transistor (M) but also with a bipolar transistor (B) with emitter, base and collector regions (5A, 5B, 5C) of respectively the second, the first and the second conductivity type, and the emitter region (5A) is formed in the second semiconductor layer (3) and the base region (5B) is formed in the first semiconductor layer (2). In this way a Bi(C)MOS IC (10) is obtained which is very suitable for high-frequency applications and which is easy to manufacture using a method according to the invention. Preferably the first semiconductor layer (2) comprises Si—Ge and is delta-doped, whereas the second semiconductor layer (3) comprises strained Si.
摘要翻译：本发明涉及一种半导体器件（10），它包括具有半导体层结构的硅衬底（12）和半导体本体（1），半导体层结构依次包括第一和第二半导体层（2,3），并且具有具有与第一导电类型相反的具有第二导电类型的沟道的场效应晶体管（M）的第一导电类型的表面区域，其中所述表面区域设置有源极和漏极区域（4A，4B））和用于场效应晶体管（M）的第二导电类型，并且插入在所述源极和漏极区之间 - 具有较低掺杂浓度的沟道区（3A），其形成第二半导体层（3）的一部分，并且具有埋入第一导电型半导体区域（2A），其掺杂在沟道区域（3A）的下方，掺杂浓度比沟道区域（3A）的掺杂浓度高得多，并且形成第一半导体层（2）的一部分，。根据本发明，半导体本体（1）不仅设置有场效应晶体管（M），而且还具有双极晶体管（B），发射极，基极和集电极区域（5A，5B，5C）分别为第二第一和第二导电类型和发射极区域（5A）形成在第二半导体层（3）中，并且基极区域（5B）形成在第一半导体层（2）中。以这种方式获得了非常适合于高频应用并且易于使用根据本发明的方法制造的Bi（C）MOS IC（10）。优选地，第一半导体层（2）包括Si-Ge并且是δ掺杂的，而第二半导体层（3）包括应变Si。

4. 发明申请

US20080083968A1 Bipolar Transistor And Method Of Manufacturing The Same 有权
标题翻译：双极晶体管及其制造方法
公开(公告)号：US20080083968A1
公开(公告)日：2008-04-10
申请号：US11632614
申请日：2005-07-07
申请人： Andreas Hubertus Montree , Jan Willem Slotboom , Prabhat Agarwal , Philippe Meunier-Beillard
发明人： Andreas Hubertus Montree , Jan Willem Slotboom , Prabhat Agarwal , Philippe Meunier-Beillard
IPC分类号： H01L27/082 , H01L21/328
CPC分类号： H01L29/7317 , H01L29/1004 , H01L29/365 , H01L29/66265 , H01L29/735 , H01L2924/0002 , H01L2924/00
摘要： The invention relates to a semiconductor device (10) with a semiconductor body (12) comprising a bipolar transistor with an emitter region (1), a base region (2) and a collector region (3) of, respectively, a first conductivity type, a second conductivity type, opposite to the first conductivity type, and the first conductivity type, wherein, viewed in projection, the emitter region (1) is positioned above or below the base region (2), and the collector region (3) laterally borders the base region (2). According to the invention, the base region (2) comprises a highly doped subregion (2A) the doping concentration of which has a delta-shaped profile in the thickness direction, and said highly doped sub-region (2A) extends laterally as far as the collector region (3). Such a lateral bipolar transistor has excellent high-frequency properties and a relatively high breakdown voltage between the base and collector regions (2, 3), implying that the device is suitable for high power applications. The doping concentration lies preferably between about 1019 and about 1020 at/cm3, and the thickness of the sub-region (2A) lies between 1 and 15 nm and preferably between 1 and 10 nm. The invention also comprises a method of manufacturing such a device (10).
摘要翻译：本发明涉及具有半导体本体（12）的半导体器件（10），该半导体器件（12）包括分别具有第一导电类型的发射极区域（1），基极区域（2）和集电极区域（3），与第一导电类型相反的第二导电类型和第一导电类型，其中从投影中看，发射极区域（1）位于基极区域（2）的上方或下方，并且集电极区域（3）横向地邻接基部区域（2）。根据本发明，基极区域（2）包括其掺杂浓度在厚度方向上具有Δ形轮廓的高掺杂子区域（2A），并且所述高掺杂子区域（2A）横向延伸为作为收集器区域（3）。这种横向双极晶体管在基极和集电极区域（2,3）之间具有优异的高频特性和较高的击穿电压，这意味着该器件适用于高功率应用。掺杂浓度优选在/ cm 3和约10 20之间，并且子区域（2A）的厚度）位于1至15nm之间，优选在1至10nm之间。本发明还包括制造这种装置（10）的方法。

5. 发明申请

US20060202229A1 Semiconductor device and method of manufacturing such a device 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20060202229A1
公开(公告)日：2006-09-14
申请号：US10545736
申请日：2004-02-12
申请人： Rob Van Dalen , Prabhat Agarwal , Jan Slotboom , Gerrit Koops
发明人： Rob Van Dalen , Prabhat Agarwal , Jan Slotboom , Gerrit Koops
IPC分类号： H01L31/00
CPC分类号： H01L29/66242 , H01L29/7378
摘要： The invention relates to a semiconductor device with a substrate (11) and a semiconductor body (12) with a heterojunction bipolar, in particular npn, transistor with an emitter region (1), a base region (2) and a collector region (3), which are provided with, respectively, a first, a second and a third connection conductor (4, 5, 6), and wherein the bandgap of the base region (2) is smaller than that of the collector region (3) or of the emitter region (1), for example by the use of a silicon-germanium mixed crystal instead of pure silicon in the base region (2). Such a device is characterized by a very high speed, but its transistor shows a relatively low BVeeo. In a device (10) according to the invention the doping flux of the emitter region (1) is locally reduced by a further semiconductor region (20) of the second conductivity type which is embedded in the emitter region (1). In this way, on the one hand, a low-impedance emitter contact is ensured, while locally the Gummel number is increased without the drawbacks normally associated with such an increase. In this way, the hole current in the, npn, transistor is increased and thus the gain is decreased. The relatively high gain of a Si—Ge transistor is responsible for the low BVCeOf which is consequently avoided in a device (10) according to the invention. Preferably the further semiconductor region (20) is recessed in the emitter region (1) and said emitter region (1) preferably comprises a lower doped part that borders on the base region (2) and that is situated below the further semiconductor region (20). The invention also comprises a method of manufacturing a semiconductor device (10) according to the invention.
摘要翻译：本发明涉及具有衬底（11）和具有异质结双极性的半导体本体（12）的半导体器件，特别是具有发射极区域（1），基极区域（2）和集电极区域（3）的npn晶体管），其分别设置有第一，第二和第三连接导体（4,5,6），并且其中所述基极区域（2）的带隙小于所述集电极区域（3）的带隙或的发射极区域（1），例如通过在基极区域（2）中使用硅 - 锗混合晶体代替纯硅。这种器件的特点是非常高的速度，但其晶体管显示相对较低的BVeeo。在根据本发明的器件（10）中，发射极区域（1）的掺杂通量被嵌入在发射极区域（1）中的第二导电类型的另外的半导体区域（20）局部地减小。以这种方式，一方面，确保了低阻抗发射极接触，而局部地增加了Gummel数量，而没有通常与这种增加相关联的缺点。以这种方式，npn晶体管中的空穴电流增加，因此增益降低。 Si-Ge晶体管的相对高的增益负责在本发明的器件（10）中避免的低BVCeOf。优选地，另外的半导体区域（20）凹陷在发射极区域（1）中，并且所述发射极区域（1）优选地包括在基极区域（2）上接合并位于另外的半导体区域（20）下方的下部掺杂部分）。本发明还包括制造根据本发明的半导体器件（10）的方法。

6. 发明授权

US07915709B2 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07915709B2
公开(公告)日：2011-03-29
申请号：US11658228
申请日：2005-07-07
申请人： Godefridus Adrianus Maria Hurkx , Prabhat Agarwal , Abraham Rudolf Balkenende , Petrus Hubertus Cornelis Magnee , Melanie Maria Hubertina Wagemans , Erik Petrus Antonius Maria Bakkers , Erwin Hijzen
发明人： Godefridus Adrianus Maria Hurkx , Prabhat Agarwal , Abraham Rudolf Balkenende , Petrus Hubertus Cornelis Magnee , Melanie Maria Hubertina Wagemans , Erik Petrus Antonius Maria Bakkers , Erwin Hijzen
IPC分类号： H01L29/66 , H01L21/8222
CPC分类号： H01L29/0804 , B82Y10/00 , H01L29/0665 , H01L29/0673 , H01L29/0676 , H01L29/0821 , H01L29/7378 , Y10S977/936
摘要： The invention relates to a semiconductor device (10) with a semiconductor body (12) comprising a bipolar transistor with an emitter region, a base region and a collector region (1, 2, 3) of, respectively, a first conductivity type, a second conductivity type opposite to the first conductivity type, and the first conductivity type. One of the emitter or collector regions (1, 3) comprises a nanowire (30). The base region (2) has been formed from a layer (20) at the surface of the semiconductor body (12); the other one (3, 1) of the emitter or collector regions (1, 3) has been formed in the semiconductor body (12) below the base region (2). The emitter or collector region (1, 3) comprising the nanowire (30) has been provided on the surface of the semiconductor body (12) such that its longitudinal axis extends perpendicularly to the surface.
摘要翻译：本发明涉及具有半导体本体（12）的半导体器件（10），该半导体器件（12）包括分别具有第一导电类型的发射极区，基极区和集电极区（1,2,3）的双极晶体管，与第一导电类型相反的第二导电类型和第一导电类型。发射极或集电极区域（1,3）中的一个包括纳米线（30）。基底区域（2）由半导体本体（12）表面的层（20）形成; 发射极或集电极区域（1,3）中的另一个（3,1）已经形成在基极区域（2）下方的半导体本体（12）中。包括纳米线（30）的发射极或集电极区域（1,3）已经设置在半导体本体（12）的表面上，使得其纵向轴线垂直于该表面延伸。

7. 发明授权

US07791108B2 Nanowire tunneling transistor 失效
标题翻译：纳米线隧道晶体管
公开(公告)号：US07791108B2
公开(公告)日：2010-09-07
申请号：US12161574
申请日：2007-01-24
申请人： Fred Hurkx , Prabhat Agarwal
发明人： Fred Hurkx , Prabhat Agarwal
IPC分类号： H01L21/336 , H01L21/8235
CPC分类号： H01L29/1054 , B82Y10/00 , H01L29/0665 , H01L29/0673 , H01L29/0676 , H01L29/068 , H01L29/66666 , H01L29/7827 , Y10S977/75 , Y10S977/813 , Y10S977/938
摘要： A transistor comprises a nanowire (22, 22′) having a source (24) and a drain (29) separated by an intrinsic or lowly doped region (26, 28). A potential barrier is formed at the interface of the intrinsic or lowly doped region (26, 28) and one of the source (24) and the drain (29). A gate electrode (32) is provided in the vicinity of the potential barrier such that the height of the potential barrier can be modulated by applying an appropriate voltage to the gate electrode (32).
摘要翻译：晶体管包括具有由本征或低掺杂区域（26,28）分开的源极（24）和漏极（29）的纳米线（22,22'）。在本征或低掺杂区域（26,28）和源极（24）和漏极（29）中的一个的界面处形成势垒。在势垒附近设置栅电极（32），使得可以通过向栅极（32）施加适当的电压来调制势垒的高度。

8. 发明授权

US07538593B2 Circuit and method to convert a single ended signal to duplicated signals 有权
标题翻译：将单端信号转换为重复信号的电路和方法
公开(公告)号：US07538593B2
公开(公告)日：2009-05-26
申请号：US11710270
申请日：2007-02-23
申请人： Prabhat Agarwal , Mayank Goel , Pradip Mandal
发明人： Prabhat Agarwal , Mayank Goel , Pradip Mandal
IPC分类号： G06F1/04
CPC分类号： H03K5/151
摘要： A circuit to convert a single ended signal to differential signals is disclosed. The circuit has two paths with each of the two paths comprising a plurality of stages. The number of stages in each of the two paths is the same. A first path of the two paths includes a buffer stage and at least one inverter stage. A second path of the two paths includes at least two inverter stages. The buffer stage has a delay matched to that of a first inverter stage of the second path. The buffer stage comprises a first pair of transistors comprising a first transistor of a first category operatively connected to a first transistor of a second category with their channel connections being connected in series.
摘要翻译：公开了将单端信号转换为差分信号的电路。该电路具有两条路径，其中两条路径中的每条路径包括多个级。两个路径中的每个路段的数量是相同的。两个路径的第一路径包括缓冲段和至少一个逆变器级。两路径的第二路径包括至少两个逆变器级。缓冲级具有与第二路径的第一反相器级的延迟匹配的延迟。缓冲级包括第一对晶体管，其包括第一类别的第一晶体管，其可操作地连接到第二类别的第一晶体管，其沟道连接串联连接。

9. 发明申请

US20090008631A1 NANOWIRE TUNNELING TRANSISTOR 失效
标题翻译： NANOWIRE隧道晶体管
公开(公告)号：US20090008631A1
公开(公告)日：2009-01-08
申请号：US12161574
申请日：2007-01-24
申请人： Godefridus Andrianus Maria Hurkx , Prabhat Agarwal
发明人： Godefridus Andrianus Maria Hurkx , Prabhat Agarwal
IPC分类号： H01L29/06
CPC分类号： H01L29/1054 , B82Y10/00 , H01L29/0665 , H01L29/0673 , H01L29/0676 , H01L29/068 , H01L29/66666 , H01L29/7827 , Y10S977/75 , Y10S977/813 , Y10S977/938
摘要： A transistor comprises a nanowire (22, 22′) having a source (24) and a drain (29) separated by an intrinsic or lowly doped region (26, 28). A potential barrier is formed at the interface of the intrinsic or lowly doped region (26, 28) and one of the source (24) and the drain (29). A gate electrode (32) is provided in the vicinity of the potential barrier such that the height of the potential barrier can be modulated by applying an appropriate voltage to the gate electrode (32).
摘要翻译：晶体管包括具有由本征或低掺杂区域（26,28）分开的源极（24）和漏极（29）的纳米线（22,22'）。在本征或低掺杂区域（26,28）和源极（24）和漏极（29）中的一个的界面处形成势垒。在势垒附近设置栅电极（32），使得可以通过向栅极（32）施加适当的电压来调制势垒的高度。

10. 发明申请

US20090008566A1 GEIGER MODE AVALANCHE PHOTODIODE 有权
公开(公告)号：US20090008566A1
公开(公告)日：2009-01-08
申请号：US12162999
申请日：2007-01-17
申请人： Prabhat Agarwal , Jan Sonsky , Lasse Juhana Kauppinen
发明人： Prabhat Agarwal , Jan Sonsky , Lasse Juhana Kauppinen
IPC分类号： G01T1/24 , H01L31/107 , H01L31/18
CPC分类号： H01L27/14658 , H01L27/1464 , H01L27/14683 , H01L31/107
摘要： A avalanche mode photodiode array (102) is fabricated using a silicon on insulator wafer and substrate transfer process. The array includes a plurality of photodiodes (100). The photodiodes (100) include an electrically insulative layer (206), a depletion region (204), and first (208) and second (210) doped regions. An interconnection layer (212) includes electrodes (214, 216) which provides electrical connections to the photodiodes. The photodiode array (102) is carried by a handle wafer (217).
摘要翻译：使用绝缘体上硅晶片和衬底转移工艺制造雪崩模式光电二极管阵列（102）。阵列包括多个光电二极管（100）。光电二极管（100）包括电绝缘层（206），耗尽区（204）以及第一（208）和第二（210）掺杂区。互连层（212）包括提供到光电二极管的电连接的电极（214,216）。光电二极管阵列（102）由处理晶片（217）承载。

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