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1. 发明申请

US20070152768A1 Connector with reduced crosstalk 有权
标题翻译：串扰减小的连接器
公开(公告)号：US20070152768A1
公开(公告)日：2007-07-05
申请号：US11321892
申请日：2005-12-29
申请人： Richard Mellitz , John Abbott , Gopal Mundada
发明人： Richard Mellitz , John Abbott , Gopal Mundada
IPC分类号： H01P3/08
CPC分类号： H01R13/6471 , H01R13/6474 , H05K1/0224 , H05K1/0237 , H05K1/0245 , H05K1/025 , H05K1/117 , H05K9/0066 , H05K2201/09236 , H05K2201/093 , H05K2201/0969
摘要： In some embodiments, an circuit card includes an electronic circuit substrate, a ground plane on the electronic circuit substrate, first and second differential signal pads on the electronic circuit substrate, a ground return signal pad associated with the first and second differential signal pads, the ground return signal pad being connected to the ground plane on the electronic substrate, and a cutout structure on the ground plane positioned near a location where the ground return signal pad connects to the ground plane, wherein the cutout structure is configured to direct a ground return path associated with the first and second differential signal pads to the ground return signal pad associated with the first and second differential signal pads. Other embodiments are disclosed and claimed.
摘要翻译：在一些实施例中，电路卡包括电子电路基板，电子电路基板上的接地平面，电子电路基板上的第一和第二差分信号焊盘，与第一和第二差分信号焊盘相关联的接地返回信号焊盘，接地返回信号焊盘连接到电子基板上的接地平面，以及位于靠近接地返回信号焊盘连接到接地平面的位置的接地平面上的切口结构，其中，切除结构被配置为引导接地返回与第一和第二差分信号焊盘相关联的路径到与第一和第二差分信号焊盘相关联的接地返回信号焊盘。公开和要求保护其他实施例。

2. 发明申请

US20070079162A1 Power sequencing 有权
标题翻译：电源排序
公开(公告)号：US20070079162A1
公开(公告)日：2007-04-05
申请号：US11241625
申请日：2005-09-30
申请人： Gopal Mundada , Eugene Nelson
发明人： Gopal Mundada , Eugene Nelson
IPC分类号： G06F1/26
CPC分类号： G06F1/26
摘要： Methods and arrangements to establish power rails for a computer system in accordance with a sequence requirement are disclosed. Embodiments may interconnect voltage regulators for components of a platform in accordance with a sequence requirement for establishing power rails for proper operation of the platform. The voltage regulators may comprise enable inputs for enabling the establishment of power rails and power good signal outputs to indicate establishment of power rails. Some embodiments include interconnections to couple voltage regulators in a series of stages. Power good signals output by voltage regulators in one stage may enable inputs of voltage regulators in a subsequent stage. In many embodiments, such interconnections advantageously implement power sequence requirements with little or no need for glue logic and/or programmable logic devices, reducing costs and space requirements associated with implementing the power sequence. Other embodiments are disclosed and claimed.
摘要翻译：公开了根据序列要求为计算机系统建立电源轨的方法和装置。实施例可以根据用于建立用于平台的适当操作的电源轨的顺序要求来互连用于平台的部件的电压调节器。电压调节器可以包括使能输入，用于实现电力轨道的建立和电力良好信号输出以指示电力轨道的建立。一些实施例包括用于在一系列级中耦合电压调节器的互连。在一个级中由稳压器输出的电源良好信号可以使得在后续阶段中的稳压器的输入。在许多实施例中，这种互连有利地实现功率序列需求，而很少或不需要胶合逻辑和/或可编程逻辑器件，从而降低与实现功率序列相关联的成本和空间要求。公开和要求保护其他实施例。

3. 发明申请

US20060294414A1 System for memory hot swap 有权
标题翻译：内存热插拔系统
公开(公告)号：US20060294414A1
公开(公告)日：2006-12-28
申请号：US11169209
申请日：2005-06-28
申请人： Gopal Mundada , Mark Chubb
发明人： Gopal Mundada , Mark Chubb
IPC分类号： G06F11/00
CPC分类号： G06F11/0751 , G06F11/073
摘要： A system may include a motherboard, a chipset coupled to the motherboard, a memory module mount coupled to the chipset, a power transistor electrically coupled to the memory module mount, a voltage regulator to provide power to the power transistor, and an I/O expander coupled to the motherboard. The I/O expander is to receive instructions from the chipset to selectively control the power transistor to provide the power to the memory module mount.
摘要翻译：系统可以包括母板，耦合到母板的芯片组，耦合到芯片组的存储器模块安装件，电耦合到存储器模块安装座的功率晶体管，向功率晶体管提供功率的电压调节器以及I / O 扩展器耦合到主板。 I / O扩展器将接收来自芯片组的指令，以选择性地控制功率晶体管以向存储器模块安装提供电力。

4. 发明授权

US08549329B2 System power management using memory throttle signal 有权
标题翻译：系统电源管理使用记忆油门信号
公开(公告)号：US08549329B2
公开(公告)日：2013-10-01
申请号：US12347350
申请日：2008-12-31
申请人： Gopal Mundada , Xiuting (Kaleen) Man , Brian Griffith , Viktor D. Vogman , Richard Kaltenbach
发明人： Gopal Mundada , Xiuting (Kaleen) Man , Brian Griffith , Viktor D. Vogman , Richard Kaltenbach
IPC分类号： G06F1/32
CPC分类号： G06F1/28 , G06F1/3225 , G06F11/3058
摘要： According to some embodiments, power information associated with a computing system may be monitored. Based on the monitored power information, it may be determined whether a hardware memory throttling signal will be asserted and/or that a processor power control signal will be asserted.
摘要翻译：根据一些实施例，可以监视与计算系统相关联的功率信息。基于所监视的功率信息，可以确定硬件存储器节流信号是否被断言和/或处理器功率控制信号将被断言。

5. 发明申请

US20100169690A1 SYSTEM POWER MANAGEMENT USING MEMORY THROTTLE SIGNAL 有权
标题翻译：使用存储器电压信号进行系统电源管理
公开(公告)号：US20100169690A1
公开(公告)日：2010-07-01
申请号：US12347350
申请日：2008-12-31
申请人： Gopal Mundada , Xiuting (Kaleen) Man , Brian Griffith , Viktor D. Vogman , Richard Kaltenbach
发明人： Gopal Mundada , Xiuting (Kaleen) Man , Brian Griffith , Viktor D. Vogman , Richard Kaltenbach
IPC分类号： G06F11/30 , G06F1/26
CPC分类号： G06F1/28 , G06F1/3225 , G06F11/3058
摘要： According to some embodiments, power information associated with a computing system may be monitored. Based on the monitored power information, it may be determined whether a hardware memory throttling signal will be asserted and/or that a processor power control signal will be asserted.
摘要翻译：根据一些实施例，可以监视与计算系统相关联的功率信息。基于所监视的功率信息，可以确定硬件存储器节流信号是否被断言和/或处理器功率控制信号将被断言。

6. 发明申请

US20100077238A1 ENERGY EFFICIENCT POWER SUPPLY SYSTEM 审中-公开
标题翻译：能源效率电源系统
公开(公告)号：US20100077238A1
公开(公告)日：2010-03-25
申请号：US12238297
申请日：2008-09-25
申请人： Viktor D. Vogman , Brian Griffith , Gopal Mundada
发明人： Viktor D. Vogman , Brian Griffith , Gopal Mundada
IPC分类号： G06F1/26
CPC分类号： G06F1/263 , G06F1/3203 , G06F1/3296 , Y02D10/172
摘要： An energy efficient power supply system is disclosed. The energy efficient power supply system comprises a plurality of power supply units and the power supply system may be coupled to the control logic. The control logic may be coupled to the power monitor unit. The power monitor unit may determine a power consumption value, which may represent power requirement of a power consuming system such as a computer system. The control logic may determine the power supply units of the plurality of power supply units that are to be activated to provide power to match the power requirement. The control logic may identify the power supply units that may be activated to operate at a maximum efficiency value while providing power specified by the power consumption value.
摘要翻译：公开了一种节能电源系统。节能电源系统包括多个电源单元，并且电源系统可以耦合到控制逻辑。控制逻辑可以耦合到功率监视器单元。功率监视器单元可以确定功耗值，其可以表示诸如计算机系统的功耗系统的功率需求。控制逻辑可以确定要被激活的多个电源单元的电源单元以提供功率以匹配功率需求。控制逻辑可以识别可以被激活以在最大效率值下操作的电源单元，同时提供由功率消耗值指定的功率。

7. 发明授权

US07469353B2 Power sequencing 有权
标题翻译：电源排序
公开(公告)号：US07469353B2
公开(公告)日：2008-12-23
申请号：US11241625
申请日：2005-09-30
申请人： Gopal Mundada , Eugene Nelson
发明人： Gopal Mundada , Eugene Nelson
IPC分类号： G06F1/26 , G06F1/30
CPC分类号： G06F1/26
摘要： Methods and arrangements to establish power rails for a computer system in accordance with a sequence requirement are disclosed. Embodiments may interconnect voltage regulators for components of a platform in accordance with a sequence requirement for establishing power rails for proper operation of the platform. The voltage regulators may comprise enable inputs for enabling the establishment of power rails and power good signal outputs to indicate establishment of power rails. Some embodiments include interconnections to couple voltage regulators in a series of stages. Power good signals output by voltage regulators in one stage may enable inputs of voltage regulators in a subsequent stage. In many embodiments, such interconnections advantageously implement power sequence requirements with little or no need for glue logic and/or programmable logic devices, reducing costs and space requirements associated with implementing the power sequence. Other embodiments are disclosed and claimed.
摘要翻译：公开了根据序列要求为计算机系统建立电源轨的方法和装置。实施例可以根据用于建立用于平台的适当操作的电源轨的顺序要求来互连用于平台的部件的电压调节器。电压调节器可以包括使能输入，用于实现电力轨道的建立和电力良好信号输出以指示电力轨道的建立。一些实施例包括用于在一系列级中耦合电压调节器的互连。在一个级中由稳压器输出的电源良好信号可以使得在后续阶段中的稳压器的输入。在许多实施例中，这种互连有利地实现功率序列需求，而很少或不需要胶合逻辑和/或可编程逻辑器件，从而降低与实现功率序列相关联的成本和空间要求。公开并要求保护其他实施例。

8. 发明授权

US07350089B2 System for memory hot swap 有权
标题翻译：内存热插拔系统
公开(公告)号：US07350089B2
公开(公告)日：2008-03-25
申请号：US11169209
申请日：2005-06-28
申请人： Gopal Mundada , Mark Chubb
发明人： Gopal Mundada , Mark Chubb
IPC分类号： G06F1/00
CPC分类号： G06F11/0751 , G06F11/073
摘要： A system may include a motherboard, a chipset coupled to the motherboard, a memory module mount coupled to the chipset, a power transistor electrically coupled to the memory module mount, a voltage regulator to provide power to the power transistor, and an I/O expander coupled to the motherboard. The I/O expander is to receive instructions from the chipset to selectively control the power transistor to provide the power to the memory module mount.
摘要翻译：系统可以包括母板，耦合到母板的芯片组，耦合到芯片组的存储器模块安装件，电耦合到存储器模块安装座的功率晶体管，向功率晶体管提供功率的电压调节器以及I / O 扩展器耦合到主板。 I / O扩展器将接收来自芯片组的指令，以选择性地控制功率晶体管以向存储器模块安装提供电力。

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