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1. 发明申请

US20050096004A1 Monolithic GPS RF front end integrated circuit 有权
公开(公告)号：US20050096004A1
公开(公告)日：2005-05-05
申请号：US10940597
申请日：2004-09-13
申请人： Robert Tso , Richard McConnell
发明人： Robert Tso , Richard McConnell
IPC分类号： G01S1/00 , H04B1/28 , H04B1/40 , H04B1/06 , H04B7/00
CPC分类号： G01S19/36 , G01S19/18 , H04B1/28
摘要： A highly integrated GPS RF Front End which uses a single conversion stage employs an image rejection mixer stage to eliminate the need for an image reject RF bandpass filter. Also a relatively high sample rate A/D is employed which allows a timeless monolitic IF Filter to be used. The disclosure also discusses a GPS Front End topology that is easily integrated from industry standard building blocks. With the broad variation in potential receiver designs, the present invention includes some specific receiver topologies that lend themselves to a high level of integration. The specific designs presented here are comprised of industry standard building blocks and functions that have been described elsewhere in the related art.

2. 发明申请

US20060055594A1 Method and apparatus for reducing GPS receiver jamming during transmission in a wireless receiver 审中-公开
标题翻译：用于在无线接收机中传输期间减少GPS接收机干扰的方法和装置
公开(公告)号：US20060055594A1
公开(公告)日：2006-03-16
申请号：US11209193
申请日：2005-08-22
申请人： Richard McConnell , Robert Tso
发明人： Richard McConnell , Robert Tso
IPC分类号： G01S5/14 , H04B1/06 , H03D1/04
CPC分类号： G01S19/21 , H04B1/0483 , H04B1/3805 , H04B1/525
摘要： A method and apparatus for minimizing the interference between wireless transmissions and a proximately located or co-located GPS receiver is disclosed. By feedforward of a phase and amplitude adjusted version of the transmitted signal and combining said signal with the composite signal at the input of the GPS receiver, the GPS receiver sensitivity degradation is reduced or eliminated in the case of perfect cancellation, and the GPS receiver is not jammed by the wireless transmissions. The invention allows a single antenna to be implemented for GPS reception and wireless transmission and reception without unduly complicating the diplexing/filtering network required to separate the multiple signals being transmitted and/or received by the single antenna.
摘要翻译：公开了一种用于最小化无线传输与近端定位或共位GPS接收机之间的干扰的方法和装置。通过前馈发送信号的相位和幅度调整版本，并将所述信号与GPS接收机输入端的复合信号相结合，在完全消除的情况下GPS接收机灵敏度降低或消除，GPS接收机不被无线传输卡住。本发明允许单个天线实现用于GPS接收和无线发送和接收，而不会使由单个天线发送和/或接收的多个信号分离所需的双工/滤波网络过度复杂化。

3. 发明授权

US07639724B2 RF converter with multiple mode frequency synthesizer compatible with a 48 Fo GPS baseband processor 有权
标题翻译： RF转换器具有多模式频率合成器，与48 Fo GPS基带处理器兼容
公开(公告)号：US07639724B2
公开(公告)日：2009-12-29
申请号：US10492277
申请日：2002-10-11
申请人： Robert Tso , Noshir Dubash
发明人： Robert Tso , Noshir Dubash
IPC分类号： H04B1/00
CPC分类号： H04B1/0007 , G01S19/36 , H03J1/005 , H03L7/0891 , H03L7/1974 , H03L7/1976 , H04B1/28
摘要： An RF-to-IF converter includes radio frequency (RF) to intermediate frequency (IF) processing circuitry and a frequency synthesizer for generating a local oscillator signal and clocking signals. The frequency synthesizer includes a local oscillator (LO) output coupled to the processing circuitry, a baseband processor clock output, and clock generation circuitry for generating a baseband processor clock with a frequency of approximately 48 fo on the baseband processor clock output, where fo is 1.023 MHz.
摘要翻译： RF-IF转换器包括射频（RF）到中频（IF）处理电路和用于产生本地振荡器信号和时钟信号的频率合成器。频率合成器包括耦合到处理电路的本地振荡器（LO）输出，基带处理器时钟输出和时钟产生电路，用于在基带处理器时钟输出上产生频率约为48μF的基带处理器时钟，其中fo为 1.023MHz。

4. 发明授权

US07512385B2 GPS RF front end IC with programmable frequency synthesizer for use in wireless phones 有权
标题翻译： GPS RF前端IC，带可编程频率合成器，用于无线电话
公开(公告)号：US07512385B2
公开(公告)日：2009-03-31
申请号：US11149436
申请日：2005-06-06
申请人： Robert Tso , Noshir Behli Dubash , Tao Zhang
发明人： Robert Tso , Noshir Behli Dubash , Tao Zhang
IPC分类号： H01Q11/12
CPC分类号： G01S19/36
摘要： A GPS RF Front End IC containing a Programmable Frequency Synthesizer is disclosed. The GPS RF front end IC having a programmable frequency synthesizer allows a relatively fixed internal frequency plan while able to use a number of different reference frequencies provided by the host platform, which can be a wireless phone, or other such device, which can provide an accurate reference frequency signal.
摘要翻译：公开了一种包含可编程频率合成器的GPS RF前端IC。具有可编程频率合成器的GPS RF前端IC允许相对固定的内部频率规划，同时能够使用由主机平台提供的多个不同的参考频率，主机平台可以是无线电话或其他这样的设备，其可以提供准确的参考频率信号。

5. 发明申请

US20060141969A1 L1/L2 GPS receiver 有权
标题翻译： L1 / L2 GPS接收机
公开(公告)号：US20060141969A1
公开(公告)日：2006-06-29
申请号：US11360322
申请日：2006-02-22
申请人： Noshir Dubash , Robert Tso
发明人： Noshir Dubash , Robert Tso
IPC分类号： H04B1/18 , H04B1/10
CPC分类号： G01S19/32 , G01S19/34 , H04B1/005 , H04B1/28 , H04B1/406
摘要： In a system and method for simultaneously receiving or switching between dual frequency carrier signals in a GPS receiver, the GPS receiver is adapted to utilize different harmonics of a sub-harmonic frequency generator, which may include a lower frequency voltage controlled oscillator (VCO) to detect the L1 and L2 GPS carriers. A sub-harmonic mixer may be used to simultaneously down convert the L1 and L2 signals to a lower intermediate frequency (IF). A second mixer may be an image reject (IR) mixer used to separate the downconverted L1 and L2 signals. This mixer may be configured to simultaneously monitor the L1 and L2 signals, or to switch between the L1 and L2 signals. High frequency switching is not required of the radio frequency (RF) input or local oscillator signals, and simultaneous L1 and L2 reception is enabled without and 3 dB image noise degradation. This system and method minimizes the RF components and power dissipation in a dual frequency GPS receiver, while optimizing the functionality and performance.
摘要翻译：在用于同时接收或切换GPS接收机中的双频载波信号的系统和方法中，GPS接收器适于利用次谐波频率发生器的不同谐波，其可以包括低频压控振荡器（VCO）检测L1和L2 GPS载波。可以使用副谐波混频器来同时将L1和L2信号下变频到较低的中频（IF）。第二混频器可以是用于分离下变频的L1和L2信号的图像抑制（IR）混频器。该混频器可以被配置为同时监视L1和L2信号，或者在L1和L2信号之间切换。射频（RF）输入或本地振荡器信号不需要高频切换，同时启用L1和L2接收，无3ddB图像噪声降低。该系统和方法在优化功能和性能的同时，最大限度地减少双频GPS接收机中的射频组件和功耗。

6. 发明授权

US5729576A Interference canceling receiver 失效
标题翻译：干扰消除接收机
公开(公告)号：US5729576A
公开(公告)日：1998-03-17
申请号：US641452
申请日：1996-04-30
申请人： Wade J. Stone , Robert Tso , John M. Burns
发明人： Wade J. Stone , Robert Tso , John M. Burns
IPC分类号： G01S7/36 , G01S13/75 , H04B1/10 , H04L27/156 , H04L27/14 , H04B15/04
CPC分类号： G01S7/36 , G01S13/758 , H04B1/10 , H04L27/156
摘要： A receiver used in a system having a transmitter (10) that sends an exciting signal to a remote transponder (18) is configured to receive a relatively weak signal from the transponder and to cancel out relatively high level interference from the transmission itself. A received frequency shift keying signal is fed to a tuned amplifier (22) for preliminary analog signal conditioning, and thence fed to an analog to digital converter (24). The output of the analog to digital converter is integrated (26) over a selected number of clock pulses and then dumped into a quarter rate quadrature demodulator (60) that multiplies the integrated signal by the same signal delayed by one clock interval. Undesired artifacts generated in the demodulator (60) are removed by a cascade of comb filters (70), and the demodulated digital output is available as the desired output of the receiver. The several clock signals of the system are all referenced from a basic exciter signal that itself gives rise to the transmitted interference signal so that the interference and all timing signals are approximately synchronous.
摘要翻译：在具有向远程转发器（18）发送激励信号的发射机（10）的系统中使用的接收机被配置为从应答器接收相对较弱的信号，并且消除来自传输本身的相对较高级别的干扰。接收的频移键控信号被馈送到用于初步模拟信号调理的调谐放大器（22），然后馈送到模数转换器（24）。模数转换器的输出在选定数量的时钟脉冲上积分（26），然后转储成四分之一速率正交解调器（60），该积分解调器将积分信号乘以延迟一个时钟间隔的相同信号。在解调器（60）中产生的不想要的伪影通过梳状滤波器（70）的级联去除，并且解调的数字输出可用作接收机的期望输出。系统的几个时钟信号都来自基本的激励器信号，其本身引起发射的干扰信号，使得干扰和所有定时信号近似同步。

7. 发明授权

US06961019B1 Method and apparatus for reducing GPS receiver jamming during transmission in a wireless receiver 失效
标题翻译：用于在无线接收机中传输期间减少GPS接收机干扰的方法和装置
公开(公告)号：US06961019B1
公开(公告)日：2005-11-01
申请号：US09920898
申请日：2001-08-02
申请人： Richard Joseph McConnell , Robert Tso
发明人： Richard Joseph McConnell , Robert Tso
IPC分类号： G01S19/21 , G01S1/00 , H04B1/10 , H04B1/38 , H04B1/44 , H04B1/52 , G01S5/14
CPC分类号： G01S19/21 , H04B1/3805 , H04B1/525
摘要： A method and apparatus for minimizing the interference between wireless transmissions and a proximately located or co-located GPS receiver is disclosed. By feedforward of a phase and amplitude adjusted version of the transmitted signal and combining said signal with the composite signal at the input of the GPS receiver, the GPS receiver sensitivity degradation is reduced or eliminated in the case of perfect cancellation, and the GPS receiver is not jammed by the wireless transmissions. The invention allows a single antenna to be implemented for GPS reception and wireless transmission and reception without unduly complicating the diplexing/filtering network required to separate the multiple signals being transmitted and/or received by the single antenna.
摘要翻译：公开了一种用于最小化无线传输与近端定位或共位GPS接收机之间的干扰的方法和装置。通过前馈发送信号的相位和幅度调整版本，并将所述信号与GPS接收机输入端的复合信号相结合，在完全消除的情况下GPS接收机灵敏度降低或消除，GPS接收机不被无线传输卡住。本发明允许单个天线实现用于GPS接收和无线发送和接收，而不会使由单个天线发送和/或接收的多个信号分离所需的双工/滤波网络过度复杂化。

8. 发明申请

US20050080564A1 Rf converter with multiple mode frequency synthesizer compatible with a 48 fo gps baseband processor 有权
标题翻译：具有多模式频率合成器的Rf转换器，与48个fo gps基带处理器兼容
公开(公告)号：US20050080564A1
公开(公告)日：2005-04-14
申请号：US10492277
申请日：2002-10-11
申请人： Robert Tso , Noshir Dubash
发明人： Robert Tso , Noshir Dubash
IPC分类号： G01S1/00 , H03J1/00 , H03L7/089 , H03L7/197 , H04B1/28 , G01C21/26
CPC分类号： H04B1/0007 , G01S19/36 , H03J1/005 , H03L7/0891 , H03L7/1974 , H03L7/1976 , H04B1/28
摘要： An RF-to-IF converter includes radio frequency (RF) to intermediate frequency (IF) processing circuitry and a frequency synthesizer for generating a local oscillator signal and clocking signals. The frequency synthesizer includes a local oscillator (LO) output coupled to the processing circuitry, a baseband processor clock output, and clock generation circuitry for generating a baseband processor clock with a frequency of approximately 48 fo on the baseband processor clock output, where fo is 1.023 MHz.
摘要翻译： RF-IF转换器包括射频（RF）到中频（IF）处理电路和用于产生本地振荡器信号和时钟信号的频率合成器。频率合成器包括耦合到处理电路的本地振荡器（LO）输出，基带处理器时钟输出和时钟产生电路，用于在基带处理器时钟输出上产生频率约为48μF的基带处理器时钟，其中fo为 1.023MHz。

9. 发明申请

US20050063505A1 Fractional-r frequency synthesizer 有权
标题翻译：分数r频率合成器
公开(公告)号：US20050063505A1
公开(公告)日：2005-03-24
申请号：US10494322
申请日：2002-10-31
申请人： Noshir Dubash , Robert Tso
发明人： Noshir Dubash , Robert Tso
IPC分类号： G06F7/68 , H03L7/099 , H03L7/18 , H03L7/197 , H03D3/24
CPC分类号： G06F7/68 , H03L7/0995 , H03L7/0996 , H03L7/1806 , H03L7/1976
摘要： A fractional-R synthesizer having a divider (406) with rational increments and configurable in rational steps able to generate a plurality of frequencies in rational increments from a reference frequency. The fractional-R synthesizer is included in the feedback loop of a PLL. Preferably a Delta-Sigma modulator (412) is responsive to an input representing a fractional value and clocked by the output of said divider (406) to produce an output signal that modulates the divide ratio of the variable rational divider (406).
摘要翻译：分数R合成器具有具有合理增量的分频器（406），并且可以在有理步骤中配置，能够以合理的增量从参考频率产生多个频率。分数R合成器包含在PLL的反馈环路中。优选地，Δ-Σ调制器（412）响应于表示分数值并由所述分频器（406）的输出计时的输入，以产生调制可变有理分频器（406）的分频比的输出信号。

10. 发明授权

US5382848A Digital integrated time of arrival detector 失效
标题翻译：数字集成时间到达检测器
公开(公告)号：US5382848A
公开(公告)日：1995-01-17
申请号：US943632
申请日：1992-09-11
申请人： Lawrence M. Burns , Robert Tso
发明人： Lawrence M. Burns , Robert Tso
IPC分类号： H03K5/08 , H03K5/153
CPC分类号： H03K5/086
摘要： A time of arrival detector for an analog pulse signal digitizes the pulse, digitally delays the digitized signal in one path and converts the delayed signal back to a delayed analog version of the input signal. In a second path an undelayed analog version of the input signal is provided. A scaling offset is established to scale the delayed signal larger than the undelayed signal, and the delayed and undelayed signals are then compared to establish a time of arrival for the input pulse. A delta modulator is preferably used to provide the digitized signal, and also to provide the undelayed analog version of the input signal as the smoothed output of an integrator within the delta modulator. The undelayed modulator output is preferably attenuated by -3 dB, with the pulse's time of arrival obtained from the time at which the delayed analog signal rises above the undelayed but attenuated signal. The time of arrival of the pulse's trailing edge is obtained in a similar manner by scaling the undelayed signal larger than the delayed signal, and comparing the two resulting signals to detect when the undelayed signal falls below the delayed signal. The pulse width can then be determined by subtracting the pulse's time of arrival from its time of termination.
摘要翻译：模拟脉冲信号的到达时间检测器将脉冲数字化，数字化地延迟一个路径中的数字化信号，并将延迟的信号转换回延迟的模拟版本的输入信号。在第二路径中，提供了输入信号的未延迟的模拟版本。建立缩放偏移以缩放比未延迟信号大的延迟信号，然后比较延迟和未延迟的信号以建立输入脉冲的到达时间。 Δ调制器优选地用于提供数字化信号，并且还提供输入信号的未延迟模拟版本作为Δ调制器内积分器的平滑输出。优选地，衰减衰减的调制器输出衰减-3dB，其中从延迟的模拟信号上升到未延迟但衰减的信号之上的时间获得的脉冲的到达时间。通过缩放比延迟信号大的未延迟信号，并且比较两个结果信号以检测何时未延迟的信号低于延迟信号，以类似的方式获得脉冲后沿的到达时间。然后可以通过从其终止时间减去脉冲的到达时间来确定脉冲宽度。

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