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1. 发明授权

US09093395B2 Method and system for local control of defect density in gallium nitride based electronics 有权
标题翻译：用于局部控制氮化镓基电子学缺陷密度的方法和系统
公开(公告)号：US09093395B2
公开(公告)日：2015-07-28
申请号：US13225345
申请日：2011-09-02
申请人： David P. Bour , Linda Romano , Thomas R. Prunty , Isik C. Kizilyalli , Hui Nie , Andrew P. Edwards , Richard J. Brown
发明人： David P. Bour , Linda Romano , Thomas R. Prunty , Isik C. Kizilyalli , Hui Nie , Andrew P. Edwards , Richard J. Brown
IPC分类号： H01L29/20 , H01L21/302 , H01L29/32 , H01L29/66 , H01L29/808 , H01L29/861 , H01L29/872
CPC分类号： H01L29/32 , H01L21/02389 , H01L21/0254 , H01L29/2003 , H01L29/6609 , H01L29/66143 , H01L29/66212 , H01L29/66446 , H01L29/66909 , H01L29/66924 , H01L29/8083 , H01L29/861 , H01L29/872
摘要： A diode includes a substrate characterized by a first dislocation density and a first conductivity type, a first contact coupled to the substrate, and a masking layer having a predetermined thickness and coupled to the semiconductor substrate. The masking layer comprises a plurality of continuous sections and a plurality of openings exposing the substrate and disposed between the continuous sections. The diode also includes an epitaxial layer greater than 5 μm thick coupled to the substrate and the masking layer. The epitaxial layer comprises a first set of regions overlying the plurality of openings and characterized by a second dislocation density and a second set of regions overlying the set of continuous sections and characterized by a third dislocation density less than the first dislocation density and the second dislocation density. The diode further includes a second contact coupled to the epitaxial layer.
摘要翻译：二极管包括以第一位错密度和第一导电类型为特征的衬底，耦合到衬底的第一触点和具有预定厚度并耦合到半导体衬底的掩模层。掩模层包括多个连续部分和暴露基板并设置在连续部分之间的多个开口。二极管还包括大于5μm厚的外延层，其与衬底和掩模层耦合。外延层包括覆盖多个开口的第一组区域，其特征在于第二位错密度和覆盖该组连续区段的第二组区域，其特征在于第三位错密度小于第一位错密度和第二位错密度。二极管还包括耦合到外延层的第二接触。

2. 发明授权

US08716716B2 Method and system for junction termination in GaN materials using conductivity modulation 有权
标题翻译：使用电导率调制的GaN材料中的结端接方法和系统
公开(公告)号：US08716716B2
公开(公告)日：2014-05-06
申请号：US13334742
申请日：2011-12-22
申请人： Hui Nie , Andrew P. Edwards , Donald R. Disney , Richard J. Brown , Isik C. Kizilyalli
发明人： Hui Nie , Andrew P. Edwards , Donald R. Disney , Richard J. Brown , Isik C. Kizilyalli
IPC分类号： H01L21/335 , H01L29/20
CPC分类号： H01L21/0254 , H01L21/2654 , H01L21/266 , H01L29/0611 , H01L29/0642 , H01L29/0692 , H01L29/2003 , H01L29/66204 , H01L29/66212 , H01L29/66924 , H01L29/8083 , H01L29/861 , H01L29/872
摘要： A semiconductor structure includes a GaN substrate having a first surface and a second surface opposing the first surface. The GaN substrate is characterized by a first conductivity type and a first dopant concentration. The semiconductor structure also includes a first GaN epitaxial layer of the first conductivity type coupled to the second surface of the GaN substrate and a second GaN epitaxial layer of a second conductivity type coupled to the first GaN epitaxial layer. The second GaN epitaxial layer includes an active device region, a first junction termination region characterized by an implantation region having a first implantation profile, and a second junction termination region characterized by an implantation region having a second implantation profile.
摘要翻译：半导体结构包括具有第一表面和与第一表面相对的第二表面的GaN衬底。 GaN衬底的特征在于第一导电类型和第一掺杂剂浓度。半导体结构还包括耦合到GaN衬底的第二表面的第一导电类型的第一GaN外延层和耦合到第一GaN外延层的第二导电类型的第二GaN外延层。第二GaN外延层包括有源器件区，第一结端接区，其特征在于具有第一注入分布的注入区，以及第二结终端区，其特征在于具有第二注入分布的注入区。

3. 发明授权

US08716078B2 Method and system for a gallium nitride vertical JFET with self-aligned gate metallization 有权
标题翻译：具有自对准栅极金属化的氮化镓垂直JFET的方法和系统
公开(公告)号：US08716078B2
公开(公告)日：2014-05-06
申请号：US13468325
申请日：2012-05-10
申请人： Donald R. Disney , Richard J. Brown , Hui Nie
发明人： Donald R. Disney , Richard J. Brown , Hui Nie
IPC分类号： H01L21/337
CPC分类号： H01L29/8083 , H01L29/2003 , H01L29/66909
摘要： A semiconductor device includes a III-nitride substrate and a first III-nitride epitaxial layer coupled to the III-nitride substrate and comprising a drift region, a channel region, and an extension region. The channel region is separated from the III-nitride substrate by the drift region. The channel region is characterized by a first width. The extension region is separated from the drift region by the channel region. The extension region is characterized by a second width less than the first width. The semiconductor device also includes a second III-nitride epitaxial layer coupled to a top surface of the extension region, a III-nitride gate structure coupled to a sidewall of the channel region and laterally self-aligned with respect to the extension region, and a gate metal structure in electrical contact with the III-nitride gate structure and laterally self-aligned with respect to the extension region.
摘要翻译：半导体器件包括III族氮化物衬底和耦合到III族氮化物衬底并且包括漂移区，沟道区和延伸区的第一III族氮化物外延层。沟道区域通过漂移区域与III族氮化物衬底分离。通道区域的特征在于第一宽度。延伸区域通过沟道区域与漂移区域分离。延伸区域的特征在于小于第一宽度的第二宽度。半导体器件还包括耦合到延伸区域的顶表面的第二III族氮化物外延层，耦合到沟道区域的侧壁并相对于延伸区域横向自对准的III族氮化物栅极结构，以及栅极金属结构与III族氮化物栅极结构电接触并且相对于延伸区域横向自对准。

4. 发明授权

US08558242B2 Vertical GaN-based metal insulator semiconductor FET 失效
标题翻译：垂直GaN基金属绝缘体半导体FET
公开(公告)号：US08558242B2
公开(公告)日：2013-10-15
申请号：US13315705
申请日：2011-12-09
申请人： Richard J. Brown , Hui Nie , Andrew Edwards , Isik Kizilyalli , David Bour , Thomas Prunty , Linda Romano , Madhan Raj
发明人： Richard J. Brown , Hui Nie , Andrew Edwards , Isik Kizilyalli , David Bour , Thomas Prunty , Linda Romano , Madhan Raj
IPC分类号： H01L29/20
CPC分类号： H01L29/7813 , H01L29/2003 , H01L29/41775 , H01L29/66727 , H01L29/66734 , H01L29/7828
摘要： A semiconductor structure includes a III-nitride substrate having a top surface and an opposing bottom surface and a first III-nitride layer of a first conductivity type coupled to the top surface of the III-nitride substrate. The semiconductor structure also includes a second III-nitride layer of a second conductivity type coupled to the first III-nitride layer along a vertical direction and a third III-nitride layer of a third conductivity type coupled to the second III-nitride layer along the vertical direction. The semiconductor structure further includes a first trench extending through a portion of the third III-nitride layer to the first III-nitride layer, a second trench extending through another portion of the third III-nitride layer to the second III-nitride layer, and a first metal layer coupled to the second and the third III-nitride layers.
摘要翻译：半导体结构包括具有顶表面和相对底表面的III族氮化物衬底和与III族氮化物衬底的顶表面耦合的第一导电类型的第一III族氮化物层。半导体结构还包括沿着垂直方向耦合到第一III族氮化物层的第二导电类型的第二III族氮化物层，以及沿着沿着垂直方向耦合到第二III族氮化物层的第三导电类型的第三III族氮化物层垂直方向半导体结构还包括延伸穿过第三III族氮化物层的一部分到第一III族氮化物层的第一沟槽，延伸穿过第三III族氮化物层的另一部分到第二III族氮化物层的第二沟槽，以及耦合到第二和第三III族氮化物层的第一金属层。

5. 发明申请

US20130161705A1 METHOD AND SYSTEM FOR A GAN VERTICAL JFET WITH SELF-ALIGNED SOURCE AND GATE 有权
标题翻译：具有自对准源和门的GAN垂直JFET的方法和系统
公开(公告)号：US20130161705A1
公开(公告)日：2013-06-27
申请号：US13334514
申请日：2011-12-22
申请人： Don Disney , Isik C. Kizilyalli , Hui Ne , Linda Romano , Richard J. Brown , Madhan Raj
发明人： Don Disney , Isik C. Kizilyalli , Hui Ne , Linda Romano , Richard J. Brown , Madhan Raj
IPC分类号： H01L29/808 , H01L21/337
CPC分类号： H01L29/66924 , H01L21/027 , H01L21/283 , H01L21/308 , H01L29/1095 , H01L29/2003 , H01L29/402 , H01L29/66446 , H01L29/66893 , H01L29/66909 , H01L29/66916 , H01L29/7832 , H01L29/808 , H01L29/8083 , H01L29/8086
摘要： A semiconductor device includes a III-nitride substrate, a first III-nitride epitaxial layer coupled to the III-nitride substrate and having a mesa, and a second III-nitride epitaxial layer coupled to a top surface of the mesa. The semiconductor device further includes a III-nitride gate structure coupled to a side surface of the mesa, and a spacer configured to provide electrical insulation between the second III-nitride epitaxial layer and the III-nitride gate structure.
摘要翻译：半导体器件包括III族氮化物衬底，耦合到III族氮化物衬底并具有台面的第一III族氮化物外延层和耦合到台面的顶表面的第二III族氮化物外延层。半导体器件还包括耦合到台面的侧表面的III族氮化物栅极结构，以及被配置为在第二III族氮化物外延层和III族氮化物栅极结构之间提供电绝缘的间隔物。

6. 发明申请

US20130146885A1 Vertical GaN-Based Metal Insulator Semiconductor FET 失效
标题翻译：垂直GaN基金属绝缘子半导体FET
公开(公告)号：US20130146885A1
公开(公告)日：2013-06-13
申请号：US13315705
申请日：2011-12-09
申请人： Richard J. Brown , Hui Nei , Andrew Edwards , Isik Kizilyalli , David Bour , Thomas Prunty , Linda Romano , Madhan Raj
发明人： Richard J. Brown , Hui Nei , Andrew Edwards , Isik Kizilyalli , David Bour , Thomas Prunty , Linda Romano , Madhan Raj
IPC分类号： H01L29/20 , H01L21/20
CPC分类号： H01L29/7813 , H01L29/2003 , H01L29/41775 , H01L29/66727 , H01L29/66734 , H01L29/7828
摘要： A semiconductor structure includes a III-nitride substrate having a top surface and an opposing bottom surface and a first III-nitride layer of a first conductivity type coupled to the top surface of the III-nitride substrate. The semiconductor structure also includes a second III-nitride layer of a second conductivity type coupled to the first III-nitride layer along a vertical direction and a third III-nitride layer of a third conductivity type coupled to the second III-nitride layer along the vertical direction. The semiconductor structure further includes a first trench extending through a portion of the third III-nitride layer to the first III-nitride layer, a second trench extending through another portion of the third III-nitride layer to the second III-nitride layer, and a first metal layer coupled to the second and the third III-nitride layers.
摘要翻译：半导体结构包括具有顶表面和相对底表面的III族氮化物衬底和与III族氮化物衬底的顶表面耦合的第一导电类型的第一III族氮化物层。半导体结构还包括沿着垂直方向耦合到第一III族氮化物层的第二导电类型的第二III族氮化物层，以及沿着沿着垂直方向耦合到第二III族氮化物层的第三导电类型的第三III族氮化物层垂直方向半导体结构还包括延伸穿过第三III族氮化物层的一部分到第一III族氮化物层的第一沟槽，延伸穿过第三III族氮化物层的另一部分到第二III族氮化物层的第二沟槽，以及耦合到第二和第三III族氮化物层的第一金属层。

7. 发明申请

US20130087879A1 SCHOTTKY DIODE WITH BURIED LAYER IN GAN MATERIALS 有权
公开(公告)号：US20130087879A1
公开(公告)日：2013-04-11
申请号：US13270641
申请日：2011-10-11
申请人： Andrew Edwards , Hui Nie , Isik C. Kizilyalli , Richard J. Brown , David P. Bour , Linda Romano , Thomas R. Prunty
发明人： Andrew Edwards , Hui Nie , Isik C. Kizilyalli , Richard J. Brown , David P. Bour , Linda Romano , Thomas R. Prunty
IPC分类号： H01L29/47 , H01L21/20
CPC分类号： H01L29/66143 , H01L21/26546 , H01L29/0615 , H01L29/0619 , H01L29/0692 , H01L29/08 , H01L29/2003 , H01L29/404 , H01L29/66083 , H01L29/66204 , H01L29/66212 , H01L29/66416 , H01L29/66924 , H01L29/8083 , H01L29/868 , H01L29/872
摘要： A semiconductor structure includes a III-nitride substrate characterized by a first conductivity type and having a first side and a second side opposing the first side, a III-nitride epitaxial layer of the first conductivity type coupled to the first side of the III-nitride substrate, and a plurality of III-nitride epitaxial structures of a second conductivity type coupled to the III-nitride epitaxial layer. The semiconductor structure further includes a III-nitride epitaxial formation of the first conductivity type coupled to the plurality of III-nitride epitaxial structures, and a metallic structure forming a Schottky contact with the III-nitride epitaxial formation and coupled to at least one of the plurality of III-nitride epitaxial structures.

8. 发明申请

US20130087878A1 METHOD OF FABRICATING A GAN MERGED P-I-N SCHOTTKY (MPS) DIODE 有权
标题翻译：制备GAN MERGED P-I-N肖特基（MPS）二极体的方法
公开(公告)号：US20130087878A1
公开(公告)日：2013-04-11
申请号：US13270625
申请日：2011-10-11
申请人： Andrew P. Edwards , Hui Nie , Isik C. Kizilyalli , Linda Romano , David P. Bour , Richard J. Brown , Thomas R. Prunty
发明人： Andrew P. Edwards , Hui Nie , Isik C. Kizilyalli , Linda Romano , David P. Bour , Richard J. Brown , Thomas R. Prunty
IPC分类号： H01L29/47 , H01L21/20
CPC分类号： H01L29/66143 , H01L21/046 , H01L21/0495 , H01L29/2003 , H01L29/47 , H01L29/475 , H01L29/868 , H01L29/872
摘要： A semiconductor structure includes a III-nitride substrate with a first side and a second side opposing the first side. The III-nitride substrate is characterized by a first conductivity type and a first dopant concentration. The semiconductor structure also includes a III-nitride epitaxial structure including a first III-nitride epitaxial layer coupled to the first side of the III-nitride substrate and a plurality of III-nitride regions of a second conductivity type. The plurality of III-nitride regions have at least one III-nitride epitaxial region of the first conductivity type between each of the plurality of III-nitride regions. The semiconductor structure further includes a first metallic structure electrically coupled to one or more of the plurality of III-nitride regions and the at least one III-nitride epitaxial region. A Schottky contact is created between the first metallic structure and the at least one III-nitride epitaxial region.
摘要翻译：半导体结构包括具有第一侧和与第一侧相对的第二侧的III族氮化物衬底。 III族氮化物衬底的特征在于第一导电类型和第一掺杂剂浓度。半导体结构还包括III族氮化物外延结构，其包括耦合到III族氮化物衬底的第一侧的第一III族氮化物外延层和多个第二导电类型的III族氮化物区域。多个III族氮化物区域在多个III族氮化物区域中的每一个之间具有至少一个第一导电类型的III族氮化物外延区域。半导体结构还包括电耦合到多个III族氮化物区域和至少一个III族氮化物外延区域中的一个或多个的第一金属结构。在第一金属结构和至少一个III族氮化物外延区之间产生肖特基接触。

9. 发明申请

US20130015552A1 Electrical Isolation Of High Defect Density Regions In A Semiconductor Device 审中-公开
标题翻译：半导体器件中高缺陷密度区域的电隔离
公开(公告)号：US20130015552A1
公开(公告)日：2013-01-17
申请号：US13180758
申请日：2011-07-12
申请人： Isik C. Kizilyalli , David P. Bour , Richard J. Brown , Andrew P. Edwards , Hui Nie , Linda T. Romano
发明人： Isik C. Kizilyalli , David P. Bour , Richard J. Brown , Andrew P. Edwards , Hui Nie , Linda T. Romano
IPC分类号： H01L29/36 , H01L21/761 , H01L29/06 , H01L21/762
CPC分类号： H01L21/761 , H01L21/76224 , H01L29/2003 , H01L29/32 , H01L29/861
摘要： Embodiments of the invention include a III-nitride semiconductor layer including a first portion having a first defect density and a second portion having a second defect density. The first defect density is greater than the second defect density. An insulating material is disposed over the first portion. The insulating material is not formed on or is removed from the second portion.
摘要翻译：本发明的实施例包括具有第一缺陷密度的第一部分和具有第二缺陷密度的第二部分的III族氮化物半导体层。第一缺陷密度大于第二缺陷密度。绝缘材料设置在第一部分上。绝缘材料不形成在第二部分上或从第二部分移除。

10. 发明授权

US4828467A Supercharger and rotor and shaft arrangement therefor 失效
标题翻译：增压器和转子及轴的布置
公开(公告)号：US4828467A
公开(公告)日：1989-05-09
申请号：US145017
申请日：1988-01-19
申请人： Richard J. Brown
发明人： Richard J. Brown
IPC分类号： B23P19/02 , F04C29/00 , F16B4/00 , F16D1/072 , F16D1/08
CPC分类号： B23P19/02 , F04C29/0078 , F16B4/004 , F16D1/072 , F16D1/0858 , Y10T29/49245 , Y10T29/49833 , Y10T29/49945 , Y10T403/4966 , Y10T403/70
摘要： A Roots-type blower or supercharger (11) is provided of the type including a pair of meshed, lobed rotors (21) and (23) which are press-fit onto a pair of shafts (25) and (27), respectively. Each of the rotors includes a first bore portion (65), and a second bore portion (69), while the shaft defines a first shaft portion (67), press-fit into the first bore portion, and a second shaft portion (71), press-fit into the second bore portion. The shaft defines a close-clearance land (63), disposed forwardly of the first shaft portion. Disposed between the close-clearance land and the first shaft portion is an entrapment groove (75) which is sized so that it can contain all of the material sheared from the surface of the first bore portion (65) during the press-fit operation. The close-clearance land (63) cooperates with the first bore portion to define a close-clearance, able to retain the sheared material within the entrapment groove, and not permit it to pass forwardly, or be outside of the rotor/shaft subassembly.
摘要翻译：这种类型的罗茨式鼓风机或增压器（11）设置有一对分别压配合在一对轴（25）和（27）上的一对啮合的叶片转子（21）和（23）。每个转子包括第一孔部分（65）和第二孔部分（69），而轴限定第一轴部分（67），压配合到第一孔部分中，第二轴部分（71）），压配合到第二孔部分中。轴限定了设置在第一轴部分的前方的近距离空隙（63）。在紧邻间隙区域和第一轴部分之间设置有捕获槽（75），其尺寸设计成使得其可以在压配合操作期间容纳从第一孔部分（65）的表面剪切的所有材料。紧邻间隙（63）与第一孔部分配合以形成一个能够将剪切材料保持在捕获槽内的闭合间隙，并且不允许其向前通过或者在转子/轴子组件外部。

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