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1. 发明授权

US06765617B1 Optoelectronic camera and method for image formatting in the same 失效
标题翻译：光电相机和图像格式化方法相同
公开(公告)号：US06765617B1
公开(公告)日：2004-07-20
申请号：US09341311
申请日：1999-07-08
申请人： Reidar E. Tangen , Hans Gude Gudesen , Per-Erik Nordal , Geirr I. Leistad
发明人： Reidar E. Tangen , Hans Gude Gudesen , Per-Erik Nordal , Geirr I. Leistad
IPC分类号： H04N5225
CPC分类号： H04N9/045 , H01L27/14627 , H04N5/3415 , H04N2209/046
摘要： An optoelectronic camera comprises an objective system formed by a number of optical active structures (L), particularly refractive structures in the form of microlenses or lenslets provided in an array. A detector device (D) is assigned to the lens array and comprises detectors (Dn) formed by sensor elements (E) which define pixels in the optical image. Each detector (Dn) defines a sample of the optical image and optimally all samples are used to generate a digital image. The optoelectronic camera may be realized as a color image camera, particularly for recording images in an RGB system. In a method for digital electronic formatting of an image recorded with the optoelectronic camera, zoom and pan functions are implemented in the camera.
摘要翻译：光电照相机包括由许多光学有源结构（L）形成的物镜系统，特别是以阵列形式提供的微透镜或小透镜形式的折射结构。检测器装置（D）被分配给透镜阵列，并且包括由限定光学图像中的像素的传感器元件（E）形成的检测器（Dn）。每个检测器（Dn）定义光学图像的样本，并且最佳地使用所有样本来产生数字图像。光电相机可以被实现为彩色图像相机，特别是用于在RGB系统中记录图像。在用光电相机记录的图像的数字电子格式化方法中，在相机中实现变焦和平移功能。

2. 发明授权

US06380597B1 Read-only memory and read-only memory device 失效
标题翻译：只读存储器和只读存储器件
公开(公告)号：US06380597B1
公开(公告)日：2002-04-30
申请号：US09297521
申请日：1999-09-13
申请人： Hans Gude Gudesen , Per-Erik Nordal , Geirr I. Leistad
发明人： Hans Gude Gudesen , Per-Erik Nordal , Geirr I. Leistad
IPC分类号： G11C1706
CPC分类号： G11C13/0014 , B82Y10/00 , G11C11/5664 , G11C11/5692 , G11C13/0016 , H01L27/112
摘要： A read-only memory is made electrically addressable over a passive conductor matrix, wherein the volume between intersection of two conductors (2; 4) in the matrix defines a memory cell (5). Data are stored as impedance values in the memory cells. The memory cells (5) comprise either an isolating material (6) which provides high impedance or one or more inorganic or organic semiconductors (9), preferably with an anisotropic conducting property. The semiconductor material (9) forms a diode junction at the interface to a metallic conductor (2; 4) in the matrix. By suitable arrangement of respectively the isolating material (6) and semiconductor material (9) in the memory cells these may be given a determined impedance value which may be read electrically and corresponds to logical values in a binary or multi-valued code. One or more read-only memories (ROM) may be provided on a semiconductor substrate (1) which also comprises driver and control circuits (13), to accomplish a read-only memory device. The device may be realized either planar or also volumetrically by stacking several read-only memories (ROM) in horizontal layers (15) and connecting them with the substrate (1) via addressing buses.
摘要翻译：只读存储器在无源导体矩阵上可电寻址，其中矩阵中两个导体（2; 4）的相交之间的体积限定了存储单元（5）。数据作为阻抗值存储在存储单元中。存储单元（5）包括提供高阻抗的隔离材料（6）或一个或多个无机或有机半导体（9），优选具有各向异性导电性能。半导体材料（9）在与基体中的金属导体（2; 4）的界面处形成二极管结。通过分别将存储单元中的隔离材料（6）和半导体材料（9）适当地布置，这些可以被给予确定的阻抗值，其可以被电读取并对应于二值或多值代码中的逻辑值。可以在也包括驱动器和控制电路（13）的半导体衬底（1）上提供一个或多个只读存储器（ROM），以实现只读存储器件。该装置可以通过在水平层（15）中堆叠几个只读存储器（ROM）并且经由寻址总线将其与衬底（1）连接来实现平面或体积式地实现。

3. 发明授权

US06787825B1 Data storage and processing apparatus, and method for fabricating the same 有权
标题翻译：数据存储和处理装置及其制造方法
公开(公告)号：US06787825B1
公开(公告)日：2004-09-07
申请号：US09463906
申请日：2001-01-02
申请人： Hans Gude Gudesen , Per-Erik Nordal , Geirr I. Leistad , Johan Carlsson , Göran Gustafsson , Michael O Thompson
发明人： Hans Gude Gudesen , Per-Erik Nordal , Geirr I. Leistad , Johan Carlsson , Göran Gustafsson , Michael O Thompson
IPC分类号： H01L2980
CPC分类号： H01L21/02686 , G11C5/02 , G11C17/06 , H01L21/02532 , H01L21/02689 , H01L21/2026 , H01L21/768 , H01L21/76888 , H01L21/76894 , H01L21/8221 , H01L27/0688 , H01L27/1021 , H01L27/105 , H01L27/1052 , H01L27/108 , H01L27/11 , H01L27/11502 , H01L51/0001 , H01L51/0024 , H01L2924/0002 , H01L2924/00
摘要： A data storage/processing apparatus includes ROM and/or WORM and/or REWRITEABLE memory modules and/or processing modules provided as a single main layer or multiple main layers on top of a substrate. Transistors and/or diodes operate the apparatus. In one set of embodiments, at least some of the transistors and/or diodes are provided on or in the substrate. In another set of embodiments, at least some of the layers on the top of the substrate include low-temperature compatible organic materials and/or low temperature compatible processes inorganic films, and the transistors and/or diodes need not be disposed on or in the substrate. In a related fabricating method, the memory and/or processing modules are provided on the substrate by depositing the layers in successive steps under thermal conditions that avoid subjecting an already-deposited, processed underlying layers to static or dynamic temperatures exceeding given stability limits, particularly with regard to organic materials.
摘要翻译：数据存储/处理装置包括在基板顶部上作为单个主层或多个主层提供的ROM和/或WORM和/或REWRITEABLE存储器模块和/或处理模块。晶体管和/或二极管操作该装置。在一组实施例中，晶体管和/或二极管中的至少一些设置在衬底上或衬底中。在另一组实施例中，衬底顶部上的至少一些层包括低温兼容的有机材料和/或低温兼容的无机膜，并且晶体管和/或二极管不需要被置于或基质。在相关制造方法中，存储器和/或处理模块通过在热条件下的连续步骤中沉积层而提供在衬底上，避免了已经沉积的经处理的下层在超过给定稳定极限的静态或动态温度下，特别是关于有机材料。

4. 发明授权

US06776806B2 METHOD FOR GENERATING ELECTRICALLY CONDUCTING AND/OR SEMICONDUCTING STRUCTURES IN TWO OR THREE DIMENSIONS, A METHOD FOR ERASING THE SAME STRUCTURES AND AN ELECTRIC FIELD GENERATOR/MODULATOR FOR USE WITH THE METHOD FOR GENERATING 失效
标题翻译：用于在两个或三个尺寸上产生电导体和/或半导体结构的方法，用于消除相同结构的方法和用于生成方法的电场发生器/调制器
公开(公告)号：US06776806B2
公开(公告)日：2004-08-17
申请号：US09978043
申请日：2001-10-17
申请人： Hans Gude Gudesen , Per-Erik Nordal , Geirr I. Leistad
发明人： Hans Gude Gudesen , Per-Erik Nordal , Geirr I. Leistad
IPC分类号： H01L21306
CPC分类号： H01L51/0001 , H01L21/768 , H01L21/76888 , H01L21/76894 , H01L21/8221 , H01L51/0024 , H01L2924/0002 , Y10T29/41 , H01L2924/00
摘要： A method for generating electrically conducting and/or semiconducting structures in three dimensions in a matrix that includes two or more materials in spatially separated material structures is disclosed. An electric field is applied to the separate material structure and the field is modulated spatially according to a protocol. The protocol represents a predetermined pattern of electrically conducting and/or semiconducting structures that are generated in the material structure in response to the field. The matrix composed by the material structures includes structures of this kind in three dimensions.
摘要翻译：公开了一种用于在包括空间分离的材料结构中的两种或更多种材料的基体中产生三维导电和/或半导体结构的方法。电场被施加到单独的材料结构，并且根据协议对场进行空间调制。该协议表示响应于场而在材料结构中产生的导电和/或半导体结构的预定图案。由材料结构构成的矩阵在三维中包括这种结构。

5. 发明授权

US06724511B2 Matrix-addressable optoelectronic apparatus and electrode means in the same 失效
标题翻译：矩阵寻址光电子器件和电极装置相同
公开(公告)号：US06724511B2
公开(公告)日：2004-04-20
申请号：US10292661
申请日：2002-11-13
申请人： Hans Gude Gudesen , Geirr I. Leistad , Per-Erik Nordal
发明人： Hans Gude Gudesen , Geirr I. Leistad , Per-Erik Nordal
IPC分类号： G02F100
CPC分类号： G11C11/42 , G02F1/134336 , H01L27/156 , H01L27/307 , H01L27/3281 , H01L2251/5392
摘要： In a matrix-addressable optoelectronic apparatus which includes a functional medium in the form of an optoelectronically active material provided in a global layer in sandwich between a first and second electrode with parallel strip-like electrodes wherein the electrodes of the second electrode are oriented at an angle to the electrodes of the first electrode, functional elements are formed in the active material where respective electrodes overlap and correspond to optically active pixels in a display device or pixels in an optical detector, depending upon the active material used. In each of the first and second electrode, the electrodes are provided in a dense parallel configuration and mutually insulated by a thin film with a thickness that is only a fraction of the width of the electrodes.
摘要翻译：在一种矩阵寻址光电子装置中，该光电子装置包括在具有平行条状电极的第一和第二电极之间夹层的全局层中设置为光电活性材料形式的功能介质，其中第二电极的电极定向为取决于所使用的活性材料，在活性材料中形成功能元件，其中各个电极重叠并对应于显示装置中的光学有源像素或光学检测器中的像素。在第一和第二电极中的每一个中，电极以致密的平行构造设置，并且通过薄膜相互绝缘，厚度仅为电极宽度的一部分。

6. 发明授权

US06403396B1 Method for generation of electrically conducting or semiconducting structures in three dimensions and methods for erasure of the same structures 失效
标题翻译：用于在三维中产生导电或半导体结构的方法以及用于擦除结构的方法
公开(公告)号：US06403396B1
公开(公告)日：2002-06-11
申请号：US09381995
申请日：1999-09-28
申请人： Hans Gude Gudesen , Per-Erik Nordal , Geirr I. Leistad
发明人： Hans Gude Gudesen , Per-Erik Nordal , Geirr I. Leistad
IPC分类号： H01L5140
CPC分类号： H01L51/0001 , H01L21/768 , H01L21/76888 , H01L21/76894 , H01L21/8221 , H01L51/0024 , H01L2924/0002 , Y10T29/41 , H01L2924/00
摘要： Electrically conducting and/or semiconducting structures are generated in three dimensions in a composite matrix including two or more materials provided in spatially separate and homogenous material structures. Materials undergo specific physical and/or chemical changes causing transition from electrically non-conducing to electrically conducting and semiconducting state. The material structures are radiated with a given intensity or frequency characteristic adapted to the specific response of the material. Spatially modulating the radiation according to a protocol representing a pattern of electrically conducing and semiconducting structures in the relevant material structures generates the two dimensional electrically conducting and semiconducting structures in the material structure. The composite matrix is provided with electrically conducting and semiconducting structures in three dimensions. Spectral ranges of the radiation include gamma, x-ray, ultraviolet, visible light, inferred, and microwave. Particle radiation used for irradiation includes elementary particles including protons, neutrons, electrons, ions, molecules, and material aggregates.
摘要翻译：导电和/或半导体结构在三维生成复合基质中，包括在空间上分离和均匀的材料结构中提供的两种或多种材料。材料经历特定的物理和/或化学变化，导致从电导通到导电和半导体状态的转变。材料结构以适合材料的特定响应的给定强度或频率特性辐射。根据表示相关材料结构中导电和半导体结构的图案的协议对辐射进行空间调制，在材料结构中产生二维导电和半导体结构。复合矩阵在三维空间中提供导电和半导体结构。辐射的光谱范围包括γ，X射线，紫外线，可见光，推测和微波。用于照射的粒子辐射包括包括质子，中子，电子，离子，分子和材料聚集体的基本粒子。

7. 发明授权

US6005791A Optical logic element and optical logic device 失效
标题翻译：光逻辑元件和光逻辑器件
公开(公告)号：US6005791A
公开(公告)日：1999-12-21
申请号：US11522
申请日：1998-03-02
申请人： Hans Gude Gudesen , Per-Erik Nordal , Geirr I. Leistad
发明人： Hans Gude Gudesen , Per-Erik Nordal , Geirr I. Leistad
IPC分类号： G02F3/00 , G02F3/02 , G11C7/00 , G11C11/56 , G11C13/00 , G11C13/02 , G11C13/04
CPC分类号： G11C13/0014 , B82Y10/00 , G02F3/02 , G11C11/5664 , G11C13/00 , G11C13/0016 , G11C13/04 , G11C7/005
摘要： Addressable optical logic elements contain an optical memory substance, wherein, under the influence of an impressed magnetic, electromagnetic or electrical field or supplied energy, the memory substance can transfer from one physical or chemical state to a second physical or chemical state, wherein a physical or chemical state is assigned a specific logic value, and wherein a change in the logic element's physical or chemical state causes a change in the logic value and is implemented by the logic element being accessed and addressed magnetically, electromagnetically, electrically or optically for writing, reading, storing, erasing and switching of an assigned logic value.The optical logic device is especially usable for storing data or performing logic and arithmetic operations, wherein the device includes a plurality of optical logic elements, wherein the optical logic elements particularly are multistate, multistable optical logic elements, and even more particularly proximity-addressable optical logic elements, including an optical memory substance, wherein, under the influence of an impressed magnetic, electromagnetic or electrical field or supplied energy, the memory substance can transfer from one physical or chemical state to a second physical or chemical state, wherein a physical or chemical state is assigned a specific logic value, and wherein a change in the logic element's physical or chemical state causes a change in the logic value and is implemented by the logic element being accessed and addressed magnetically, electromagnetically, electrically or optically for writing, reading, storing, erasing and switching of an assigned logic value.
摘要翻译： PCT No.PCT / NO97 / 00154 Sec。 371日期1998年3月2日 102（e）1998年3月2日PCT 1997年6月12日PCT公布。公开号WO97 / 48009 日期1997年12月18日适用的光学逻辑元件包含光学记忆物质，其中在受到外加的磁场，电磁场或电场或供应的能量的影响下，记忆物质可以从一个物理或化学状态转移到第二物理或化学状态，其中物理或化学状态被分配特定逻辑值，并且其中所述逻辑元件的物理或化学状态的变化导致所述逻辑值的改变，并且被所述逻辑元件实现，并被磁性地，电磁地，电或光学地用于写入，读取，存储，擦除和切换分配的逻辑值。光学逻辑器件特别可用于存储数据或执行逻辑和算术运算，其中该器件包括多个光学逻辑元件，其中光学逻辑元件特别是多状态，多态光学逻辑元件，甚至更具体地是接近寻址光学逻辑元件，包括光学记忆物质，其中在受到外加的磁场，电磁场或电场或所提供的能量的影响下，存储物质可以从一个物理或化学状态转移到第二物理或化学状态，其中物理或化学状态被分配一个特定的逻辑值，并且其中逻辑元件的物理或化学状态的改变导致逻辑值的变化，并且被逻辑元件实现，被逻辑元件被磁性，电磁学，电学地或光学地用于写入，读取，存储，擦除和切换分配的逻辑值。

8. 发明授权

US06937500B2 Method for operating a ferroelectric of electret memory device, and a device of this kind 有权
标题翻译：操作驻极体存储装置的铁电体的方法以及这种装置
公开(公告)号：US06937500B2
公开(公告)日：2005-08-30
申请号：US10659428
申请日：2003-09-11
申请人： Hans Gude Gudesen , Per-Erik Nordal , Geirr I. Leistad , Per Bröms , Per Sandström , Mats Johansson
发明人： Hans Gude Gudesen , Per-Erik Nordal , Geirr I. Leistad , Per Bröms , Per Sandström , Mats Johansson
IPC分类号： G11C11/22
CPC分类号： G11C11/22
摘要： A matrix-addressable ferroelectric or electret memory device and a method of operating are explained. The method includes applying a first plurality of voltage difference across a first and a second set of electrodes in the memory when data are read, and applying a second plurality of voltage differences when data are refreshed or rewritten. The first and second plurality of voltage differences correspond to sets of potential levels comprising time sequences of voltage pulses. At least one parameter indicative of a change in a memory cell response is used for determining at least one correction factor for the voltage pulses, whereby the pulse parameter is adjusted accordingly. The memory device comprises means for determining the at least one parameter, a calibration memory connected with means for determining the correction factor, and control circuits for adjusting pulse parameters as applied to read and write operations in the memory device.
摘要翻译：说明矩阵寻址铁电或驻极体存储器件及其操作方法。该方法包括当读取数据时在存储器中的第一和第二组电极上施加第一多个电压差，以及当刷新或重写数据时施加第二多个电压差。第一和第二多个电压差对应于包括电压脉冲的时间序列的电位电平集合。指示存储器单元响应的变化的至少一个参数用于确定电压脉冲的至少一个校正因子，从而相应地调整脉冲参数。存储器件包括用于确定至少一个参数的装置，与用于确定校正因子的装置连接的校准存储器以及用于调整应用于存储器件中的读和写操作的脉冲参数的控制电路。

9. 发明授权

US06236587B1 Read-only memory and read-only memory devices 失效
标题翻译：只读存储器和只读存储器件
公开(公告)号：US06236587B1
公开(公告)日：2001-05-22
申请号：US09297467
申请日：1999-09-13
申请人： Hans Gude Gudesen , Per-Erik Nordal , Geirr I. Leistad
发明人： Hans Gude Gudesen , Per-Erik Nordal , Geirr I. Leistad
IPC分类号： G11C1706
CPC分类号： G11C13/0014 , B82Y10/00 , G11C11/5664 , G11C11/5692 , G11C13/0016 , H01L27/112
摘要： A read-only memory is made electrically addressable over a passive conductor matrix, wherein at least a portion of the volume between intersection of two conductors (2;4) in the matrix defines a memory cell (5) in the read-only memory. Data are stored as impedance values in the memory cells. The memory cells (5) comprise either an isolating material (6) which provides high impedance or one or more inorganic or organic semiconductors (9), preferably with an anisotropic conducting property. The semiconductor material (9) forms a diode junction at the interface to a metallic conductor (2;4) in the matrix. By suitable arrangement of respectively the isolating material (6) and semiconductor material (9) in the memory cells these may be given a determined impedance value which may be read electrically and corresponds to logical values in a binary or multi-valued code. The read-only memory device may be realized either as planar or also volumetrically by stacking several read-only memories (ROM) above each other and connecting them with the substrate (1) via addressing buses (14). Such read-only memory devices may be implemented on memory cards with standard card interfaces and used for storage of source information.
摘要翻译：只读存储器在无源导体矩阵上可电寻址，其中在矩阵中的两个导体（2; 4）的相交之间的体积的至少一部分限定了只读存储器中的存储器单元（5）。数据作为阻抗值存储在存储单元中。存储单元（5）包括提供高阻抗的隔离材料（6）或一个或多个无机或有机半导体（9），优选具有各向异性导电性能。半导体材料（9）在与基体中的金属导体（2; 4）的界面处形成二极管结。通过分别将存储单元中的隔离材料（6）和半导体材料（9）适当地布置，这些可以被给予确定的阻抗值，其可以被电读取并对应于二值或多值代码中的逻辑值。只读存储器件可以通过堆叠多个彼此之间的多个只读存储器（ROM）而通过寻址总线（14）与基板（1）连接来实现平面或体积。这种只读存储器件可以在具有标准卡接口的存储卡上实现并用于存储源信息。

10. 发明授权

US07248524B2 Operating temperature optimization in a ferroelectric or electret memory 失效
标题翻译：在铁电或驻极体记忆中的工作温度优化
公开(公告)号：US07248524B2
公开(公告)日：2007-07-24
申请号：US11168375
申请日：2005-06-29
申请人： Per-Erik Nordal , Geirr I. Leistad , Per Bröms , Hans Gude Gudesen
发明人： Per-Erik Nordal , Geirr I. Leistad , Per Bröms , Hans Gude Gudesen
IPC分类号： G11C7/04
CPC分类号： G11C29/021 , G11C11/22 , G11C29/02 , G11C29/028 , G11C2029/5002
摘要： In a heating and temperature control system for a data storage apparatus comprising at least one matrix-addressable ferroelectric or electret memory device, Joule heating means are provided in the memory device, a temperature determining means is connected with controller circuitry and the controller circuitry is connected with an external power supply, which controlled by the former powers the Joule heating means to achieve a selected operating temperature. In a method for operating the heating and temperature control system an ambient or instant temperature of the memory device is determined and compared with the set nominal optimal temperature, and the difference between these temperatures is used in a predefined algorithm for establishing control parameters for the application of power to the Joule heating means to achieve the selected operating temperature in the memory device during an addressing operation thereto.
摘要翻译：在包括至少一个可矩阵寻址的铁电或驻极体存储装置的数据存储装置的加热和温度控制系统中，在存储装置中提供焦耳加热装置，温度确定装置与控制器电路连接，并且控制器电路被连接具有外部电源，由前者的焦炭控制，焦耳加热意味着实现选定的工作温度。在用于操作加热和温度控制系统的方法中，确定存储器件的环境温度或即时温度并将其与设定的标称最佳温度进行比较，并且在用于建立应用的控制参数的预定义算法中使用这些温度之间的差异的焦耳加热装置的功率，以在其寻址操作期间实现存储装置中的选定的工作温度。

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