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1. 发明授权

US5581110A Integrated circuit with trenches and an oxygen barrier layer 失效
标题翻译：具有沟槽和氧阻隔层的集成电路
公开(公告)号：US5581110A
公开(公告)日：1996-12-03
申请号：US516114
申请日：1995-08-17
申请人： Reda R. Razouk , Kulwant S. Egan , Wipawan Yindeepol , Waclaw C. Koscielniak
发明人： Reda R. Razouk , Kulwant S. Egan , Wipawan Yindeepol , Waclaw C. Koscielniak
IPC分类号： H01L21/3105 , H01L21/334 , H01L21/762 , H01L27/12
CPC分类号： H01L29/66181 , H01L21/3105 , H01L21/76264 , H01L21/76275 , H01L21/76286
摘要： A trench which has walls intersecting a surface of a semiconductor substrate and an oxidation/diffusion barrier layer lining the walls is disclosed. The oxidation/diffusion barrier extends over the edges of the trench to prevent, for example, stress defects in the trench corners and vertical bird's beak formation within the trench. A filler material such as polysilicon is deposited within the trench followed by the deposition of a planarizing layer over the trench. After heat is applied, the planarizing layer flows to form a planarized layer over the trench. Using high pressure and phosphosilicate glass for the planarizing layer, the planarizing layer flows appropriately at low temperatures for short times.
摘要翻译：公开了具有与半导体衬底的表面相交的壁和衬在壁上的氧化/扩散阻挡层的沟槽。氧化/扩散屏障在沟槽的边缘上延伸，以防止例如沟槽中的应力缺陷和沟槽内的垂直鸟嘴形成。在沟槽内沉积诸如多晶硅的填充材料，随后在沟槽上沉积平坦化层。在施加热量之后，平坦化层流动以在沟槽上形成平坦化层。使用高压磷硅玻璃作平坦化层，平坦化层在低温下适当地流动短时间。

2. 发明授权

US5911109A Method of forming an integrated circuit including filling and planarizing a trench having an oxygen barrier layer 失效
标题翻译：形成集成电路的方法，包括填充和平坦化具有氧阻隔层的沟槽
公开(公告)号：US5911109A
公开(公告)日：1999-06-08
申请号：US800012
申请日：1997-02-13
申请人： Reda R. Razouk , Kulwant S. Egan , Wipawan Yindeepol , Waclaw C. Koscielniak
发明人： Reda R. Razouk , Kulwant S. Egan , Wipawan Yindeepol , Waclaw C. Koscielniak
IPC分类号： H01L21/3105 , H01L21/334 , H01L21/762 , H01L21/62
CPC分类号： H01L29/66181 , H01L21/3105 , H01L21/76264 , H01L21/76275 , H01L21/76286
摘要： A trench which has walls intersecting a surface of a semiconductor substrate and an oxidation/diffusion barrier layer lining the walls is disclosed. The oxidation/diffusion barrier extends over the edges of the trench to prevent, for example, stress defects in the trench corners and vertical bird's beak formation within the trench. A filler material such as polysilicon is deposited within the trench followed by the deposition of a planarizing layer over the trench. After heat is applied, the planarizing layer flows to form a planarized layer over the trench. Using high pressure and phosphosilicate glass for the planarizing layer, the planarizing layer flows appropriately at low temperatures for short times.
摘要翻译：公开了具有与半导体衬底的表面相交的壁和衬在壁上的氧化/扩散阻挡层的沟槽。氧化/扩散屏障在沟槽的边缘上延伸，以防止例如沟槽中的应力缺陷和沟槽内的垂直鸟嘴形成。在沟槽内沉积诸如多晶硅的填充材料，随后在沟槽上沉积平坦化层。在施加热量之后，平坦化层流动以在沟槽上形成平坦化层。使用高压磷硅玻璃作平坦化层，平坦化层在低温下适当地流动短时间。

3. 发明授权

US6020246A Forming a self-aligned epitaxial base bipolar transistor 失效
标题翻译：形成自对准外延基极双极晶体管
公开(公告)号：US6020246A
公开(公告)日：2000-02-01
申请号：US42430
申请日：1998-03-13
申请人： Waclaw C. Koscielniak , Kulwant S. Egan , Jayasimha S. Prasad
发明人： Waclaw C. Koscielniak , Kulwant S. Egan , Jayasimha S. Prasad
IPC分类号： H01L21/331 , H01L29/10 , H01L29/732
CPC分类号： H01L29/66287 , H01L29/1004 , H01L29/732
摘要： An improved method and an apparatus for forming a self-aligned epitaxial base bipolar transistor in a semiconductor material is disclosed. The method of the invention involves forming an intrinsic base region formed by growing an epitaxial semiconductor material over a collector region. A raised sacrificial emitter core is then formed on the intrinsic base region followed by depositing a substantially conformal spacer layer over the sacrificial emitter core. Next, the spacer material is anisotropically etched such that a protective spacer ring is formed about the sacrificial emitter core. An extrinsic base is then formed by implanting dopant into the epitaxial base region wherein the sacrificial emitter core and the spacer ring preserve an emitter region. The spacer ring also serves to self-align the extrinsic base region to the emitter region. The protective sacrificial emitter core and spacer ring are then removed. The self-aligned epitaxial base bipolar transistor is then formed by doping the emitter region.
摘要翻译：公开了一种用于在半导体材料中形成自对准外延基极双极晶体管的改进方法和装置。本发明的方法涉及形成通过在收集器区域上生长外延半导体材料而形成的本征基极区域。然后在本征基极区上形成升高的牺牲发射极核心，然后在牺牲发射极核心上沉积基本上保形的间隔层。接下来，间隔材料被各向异性地蚀刻，使得围绕牺牲发射极芯形成保护性间隔环。然后通过将掺杂剂注入到外延基极区域中形成外部基极，其中牺牲发射极芯和间隔环保留发射极区域。间隔环还用于将外部碱性区域自对准至发射极区域。然后去除保护性牺牲发射极芯和间隔环。然后通过掺杂发射极区域形成自对准外延基极双极晶体管。

4. 发明授权

US06329698B1 Forming a self-aligned epitaxial base bipolar transistor 有权
标题翻译：形成自对准外延基极双极晶体管
公开(公告)号：US06329698B1
公开(公告)日：2001-12-11
申请号：US09399911
申请日：1999-09-21
申请人： Waclaw C. Koscielniak , Kulwant S. Egan , Jayasimha S. Prasad
发明人： Waclaw C. Koscielniak , Kulwant S. Egan , Jayasimha S. Prasad
IPC分类号： H01K27082
CPC分类号： H01L29/66287 , H01L29/1004 , H01L29/732
摘要： An improved method and an apparatus for forming a self-aligned epitaxial base bipolar transistor in a semiconductor material is disclosed. The method of the invention involves forming an intrinsic base region formed by growing an epitaxial semiconductor material over a collector region. A raised sacrificial emitter core is then formed on the intrinsic base region followed by depositing a substantially conformal spacer layer over the sacrificial emitter core. Next, the spacer material is anisotropically etched such that a protective spacer ring is formed about the sacrificial emitter core. An extrinsic base is then formed by implanting dopant into the epitaxial base region wherein the sacrificial emitter core and the spacer ring preserve an emitter region. The spacer ring also serves to self-align the extrinsic base region to the emitter region. The protective sacrificial emitter core and spacer ring are then removed. The self-aligned epitaxial base bipolar transistor is then formed by doping the emitter region.
摘要翻译：公开了一种用于在半导体材料中形成自对准外延基极双极晶体管的改进方法和装置。本发明的方法涉及形成通过在收集器区域上生长外延半导体材料而形成的本征基极区域。然后在本征基极区上形成升高的牺牲发射极核心，然后在牺牲发射极核心上沉积基本上保形的间隔层。接下来，间隔材料被各向异性地蚀刻，使得围绕牺牲发射极芯形成保护性间隔环。然后通过将掺杂剂注入到外延基极区域中形成外部基极，其中牺牲发射极芯和间隔环保留发射极区域。间隔环还用于将外部碱性区域自对准至发射极区域。然后去除保护性牺牲发射极芯和间隔环。然后通过掺杂发射极区域形成自对准外延基极双极晶体管。

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