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1. 发明申请

US20060044057A1 Class-D amplifier having high order loop filtering 审中-公开
标题翻译：具有高阶环路滤波的D类放大器
公开(公告)号：US20060044057A1
公开(公告)日：2006-03-02
申请号：US10928528
申请日：2004-08-26
申请人： Rahmi Hezar , Baher Haroun , Brett Forejt , Srinath Ramaswamy
发明人： Rahmi Hezar , Baher Haroun , Brett Forejt , Srinath Ramaswamy
IPC分类号： H03F3/38
CPC分类号： H03F3/2173 , H03F1/34 , H03F3/217 , H03F2200/331
摘要： An amplifier having an active and passive gain stage connect to a load for driving a load according to a system analog input. A first embodiment of the amplifier in accordance with the present invention includes a logic network connected between a comparator network and a switching system, wherein the comparator network connects to the passive gain stage. Specifically, the active gain stage may include an active filter connected to receive an analog or digital input and provide a difference between the analog or digital input and the feedback signal relative to the gain factor of a gain unit connected to the active filter. The passive gain stage includes a passive filter. The logic network generates at least one switching signal which controls the switching system that includes at least one switching device to selectively provide power to the load. An output signal from the switching system provides output for the amplifier and is fed back to the active gain stage. In another embodiment, the output is a two-level signal and the passive and active filters are second order low pass filters, where the gain factor is about 25 or more. In yet another embodiment, the gain factor is approximately 250. Moreover, the amplifier may include a digital delta-sigma modulator connected to supply a two level input.
摘要翻译：具有有源和无源增益级的放大器根据系统模拟输入连接到用于驱动负载的负载。根据本发明的放大器的第一实施例包括连接在比较器网络和交换系统之间的逻辑网络，其中比较器网络连接到被动增益级。具体地，有源增益级可以包括连接到接收模拟或数字输入的有源滤波器，并且相对于连接到有源滤波器的增益单元的增益因子，提供模拟或数字输入与反馈信号之间的差异。被动增益级包括无源滤波器。逻辑网络生成至少一个切换信号，其控制包括至少一个开关装置的开关系统以选择性地向负载提供电力。来自开关系统的输出信号为放大器提供输出并反馈到有源增益级。在另一个实施例中，输出是两电平信号，无源和有源滤波器是二阶低通滤波器，其中增益因子约为25或更大。在另一个实施例中，增益因子为大约250.此外，放大器可以包括连接以提供两级输入的数字Δ-Σ调制器。

2. 发明授权

US08350623B2 Variable gain amplifier 有权
标题翻译：可变增益放大器
公开(公告)号：US08350623B2
公开(公告)日：2013-01-08
申请号：US13047505
申请日：2011-03-14
申请人： Brett Forejt , Jeff Berwick , David J. Baldwin
发明人： Brett Forejt , Jeff Berwick , David J. Baldwin
IPC分类号： H03F3/45
CPC分类号： H03F3/45654 , H03F3/45179 , H03F2203/45528 , H03F2203/45562 , H03F2203/45594 , H03G1/0029 , H03G1/007
摘要： An apparatus and method are provided. Generally, an input signal is applied across a main path (through an input network) and across a cancellation path (through a cancellation circuit). The cancellation circuit subtracts a cancellation current from the main path as part of the control mechanism, where the magnitude of the cancellation current is based on a gain control signal (that has been linearized to follow a control voltage).
摘要翻译：提供了一种装置和方法。通常，输入信号跨越主路径（通过输入网络）并跨越抵消路径（通过消除电路）施加。消除电路从主路径减去作为控制机构的一部分的消除电流，其中消除电流的大小基于增益控制信号（已被线性化以跟随控制电压）。

3. 发明授权

US07528760B2 Class D analog-to-digital converter 有权
标题翻译： D类模数转换器
公开(公告)号：US07528760B2
公开(公告)日：2009-05-05
申请号：US11627635
申请日：2007-01-26
申请人： Brett Forejt
发明人： Brett Forejt
IPC分类号： H03M1/50
CPC分类号： G04F10/005 , H03M1/504
摘要： A new analog-to-digital (ADC) circuit and architecture and the corresponding method of implementation are provided. The analog input signal is converted into a modulated pulse stream such as by a pulse-width-modulation scheme. The time-duration width of the pulses are measured by a TDC (time-to-digital converter) and converted to a digital binary representation that is directly correlated with the voltage amplitude of the analog input signal. The circuit implementation is substantially free of switches and circuit issues such as associated with sigma-delta and switched-capacitor techniques for ADC's.
摘要翻译：提供了一种新的模数（ADC）电路和架构以及相应的实现方法。模拟输入信号被转换成调制脉冲流，例如通过脉冲宽度调制方案。脉冲的持续时间宽度由TDC（时间 - 数字转换器）测量，并转换成与模拟输入信号的电压幅度直接相关的数字二进制表示。电路实现基本上没有开关和电路问题，例如与ADC的Σ-Δ和开关电容技术相关联。

4. 发明授权

US07679444B2 Differential amplifier system 有权
标题翻译：差分放大器系统
公开(公告)号：US07679444B2
公开(公告)日：2010-03-16
申请号：US12259024
申请日：2008-10-27
申请人： Brett Forejt
发明人： Brett Forejt
IPC分类号： H03F3/45
CPC分类号： H03F3/45183 , H03F3/45645 , H03F2203/45364 , H03F2203/45644
摘要： One embodiment of the invention includes a differential amplifier circuit. A first input stage generates first and second control voltages in response to a differential input signal. A second input stage generates third and fourth control voltages in response to the differential input signal. The first and second control voltages can be inversely proportional and the third and fourth control voltages can be inversely proportional. The circuit also includes a first output stage that is configured to set a magnitude of a first output voltage of a differential output signal at a first output node in response to the first and second control voltages. The circuit further includes a second output stage that is configured to set a magnitude of a second output voltage of the differential output signal at a second output node in response to the third and fourth control voltages.
摘要翻译：本发明的一个实施例包括差分放大器电路。第一输入级响应差分输入信号产生第一和第二控制电压。响应差分输入信号，第二输入级产生第三和第四控制电压。第一和第二控制电压可以是反比例的，并且第三和第四控制电压可以是反比例的。电路还包括第一输出级，其被配置为响应于第一和第二控制电压来设置第一输出节点处的差分输出信号的第一输出电压的幅度。电路还包括第二输出级，其被配置为响应于第三和第四控制电压在第二输出节点处设置差分输出信号的第二输出电压的幅度。

5. 发明申请

US20120235745A1 VARIABLE GAIN AMPLIFIER 有权
标题翻译：可变增益放大器
公开(公告)号：US20120235745A1
公开(公告)日：2012-09-20
申请号：US13047505
申请日：2011-03-14
申请人： Brett Forejt , Jeff Berwick , David J. Baldwin
发明人： Brett Forejt , Jeff Berwick , David J. Baldwin
IPC分类号： H03F3/45
CPC分类号： H03F3/45654 , H03F3/45179 , H03F2203/45528 , H03F2203/45562 , H03F2203/45594 , H03G1/0029 , H03G1/007
摘要： An apparatus and method are provided. Generally, an input signal is applied across a main path (through an input network) and across a cancellation path (through a cancellation circuit). The cancellation circuit subtracts a cancellation current from the main path as part of the control mechanism, where the magnitude of the cancellation current is based on a gain control signal (that has been linearized to follow a control voltage).
摘要翻译：提供了一种装置和方法。通常，输入信号跨越主路径（通过输入网络）并跨越抵消路径（通过消除电路）施加。消除电路从主路径减去作为控制机构的一部分的消除电流，其中消除电流的大小基于增益控制信号（已被线性化以跟随控制电压）。

6. 发明申请

US20080180299A1 Class D Analog-to-Digital Converter 有权
标题翻译： D类模数转换器
公开(公告)号：US20080180299A1
公开(公告)日：2008-07-31
申请号：US11627635
申请日：2007-01-26
申请人： Brett Forejt
发明人： Brett Forejt
IPC分类号： H03M1/50
CPC分类号： G04F10/005 , H03M1/504
摘要： A new analog-to-digital (ADC) circuit and architecture and the corresponding method of implementation are provided. The analog input signal is converted into a modulated pulse stream such as by a pulse-width-modulation scheme. The time-duration width of the pulses are measured by a TDC (time-to-digital converter) and converted to a digital binary representation that is directly correlated with the voltage amplitude of the analog input signal. The circuit implementation is substantially free of switches and circuit issues such as associated with sigma-delta and switched-capacitor techniques for ADC's.
摘要翻译：提供了一种新的模数（ADC）电路和架构以及相应的实现方法。模拟输入信号被转换成调制脉冲流，例如通过脉冲宽度调制方案。脉冲的持续时间宽度由TDC（时间 - 数字转换器）测量，并转换成与模拟输入信号的电压幅度直接相关的数字二进制表示。电路实现基本上没有开关和电路问题，例如与ADC的Σ-Δ和开关电容技术相关联。

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