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1. 发明申请

WO2010114662A1 A THREE DIMENSIONAL INTERCONNECT STRUCTURE AND METHOD THEREOF 审中-公开
标题翻译：三维互连结构及其方法
公开(公告)号：WO2010114662A1
公开(公告)日：2010-10-07
申请号：PCT/US2010/025987
申请日：2010-03-03
申请人： RESEARCH TRIANGLE INSTITUTE , WILLIAMS, Charles, Kenneth , BOWER, Christopher, A. , MALTA, Dean, Michael , TEMPLE, Dorota
发明人： WILLIAMS, Charles, Kenneth , BOWER, Christopher, A. , MALTA, Dean, Michael , TEMPLE, Dorota
IPC分类号： H05K7/06
CPC分类号： H01L21/76898 , H01L25/0657 , H01L25/50 , H01L2224/45147 , H01L2225/06513 , H01L2225/06541 , H01L2924/00011 , H01L2924/00014 , H01L2924/01015 , H01L2924/01322 , H01L2924/10253 , H01L2924/1461 , H01L2924/00 , H01L2224/48 , H01L2924/01033
摘要： A three-dimensional interconnect includes a first substrate bonded to a second substrate, the first substrate including a device layer and a bulk semiconductor layer, a metal pad disposed on the second substrate, an electrically insulating layer disposed between the first and second substrates. The structure has a via-hole extending through the device layer, the bulk semiconductor layer and the electrically insulating layer to the metal pad on the second substrate. The structure has a dielectric coating on a sidewall of the via-hole, and a plasma-treated region of the metal pad disposed on the second substrate. The structure includes a via metal monolithically extending from the plasma-treated region of the metal pad through the via-hole and electrically interconnecting the device layer of the first substrate to the metal pad of the second substrate.
摘要翻译：三维互连包括结合到第二衬底的第一衬底，第一衬底包括器件层和体半导体层，设置在第二衬底上的金属焊盘，设置在第一和第二衬底之间的电绝缘层。该结构具有穿过器件层，体半导体层和电绝缘层延伸到第二衬底上的金属焊盘的通孔。该结构在通孔的侧壁上具有介电涂层，以及设置在第二基板上的金属焊盘的等离子体处理区域。该结构包括从金属焊盘的等离子体处理区域通过通孔整体延伸的通孔金属，并将第一基板的器件层与第二基板的金属焊盘电连接。

2. 发明申请

WO2009114229A1 SELECTIVE PLANARIZATION METHOD AND DEVICES FABRICATED ON PLANARIZED STRUCTURES 审中-公开
标题翻译：选择性平面化方法和在平面结构上制作的器件
公开(公告)号：WO2009114229A1
公开(公告)日：2009-09-17
申请号：PCT/US2009/033984
申请日：2009-02-13
申请人： RESEARCH TRIANGLE INSTITUTE , TEMPLE, Dorota , MALTA, Dean, Michael , BOWER, Christopher, A.
发明人： TEMPLE, Dorota , MALTA, Dean, Michael , BOWER, Christopher, A.
IPC分类号： H01L21/02 , H01L21/762
CPC分类号： H01L21/32115 , H01L21/32134 , H01L21/7684 , H01L21/76898
摘要： A method and system for treating a surface structure of a workpiece. The method provides a carrier-gel to the surface structure of the workpiece. The carrier-gel includes an etchant for selectively etching a first material of the surface structure and has a gel particle size larger than the surface structure. The method etches the first material from the surface structure by a reaction of the etchant included in the carrier-gel with the first material of the surface structure in order to remove a part of the first material from the surface structure for subsequent device fabrication. The system includes a chemical reactor supporting the workpiece. The chemical reactor is configured to flow the carrier-gel noted to the surface structure of the workpiece in order to remove the first material from the surface structure.
摘要翻译：一种用于处理工件的表面结构的方法和系统。该方法为工件的表面结构提供载体凝胶。载体凝胶包括用于选择性蚀刻表面结构的第一材料并具有大于表面结构的凝胶粒径的蚀刻剂。该方法通过包含在载体 - 凝胶中的蚀刻剂与表面结构的第一材料的反应从表面结构中蚀刻第一材料，以便从表面结构中去除部分第一材料以用于随后的器件制造。该系统包括一个支撑工件的化学反应器。化学反应器被配置成流动与工件的表面结构相关的载体凝胶，以从表面结构去除第一材料。

3. 发明申请

WO2009114291A2 FARADAY CUP ARRAY INTEGRATED WITH A READOUT IC AND METHOD FOR MANUFACTURE THEREOF 审中-公开
标题翻译：集成了读出IC的阵列阵列及其制造方法
公开(公告)号：WO2009114291A2
公开(公告)日：2009-09-17
申请号：PCT/US2009/035375
申请日：2009-02-27
申请人： RESEARCH TRIANGLE INSTITUTE , BOWER, Christopher, A. , GILCHRIST, Kristin, Hedgepath , STONER, Brian, R. , TEMPLE, Dorota
发明人： BOWER, Christopher, A. , GILCHRIST, Kristin, Hedgepath , STONER, Brian, R. , TEMPLE, Dorota
IPC分类号： H01L27/18
CPC分类号： H01J49/025 , H01J37/244 , H01J49/0018 , H01J2237/24405 , Y10T29/49002
摘要： A detector array and method for making the detector array. The array includes a substrate including a plurality of trenches formed therein, and includes a plurality of collectors electrically isolated from each other, formed on the walls of the trenches, and configured to collect charge particles incident on respective ones of the collectors and to output from said collectors signals indicative of charged particle collection. The array includes a plurality of readout circuits disposed on a side of the substrate opposite openings to the collectors. The readout circuits are configured to read charge collection signals from respective ones of the plurality of collectors. The method forms in a substrate a plurality of trenches across a surface of the substrate, forms in the plurality of trenches a plurality of collectors, forms a plurality of readout connections on a side of the substrate opposite openings to the collectors with the readout connections being configured to collect signals from respective ones of the plurality of collectors, and connects respective ones of the plurality of readout connections to respective ones of the plurality of the collectors.
摘要翻译：用于制造检测器阵列的检测器阵列和方法。该阵列包括一个衬底，该衬底包括形成在其中的多个沟槽，并且包括彼此电隔离的多个集电极，形成在沟槽的壁上，并且被构造成收集入射在相应集电极上的电荷粒子，并从所述收集器信号指示带电粒子收集。该阵列包括多个读出电路，该读出电路设置在基板的与集电体相对的开口的一侧。读出电路被配置为从多个收集器中的相应的一个收集器读取电荷收集信号。该方法在衬底中形成跨越衬底表面的多个沟槽，在多个沟槽中形成多个集电器，在衬底的与集电器的开口相对的一侧上形成多个读出连接，读出连接为被配置为从所述多个收集器中的相应集合器收集信号，并且将所述多个读出连接中的相应的读出连接连接到所述多个集合器中的相应的一个。

4. 发明申请

WO2023279082A1 SYSTEMS, METHODS, AND DEVICES FOR DETECTING VIRAL RESPIRATORY ILLNESS IN PRESYMPTOMATIC AND ASYMPTOMATIC INFECTED PERSONS 审中-公开
公开(公告)号：WO2023279082A1
公开(公告)日：2023-01-05
申请号：PCT/US2022/073348
申请日：2022-07-01
申请人： RESEARCH TRIANGLE INSTITUTE
发明人： GILCHRIST, Kristin, Hedgepath , HEGARTY-CRAVER, Meghan, Sarah , TEMPLE, Dorota , FURBERG, Robert
IPC分类号： A61B5/00 , A61B5/332 , A61B5/11 , A61B5/024 , A61B5/1455 , A61B5/01 , A61B5/08
摘要： Disclosed herein are systems, methods, and devices of detecting illness in presymptomatic and asymptomatic infected persons using wearable sensor technology. In a first embodiment, a method is implemented on a computing device, the method includes receiving first sensor data associated with the person over a first period of time and applying the first sensor data to a multi-variate detection model. The method further includes receiving second sensor data associated with the person over a second period of time and applying the second sensor data to the multi-variate detection model. Further the method includes determining a probability value of the illness in the person using the multi-variate detection model and transmitting the probability value to a user interface (UI).

5. 发明申请

WO2014039546A1 ELECTRONIC DEVICES UTILIZING CONTACT PADS WITH PROTRUSIONS AND METHODS FOR FABRICATION 审中-公开
标题翻译：电子设备利用接触垫与制造方法和制造方法
公开(公告)号：WO2014039546A1
公开(公告)日：2014-03-13
申请号：PCT/US2013/058046
申请日：2013-09-04
申请人： RESEARCH TRIANGLE INSTITUTE, INTERNATIONAL
发明人： VICK, Eric , CUNNINGHAM, Garry, Brian , TEMPLE, Dorota
IPC分类号： H01L21/60 , H01L21/3205
CPC分类号： H01L21/76898 , H01L23/481 , H01L23/49827 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/16 , H01L24/94 , H01L25/0657 , H01L2224/0311 , H01L2224/0345 , H01L2224/03462 , H01L2224/036 , H01L2224/039 , H01L2224/0401 , H01L2224/05025 , H01L2224/05096 , H01L2224/05555 , H01L2224/05557 , H01L2224/05569 , H01L2224/0557 , H01L2224/05572 , H01L2224/056 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05666 , H01L2224/05676 , H01L2224/05684 , H01L2224/05687 , H01L2224/06181 , H01L2224/13025 , H01L2224/16146 , H01L2224/16235 , H01L2224/94 , H01L2225/06513 , H01L2225/06541 , H01L2924/12042 , H01L2924/1461 , H01L2924/00014 , H01L2924/0476 , H01L2924/01074 , H01L2924/04941 , H01L2224/0239 , H01L2924/01029 , H01L2924/01013 , H01L2924/01022 , H01L2924/01028 , H01L2924/01079 , H01L2924/01047 , H01L2924/01044 , H01L2224/03 , H01L2924/00
摘要： An electronic device includes a substrate including a front side, a back side, a thickness between the front side and back side, one or more front- side vias extending from the front side into a part of the thickness, and an interconnect via extending from the back side toward the front side; a contact pad on the front side and including one or more protrusions extending through corresponding front- side vias and into the interconnect via; and an interconnect extending through the interconnect via and into contact with the protrusion(s).
摘要翻译：一种电子设备包括：基板，包括前侧，背面，前侧和后侧之间的厚度，从前侧延伸到厚度的一部分的一个或多个前侧通孔;以及互连件，背面朝前方; 在前侧上的接触垫，包括一个或多个延伸穿过对应的前侧通孔并进入互连通孔的突起; 以及通过互连件延伸并与突起接触的互连。

6. 发明申请

WO2003019651A2 THROUGH-VIA VERTICAL INTERCONNECTS, THROUGH-VIA HEAT SINKS AND ASSOCIATED FABRICATION METHODS 审中-公开
标题翻译：通过垂直互连，通过加热和相关的制造方法
公开(公告)号：WO2003019651A2
公开(公告)日：2003-03-06
申请号：PCT/US2002/027013
申请日：2002-08-23
申请人： MCNC , PALMER, William, Devereux , BONAFEDE, Salvatore , TEMPLE, Dorota , STONER, Brian, R.
发明人： PALMER, William, Devereux , BONAFEDE, Salvatore , TEMPLE, Dorota , STONER, Brian, R.
IPC分类号： H01L21/768
CPC分类号： H05K3/0055 , H01L21/76898 , H01L23/481 , H01L25/0657 , H01L25/50 , H01L2224/0401 , H01L2224/05009 , H01L2224/13023 , H01L2224/13025 , H01L2224/131 , H01L2224/16146 , H01L2225/06513 , H01L2225/06541 , H01L2225/06589 , H01L2924/09701 , H01L2924/12044 , H01S5/02 , H01S5/0207 , H01S5/02272 , H01S5/042 , H01S5/423 , H05K1/0306 , H05K2201/0179 , H05K2201/09581 , H01L2924/014
摘要： An improved through-via vertical interconnect, through-via heat sinks and associated fabrication techniques are provided for. The devices benefit from an organic dielectric layer that allows for low-temperature deposition processing. The low-temperature processing used to form the through-via interconnects and heat sinks allows for the formation of the interconnects and heat sinks at any point in the fabrication of the semiconductor device, including post-formation of active devices and associated circuitry. The through-via vertical interconnects of the present invention are fabricated so as to insure conformal thickness of the various layers that form the interconnect constructs. As such, the interconnects can be formed with a high aspect ratio, in the range of about 4:1 to about 10:1, substrate thickness to interconnect diameter.
摘要翻译：提供改进的通孔垂直互连，通孔散热器和相关的制造技术。这些器件受益于允许进行低温沉积处理的有机介电层。用于形成通孔互连和散热器的低温处理允许在半导体器件的制造中的任何点处形成互连和散热器，包括有源器件和相关电路的形成。制造本发明的通孔垂直互连件以确保形成互连结构的各种层的适形厚度。因此，互连可以以约4:1至约10:1的高纵横比形成，使基板厚度互连直径。

7. 发明申请

WO2015164266A1 ELECTRONIC PACKAGES WITH THREE-DIMENSIONAL CONDUCTIVE PLANES, AND METHODS FOR FABRICATION 审中-公开
标题翻译：具有三维导电平面的电子包，以及制造方法
公开(公告)号：WO2015164266A1
公开(公告)日：2015-10-29
申请号：PCT/US2015/026682
申请日：2015-04-20
申请人： RESEARCH TRIANGLE INSTITUTE
发明人： VICK, Eric, Paul , TEMPLE, Dorota
IPC分类号： H01L23/48 , H01L23/00 , H01L21/02 , H01L21/768
CPC分类号： H01L25/0657 , H01L23/481 , H01L23/49822 , H01L23/49827 , H01L24/24 , H01L24/25 , H01L24/29 , H01L24/82 , H01L24/83 , H01L24/92 , H01L25/50 , H01L2224/24051 , H01L2224/24105 , H01L2224/24146 , H01L2224/244 , H01L2224/245 , H01L2224/2511 , H01L2224/32145 , H01L2224/83191 , H01L2224/83203 , H01L2224/8385 , H01L2224/92144 , H01L2224/94 , H01L2225/06513 , H01L2225/06524 , H01L2225/06527 , H01L2225/06531 , H01L2225/06541 , H01L2225/06544 , H01L2225/06565 , H01L2924/01029 , H01L2924/01074 , H01L2924/01022 , H01L2224/83 , H01L2224/82
摘要： An electronic package includes an adhesion layer between a first substrate and a second substrate. The adhesion layer is patterned to define openings aligned with through-substrate interconnects and corresponding bond pads. A conductive plane is formed between the first substrate and the second substrate, adjacent to the adhesion layer.
摘要翻译：电子封装包括在第一基板和第二基板之间的粘合层。图案化粘合层以限定与贯穿衬底互连和对应的焊盘对准的开口。在第一基板和第二基板之间形成与粘合层相邻的导电平面。

8. 发明公开

EP2893553A1 ELECTRONIC DEVICES UTILIZING CONTACT PADS WITH PROTRUSIONS AND METHODS FOR FABRICATION 审中-公开
标题翻译：电子设备使用投影与和方法接触的表面用于生产
公开(公告)号：EP2893553A1
公开(公告)日：2015-07-15
申请号：EP13835134.1
申请日：2013-09-04
申请人： Research Triangle Institute
发明人： VICK, Eric , CUNNINGHAM, Garry, Brian , TEMPLE, Dorota
IPC分类号： H01L21/60 , H01L21/3205
CPC分类号： H01L21/76898 , H01L23/481 , H01L23/49827 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/16 , H01L24/94 , H01L25/0657 , H01L2224/0311 , H01L2224/0345 , H01L2224/03462 , H01L2224/036 , H01L2224/039 , H01L2224/0401 , H01L2224/05025 , H01L2224/05096 , H01L2224/05555 , H01L2224/05557 , H01L2224/05569 , H01L2224/0557 , H01L2224/05572 , H01L2224/056 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05666 , H01L2224/05676 , H01L2224/05684 , H01L2224/05687 , H01L2224/06181 , H01L2224/13025 , H01L2224/16146 , H01L2224/16235 , H01L2224/94 , H01L2225/06513 , H01L2225/06541 , H01L2924/12042 , H01L2924/1461 , H01L2924/00014 , H01L2924/0476 , H01L2924/01074 , H01L2924/04941 , H01L2224/0239 , H01L2924/01029 , H01L2924/01013 , H01L2924/01022 , H01L2924/01028 , H01L2924/01079 , H01L2924/01047 , H01L2924/01044 , H01L2224/03 , H01L2924/00
摘要： An electronic device includes a substrate including a front side, a back side, a thickness between the front side and back side, one or more front- side vias extending from the front side into a part of the thickness, and an interconnect via extending from the back side toward the front side; a contact pad on the front side and including one or more protrusions extending through corresponding front- side vias and into the interconnect via; and an interconnect extending through the interconnect via and into contact with the protrusion(s).

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