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1. 发明申请

WO2010059331A1 JITTER CORRECTION IN HIGH SPEED DATA LINK 审中-公开
标题翻译：高速数据链路中的抖动校正
公开(公告)号：WO2010059331A1
公开(公告)日：2010-05-27
申请号：PCT/US2009/061847
申请日：2009-10-23
申请人： RAMBUS INC. , YIP, Tsunwai, Gary , CHANG, Kun-yung , NGUYEN, David
发明人： YIP, Tsunwai, Gary , CHANG, Kun-yung , NGUYEN, David
IPC分类号： H03L7/22 , H04L7/00
CPC分类号： H03L7/22 , H04L7/0008
摘要： A jitter correction operation, wherein a first timing signal is generated in a locked-loop circuit to time a transmission of a data signal within a corresponding transmit circuit. A second timing signal is generated within another locked-loop circuit to time a sampling of the data signal within a corresponding receive circuit. A loop bandwidth configuration of at least one of the locked-loop circuits is adjusted in order to reduce a difference between loop bandwidths of the respective locked loop circuits.
摘要翻译：一种抖动校正操作，其中在锁定环电路中产生第一定时信号以对相应发射电路内的数据信号进行传输。在另一个锁定环路电路内产生第二定时信号，以对相应接收电路内的数据信号进行采样。调整至少一个锁定环电路的环路带宽配置，以减少相应的锁定环电路的环路带宽之间的差异。

2. 发明申请

WO2009029335A1 DETACHABLE INTERCONNECT FOR CONFIGURABLE WIDTH MEMORY SYSTEM 审中-公开
标题翻译：可配置的宽度存储器系统的可互连的互连
公开(公告)号：WO2009029335A1
公开(公告)日：2009-03-05
申请号：PCT/US2008/068822
申请日：2008-06-30
申请人： RAMBUS INC. , KOLLIPARA, Ravindranath , YUAN, Xingchao , LAMBRECHT, Frank , LI, Ming , PEREGO, Richard E. , LIN, Qi , NGUYEN, David , OH, Kyung Suk
发明人： KOLLIPARA, Ravindranath , YUAN, Xingchao , LAMBRECHT, Frank , LI, Ming , PEREGO, Richard E. , LIN, Qi , NGUYEN, David , OH, Kyung Suk
IPC分类号： G06F13/16 , H01L25/10 , H05K1/00
CPC分类号： G06F13/1668 , H01L2224/16225 , H01L2924/15174 , H01L2924/15311 , H05K1/0237 , H05K1/0295 , H05K1/14 , H05K1/141 , H05K1/147 , H05K3/222 , H05K2201/044 , H05K2201/09954 , H05K2201/10159 , H05K2201/10356
摘要： The disclosure relates to a detachable signalling interconnect apparatus that provides connectivity between two or more components of a memory system in conjunction with different modes of operation of the components. The memory system comprises: a first socket to receive a first memory module; a second socket to receive a second memory module; a detachable signal-interconnect; and a memory controller coupled to the detachable signal-interconnect and configured to define a first mode of operation and a second mode of operation, wherein in the first mode of operation the detachable signal-interconnect is to couple the memory- controller to the first memory module and in the second mode of operation the detachable signal-interconnect is to couple the memory controller to the first memory module and the second memory module.
摘要翻译：本公开涉及一种可拆卸信令互连装置，其提供存储器系统的两个或更多个组件与组件的不同操作模式之间的连接。存储器系统包括：第一插座，用于接收第一存储器模块; 用于接收第二存储器模块的第二插座; 可拆卸的信号互连; 以及存储器控制器，其耦合到所述可拆卸信号互连并且被配置为限定第一操作模式和第二操作模式，其中在所述第一操作模式中，所述可拆卸信号互连将所述存储器控制器耦合到所述第一存储器模块，并且在第二操作模式中，可拆卸信号互连将存储器控制器耦合到第一存储器模块和第二存储器模块。

3. 发明申请

WO2012027567A1 IMPROVEMENTS IN AND RELATING TO PERFORMANCE OF AN ANALYSER FOR BIOLOGICAL SAMPLES 审中-公开
标题翻译：生物样品分析仪的性能和相关性能的改进
公开(公告)号：WO2012027567A1
公开(公告)日：2012-03-01
申请号：PCT/US2011/049141
申请日：2011-08-25
申请人： SMITH, Stan , DUANE, Brett , HURTH, Cedric , NGUYEN, David , SURVE, Amol , LENIGK, Ralf , ZENHAUSERN, Frederic
发明人： SMITH, Stan , DUANE, Brett , HURTH, Cedric , NGUYEN, David , SURVE, Amol , LENIGK, Ralf , ZENHAUSERN, Frederic
IPC分类号： G01N35/00 , B01L3/00 , G01N35/08
CPC分类号： B01L3/502 , B01L3/502715 , B01L7/52 , B01L9/527 , B01L2200/025 , B01L2200/026 , B01L2200/10 , B01L2200/14 , B01L2300/0816 , B01L2300/1822 , B01L2400/0403 , B01L2400/0475 , G01N27/447 , G01N35/00 , G01N35/00029 , H05K1/0266 , H05K1/11 , H05K1/181
摘要： An apparatus (11) for processing a sample, circuit board ( 8008 ) suited to use in such an apparatus and a method of processing are provided in which the apparatus (11) is provided with alignement features to assist in provided the circuit board and a sample cartridge (9) in the correct position relative to one another. In this way, the plurality of sections for processing a sample in the cartridge (9) are positioned against a plurality of elements, such as a heater (4) for heating the sample cartridge (9) or an electrical contact (EP1 -EP4) for powering features on the sample cartridge (9), correctly and can operate independently of one another.
摘要翻译：提供一种用于处理样品的装置（11），适用于这种装置的电路板（8008）和处理方法，其中装置（11）具有对准特征以辅助提供电路板和样品盒（9）在相对于彼此的正确位置。以这种方式，用于处理盒（9）中的样品的多个部分抵靠多个元件定位，例如用于加热样品盒（9）或电接触（EP1-EP4）的加热器（4）用于为样品盒（9）上的功能供电，并且可以彼此独立地操作。

4. 发明申请

WO2011031373A2 HIGH DENSITY MULTI NODE COMPUTER WITH INTEGRATED SHARED RESOURCES 审中-公开
标题翻译：具有集成共享资源的高密度多节点计算机
公开(公告)号：WO2011031373A2
公开(公告)日：2011-03-17
申请号：PCT/US2010/041219
申请日：2010-07-07
申请人： PCUBE SYSTEMS, INC. , NGUYEN, Tung, M. , AU, Richard , NGUYEN, David , CHENNAVASIN, Tipatat , RIZVI, Najaf , BRADLEY, David , HUMPHREYS, Matthew
发明人： NGUYEN, Tung, M. , AU, Richard , NGUYEN, David , CHENNAVASIN, Tipatat , RIZVI, Najaf , BRADLEY, David , HUMPHREYS, Matthew
IPC分类号： G06F13/14 , G06F1/20 , G06F1/26
CPC分类号： G06F9/44505 , G06F1/181 , G06F1/189 , G06F1/20 , G06F1/26 , G06F13/4068 , Y02D10/14 , Y02D10/151
摘要： A multi-node computer system, comprising: a plurality of nodes, a system control unit and a carrier board. Each node of the plurality of nodes comprises a processor and a memory. The system control unit is responsible for: power management, cooling, workload provisioning, native storage servicing, and I/O. The carrier board comprises a system fabric and a plurality of electrical connections. The electrical connections provide the plurality of nodes with power, management controls, system connectivity between the system control unit and the plurality of nodes, and an external network connection to a user infrastructure. The system control unit and the carrier board provide integrated, shared resources for the plurality of nodes. The multi-node computer system is provided in a single enclosure.
摘要翻译：一种多节点计算机系统，包括：多个节点，系统控制单元和载板。多个节点中的每个节点包括处理器和存储器。系统控制单元负责：电源管理，冷却，工作负载配置，本机存储服务和I / O。承载板包括系统结构和多个电连接。电连接为多个节点提供功率，管理控制，系统控制单元和多个节点之间的系统连接以及到用户基础设施的外部网络连接。系统控制单元和载板为多个节点提供集成的共享资源。多节点计算机系统提供在单个机箱中。

5. 发明申请

WO2007044464A2 INTERLOCKING RADIAL ROLLER BEARING ASSEMBLY 审中-公开
标题翻译：互锁径向滚子轴承组件
公开(公告)号：WO2007044464A2
公开(公告)日：2007-04-19
申请号：PCT/US2006/038975
申请日：2006-10-05
申请人： TIMKEN US CORPORATION , MCLARTY, Daniel, R. , HAYWARD, John, S. , BOBER, Thomas, R. , NGUYEN, David
发明人： MCLARTY, Daniel, R. , HAYWARD, John, S. , BOBER, Thomas, R. , NGUYEN, David
CPC分类号： F16C19/502 , F04B1/2085 , F16C33/306 , F16C33/46 , F16C33/588 , F16C2360/00
摘要： A roller bearing assembly includes first and second arcuate bearing races. The first and second arcuate bearing races each define ends and a central portion intermediate the ends. A plurality of rolling elements is positioned between the first and second bearing races. A unitizing member is positioned between the central portions of the first and second bearing races and is operable to retain the first and second bearing races together.
摘要翻译：滚子轴承组件包括第一和第二弧形轴承座圈。第一和第二弧形轴承座圈各限定端部和位于端部之间的中心部分。多个滚动元件位于第一和第二轴承座之间。整合构件位于第一和第二轴承座的中心部分之间，并且可操作以将第一和第二轴承座圈保持在一起。

6. 发明申请

WO2009079361A1 SYSTEM AND METHOD FOR AUTOMATED RECONCILIATION OF PURCHASE ORDERS 审中-公开
标题翻译：用于自动重新购买订单的系统和方法
公开(公告)号：WO2009079361A1
公开(公告)日：2009-06-25
申请号：PCT/US2008/086559
申请日：2008-12-12
申请人： PAYMETRIC, INC. , RUCKER, Randy , RIVERS, Lisa , NGUYEN, David , LOCHHEAD, Brian
发明人： RUCKER, Randy , RIVERS, Lisa , NGUYEN, David , LOCHHEAD, Brian
IPC分类号： G06Q40/00
CPC分类号： G06Q30/06
摘要： A system and method for reconciling transaction data, including identifying one or more transactions to be reconciled; aggregating one or more potential matching purchase orders; and creating a proposal that identifies one or more purchase orders that may correlate to the transaction to be reconciled, wherein creating a proposal comprises performing one or more search iterations to identify one or more purchase orders that fit within one or more parameters of the search iterations.
摘要翻译：一种用于协调交易数据的系统和方法，包括识别要协调的一个或多个交易; 汇总一个或多个潜在的匹配采购订单; 以及创建标识一个或多个可以与要协调的交易相关联的采购订单的提案，其中创建提案包括执行一个或多个搜索迭代以识别适合于搜索迭代的一个或多个参数内的一个或多个采购订单。

7. 发明申请

WO2006053269A1 RADIALLY ADJUSTABLE LINEAR BEARING ASSEMBLY 审中-公开
标题翻译：可旋转调节的直线轴承总成
公开(公告)号：WO2006053269A1
公开(公告)日：2006-05-18
申请号：PCT/US2005/041082
申请日：2005-11-10
申请人： TIMKEN US CORPORATION , FAUST, Carl, Eric , CROSSMAN, Scott , NGUYEN, David , HAYWARD, John, S.
发明人： FAUST, Carl, Eric , CROSSMAN, Scott , NGUYEN, David , HAYWARD, John, S.
IPC分类号： F16C31/04 , F16C29/12 , B23Q1/26
CPC分类号： F16C29/04 , F16C19/548 , F16C23/08 , F16C25/083 , F16C29/123 , F16C31/04 , F16C33/58 , F16C35/077 , F16C2322/39
摘要： A linear bearing assembly comprising first and second cylindrical members. A first race member is positioned between the first and second cylindrical members. A plurality of rolling elements are positioned between the first cylindrical member and the second cylindrical member such that the first and second cylindrical members are linearly adjustable relative to one another. An adjustment mechanism is positioned between the plurality of rolling elements and one of the cylindrical members and is adjustable to remove any radial clearance between the rolling elements and the cylindrical members. The linear bearing assembly is well-suited for use with spindle applications, such as machine tools.
摘要翻译：一种包括第一和第二圆柱形构件的直线轴承组件。第一座圈构件定位在第一和第二圆柱形构件之间。多个滚动元件位于第一圆柱形构件和第二圆柱形构件之间，使得第一和第二圆柱形构件相对于彼此线性可调。调节机构位于多个滚动元件和其中一个圆柱形构件之间，并且可调节以去除滚动元件和圆柱形构件之间的任何径向间隙。直线轴承组件非常适用于主轴应用，如机床。

8. 发明公开

EP1297431A2 MULTIPLE CHANNEL MODULES AND BUS SYSTEMS 有权
标题翻译：多通道模块和总线系统
公开(公告)号：EP1297431A2
公开(公告)日：2003-04-02
申请号：EP01937344.8
申请日：2001-05-10
申请人： Rambus, Inc.
发明人： PERINO, Donald, V. , HABA, Belgacem , KHALILI, Sayeh , PEREGO, Richard, E. , NGUYEN, David , GARRETT, Billy, W., Jr. , TSERN, Ely , HAMPEL, Craig, E. , YIP, Wai-Yeung , KOLLIPARA, Ravindran, T.
IPC分类号： G06F13/00
CPC分类号： H05K1/147 , G06F13/409 , H05K1/023 , H05K1/148 , H05K2201/10189
摘要： Various module structures are disclosed which may be used to implement modules having (1) to (N) channels. Bus systems may be formed by the interconnection of such modules.

9. 发明授权

EP1297431B1 MULTIPLE CHANNEL MODULES AND BUS SYSTEMS 有权
标题翻译：多通道模块和总线系统
公开(公告)号：EP1297431B1
公开(公告)日：2009-08-19
申请号：EP01937344.8
申请日：2001-05-10
申请人： Rambus, Inc.
发明人： PERINO, Donald, V. , HABA, Belgacem , KHALILI, Sayeh , PEREGO, Richard, E. , NGUYEN, David , GARRETT, Billy, W., Jr. , TSERN, Ely , HAMPEL, Craig, E. , YIP, Wai-Yeung , KOLLIPARA, Ravindran, T.
IPC分类号： G06F13/00
CPC分类号： H05K1/147 , G06F13/409 , H05K1/023 , H05K1/148 , H05K2201/10189

10. 发明公开

EP1863131A2 High frequency bus system 审中-公开
标题翻译： Hochfrequenz-Bussystem
公开(公告)号：EP1863131A2
公开(公告)日：2007-12-05
申请号：EP07114628.6
申请日：1998-09-22
申请人： Rambus, Inc.
发明人： PERINO, Donald, V. , GARRETT, Billy, Wayne, Jr. , LIAW, Haw-Jyh , NGUYEN, David , NIMMAGADDA, Srinivas , GASBARRO, James, A. , DeWITT CRISP, Richard
IPC分类号： H01R12/04
CPC分类号： G11C5/063 , G06F13/1684 , G06F13/4086 , G06F13/409 , G06F13/4247 , G11C5/04 , G11C7/1048 , H05K1/023 , H05K1/0246 , H05K1/0248 , H05K1/14 , H05K7/1459 , H05K2201/044 , H05K2201/09263 , H05K2201/10022 , H05K2201/10159 , H05K2201/10689
摘要： A high frequency bus system (450) which insures uniform arrival times of high fidelity signals to the devices (510), despite the use of the bus (450) on modules (420) and connectors. The high frequency bus system (450) includes a first bus segment having one or more devices (510) connected between a first and second end. The high frequency bus system (450) also includes a second bus segment which has no devices connected to it. The first end of the first segment and the second end of the second segment are coupled in series to form a chain of segments and when two signals are introduced to the first end of the second bus segment at substantially the same time, they arrive at each device (510) connected to the first bus segment at substantially the same time. Conversely when two signals originate at a device (510) substantially at the same time, they arrive at the first end of the second bus segment at substantially the same time. Uniform arrival times hold despite the use of connectors to couple the segments together, despite the segments being located on modules, without the need for stubs, despite the presence of routing turns in the segments and despite the type of information, such as address, data, or control, carried by the signals.
摘要翻译：尽管在模块（420）和连接器上使用总线（450），但高频总线系统（450）确保高保真信号到达设备（510）的均匀到达时间。高频总线系统（450）包括具有连接在第一和第二端之间的一个或多个设备（510）的第一总线段。高频总线系统（450）还包括没有与其连接的设备的第二总线段。第一段的第一端和第二段的第二端串联耦合以形成段链段，并且当两个信号基本上被同时引入第二总线段的第一端时，它们到达每一个设备（510）在大致相同的时间连接到第一总线段。相反，当两个信号基本上在同一时间发生在设备（510）时，它们在几乎相同的时间到达第二总线段的第一端。尽管使用连接器将段连接在一起，尽管使用段落位于模块上，但不需要存根，尽管存在段中的路由转换，并且尽管存在信息的类型，例如地址，数据，或由信号承载的控制。

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