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1. 发明授权

US07348928B2 Slot antenna having a MEMS varactor for resonance frequency tuning 有权
标题翻译：具有用于共振频率调谐的MEMS变容二极管的天线天线
公开(公告)号：US07348928B2
公开(公告)日：2008-03-25
申请号：US11013594
申请日：2004-12-14
申请人： Qing Ma , Xintian Eddie Lin , Al Bettner
发明人： Qing Ma , Xintian Eddie Lin , Al Bettner
IPC分类号： H01Q13/10
CPC分类号： H01Q13/103
摘要： Briefly, in accordance with one embodiment of the invention, a slot antenna may include a primary slot and one or more secondary slots. The size of the antenna may be reduced by adding one or more of the secondary slots which may add additional inductance to the antenna. Furthermore, the size of the antenna may be reduced by increasing the inductance of the secondary slots via increasing the length of the slots or by changing the shape of the slots. The antenna may include one or more MEMS varactors coupled to one or more of the secondary slots. The resonant frequency of the slot antenna may be tuned to a desired frequency by changing the capacitance value of one or more of the MEMS varactors to a desired capacitance value.
摘要翻译：简而言之，根据本发明的一个实施例，缝隙天线可以包括主槽和一个或多个次槽。可以通过增加一个或多个次级槽来减小天线的尺寸，这可能为天线增加额外的电感。此外，可以通过增加槽的长度或通过改变槽的形状来增加辅助槽的电感来减小天线的尺寸。天线可以包括耦合到一个或多个次级插槽的一个或多个MEMS变容二极管。可以通过将一个或多个MEMS可变电抗器的电容值改变为期望的电容值来将缝隙天线的谐振频率调谐到期望的频率。

2. 发明授权

US07279989B2 Apparatus, system and method capable of clock noise mitigation using a frequency adaptive process 有权
标题翻译：能够使用频率自适应处理来对噪声进行减噪的装置，系统和方法
公开(公告)号：US07279989B2
公开(公告)日：2007-10-09
申请号：US11169365
申请日：2005-06-28
申请人： Al Bettner , Xintian Eddie Lin , Kevin P. Slattery
发明人： Al Bettner , Xintian Eddie Lin , Kevin P. Slattery
IPC分类号： H03L7/18 , H04B1/10
CPC分类号： H03L7/18
摘要： An embodiment of the present invention provides an apparatus, comprising an oscillator capable of generating a clock signal, wherein said apparatus is capable of clock noise mitigation using a frequency adaptive algorithm, technique, process or system. And wherein said oscillator may be a voltage controlled oscillator (VCO) operating near a desired frequency used to generate an output signal. The clock noise mitigation may accomplished by portion of said VCO signal being fed into a first dividing circuit capable of dividing by a given number M, and a second dividing circuit, N, wherein said first and second dividing circuits may be capable of producing a signal close to the frequency of a reference oscillator, said VCO signal may then be compared via a phase comparator to a reference frequency and wherein the phase comparator signal may then be fed back to the VCO such that its frequency will “lock” to said reference oscillator. The M and N dividers may be set to enable the frequency increments to be as small as desired and may be dynamically programmable. Depending on the communication channels being used, the frequency of the clock may modified either up or down to avoid interference.
摘要翻译：本发明的一个实施例提供了一种装置，包括能够产生时钟信号的振荡器，其中所述装置能够使用频率自适应算法，技术，过程或系统进行时钟噪声抑制。并且其中所述振荡器可以是在用于产生输出信号的期望频率附近操作的压控振荡器（VCO）。时钟噪声减轻可以通过将所述VCO信号的一部分馈送到能够除以给定数量M的第一分频电路和第二分频电路N来实现，其中所述第一和第二分频电路可以产生信号接近参考振荡器的频率，然后可以将所述VCO信号经由相位比较器与参考频率进行比较，并且其中相位比较器信号然后可被反馈到VCO，使得其频率将“锁定”到所述参考振荡器。可以将M和N分频器设置为使得频率增量能够根据需要变得小，并且可以是动态可编程的。根据正在使用的通信信道，时钟的频率可以上下修改，以避免干扰。

3. 发明申请

US20060125703A1 Slot antenna having a MEMS varactor for resonance frequency tuning 有权
标题翻译：具有用于共振频率调谐的MEMS变容二极管的天线天线
公开(公告)号：US20060125703A1
公开(公告)日：2006-06-15
申请号：US11013594
申请日：2004-12-14
申请人： Qing Ma , Xintian Lin , Al Bettner
发明人： Qing Ma , Xintian Lin , Al Bettner
IPC分类号： H01Q13/10
CPC分类号： H01Q13/103
摘要： Briefly, in accordance with one embodiment of the invention, a slot antenna may include a primary slot and one or more secondary slots. The size of the antenna may be reduced by adding one or more of the secondary slots which may add additional inductance to the antenna. Furthermore, the size of the antenna may be reduced by increasing the inductance of the secondary slots via increasing the length of the slots or by changing the shape of the slots. The antenna may include one or more MEMS varactors coupled to one or more of the secondary slots. The resonant frequency of the slot antenna may be tuned to a desired frequency by changing the capacitance value of one or more of the MEMS varactors to a desired capacitance value.
摘要翻译：简而言之，根据本发明的一个实施例，缝隙天线可以包括主槽和一个或多个次槽。可以通过增加一个或多个次级槽来减小天线的尺寸，这可能为天线增加额外的电感。此外，可以通过增加槽的长度或通过改变槽的形状来增加辅助槽的电感来减小天线的尺寸。天线可以包括耦合到一个或多个次级插槽的一个或多个MEMS变容二极管。可以通过将一个或多个MEMS可变电抗器的电容值改变为期望的电容值来将缝隙天线的谐振频率调谐到期望的频率。

4. 发明授权

US07167726B2 Multi-mode antenna system for a computing device and method of operation 有权
标题翻译：用于计算设备的多模式天线系统和操作方法
公开(公告)号：US07167726B2
公开(公告)日：2007-01-23
申请号：US10367233
申请日：2003-02-14
申请人： Prosenjit Ghosh , Al Bettner , Alan E. Waltho
发明人： Prosenjit Ghosh , Al Bettner , Alan E. Waltho
IPC分类号： H04B1/38 , H04M1/00
CPC分类号： H01Q1/2266 , G06F1/1616 , G06F1/1698 , H01Q1/22 , H01Q1/243 , H01Q21/28
摘要： An antenna system for a computing device operable in multiple communication modes.
摘要翻译：一种用于可在多种通信模式下操作的计算装置的天线系统。

5. 发明申请

US20060290434A1 Apparatus, system and method capable of clock noise mitigation using a frequency adaptive process 有权
标题翻译：能够使用频率自适应处理来对噪声进行减噪的装置，系统和方法
公开(公告)号：US20060290434A1
公开(公告)日：2006-12-28
申请号：US11169365
申请日：2005-06-28
申请人： Al Bettner , Xintian Lin , Kevin Slattery
发明人： Al Bettner , Xintian Lin , Kevin Slattery
IPC分类号： H03L7/00
CPC分类号： H03L7/18
摘要： An embodiment of the present invention provides an apparatus, comprising an oscillator capable of generating a clock signal, wherein said apparatus is capable of clock noise mitigation using a frequency adaptive algorithm, technique, process or system. And wherein said oscillator may be a voltage controlled oscillator (VCO) operating near a desired frequency used to generate an output signal. The clock noise mitigation may accomplished by portion of said VCO signal being fed into a first dividing circuit capable of dividing by a given number M, and a second dividing circuit, N, wherein said first and second dividing circuits may be capable of producing a signal close to the frequency of a reference oscillator, said VCO signal may then be compared via a phase comparator to a reference frequency and wherein the phase comparator signal may then be fed back to the VCO such that its frequency will “lock” to said reference oscillator. The M and N dividers may be set to enable the frequency increments to be as small as desired and may be dynamically programmable. Depending on the communication channels being used, the frequency of the clock may modified either up or down to avoid interference.
摘要翻译：本发明的一个实施例提供了一种装置，包括能够产生时钟信号的振荡器，其中所述装置能够使用频率自适应算法，技术，过程或系统进行时钟噪声抑制。并且其中所述振荡器可以是在用于产生输出信号的期望频率附近操作的压控振荡器（VCO）。时钟噪声减轻可以通过将所述VCO信号的一部分馈送到能够除以给定数量M的第一分频电路和第二分频电路N来实现，其中所述第一和第二分频电路可以产生信号接近参考振荡器的频率，然后可以将所述VCO信号经由相位比较器与参考频率进行比较，并且其中相位比较器信号然后可被反馈到VCO，使得其频率将“锁定”到所述参考振荡器。可以将M和N分频器设置为使得频率增量能够根据需要变得小，并且可以是动态可编程的。根据正在使用的通信信道，时钟的频率可以上下修改，以避免干扰。

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