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    • 7. 发明授权
    • Selective etch of high-k dielectric material
    • 高k介电材料的选择性蚀刻
    • US08124538B2
    • 2012-02-28
    • US12422108
    • 2009-04-10
    • In Deog BaeQian FuWonchul LeeShenjian Liu
    • In Deog BaeQian FuWonchul LeeShenjian Liu
    • H01L21/302
    • H01L21/31122
    • A method for selectively etching a high-k dielectric layer with respect to a polysilicon material is provided. The high-k dielectric layer is partially removed by Ar sputtering, and then the high-k dielectric layer is etched using an etching gas comprising BCl3. The high-k dielectric layer and the polysilicon material may be formed on a substrate. In order to partially remove the high-k dielectric layer, a sputtering gas containing Ar is provided into an etch chamber in which the substrate is placed, a plasma is generated from the sputtering gas, and then the sputtering gas is stopped. In order to etch the high-k dielectric layer, the etching gas is provided into the etch chamber, a plasma is generated from the etching gas, and then the etching gas is stopped.
    • 提供了一种相对于多晶硅材料选择性地蚀刻高k电介质层的方法。 通过Ar溅射部分去除高k电介质层,然后使用包含BCl 3的蚀刻气体蚀刻高k电介质层。 高k电介质层和多晶硅材料可以形成在衬底上。 为了部分去除高k电介质层,将含有Ar的溅射气体设置在其中放置基板的蚀刻室中,从溅射气体产生等离子体,然后停止溅射气体。 为了蚀刻高k电介质层,蚀刻气体被提供到蚀刻室中,从蚀刻气体产生等离子体,然后停止蚀刻气体。
    • 10. 发明授权
    • Plasma etch method to reduce micro-loading
    • 等离子蚀刻法减少微载荷
    • US08901004B2
    • 2014-12-02
    • US12840034
    • 2010-07-20
    • Tom KampQian FuI. C. JangLinda BralyShenjian Liu
    • Tom KampQian FuI. C. JangLinda BralyShenjian Liu
    • H01L21/311C03C15/00C03C25/68C23F1/00H01L21/768H01L21/3065
    • H01L21/76816H01L21/3065
    • A method of producing plurality of etched features in an electronic device is disclosed that avoids micro-loading problems thus maintaining more uniform sidewall profiles and more uniform critical dimensions. The method comprises performing a first time-divisional plasma etch process step within a plasma chamber to a first depth of the plurality of etched features, and performing a flash process step to remove any polymers from exposed surfaces of the plurality of etched features without requiring an oxidation step. The flash process step is performed independently of the time-divisional plasma etch step. A second time-divisional plasma etch process step is performed within the plasma chamber to a second depth of the plurality of etched features. The method may be repeated until a desired etch depth is reached.
    • 公开了一种在电子设备中产生多个蚀刻特征的方法,其避免微加载问题,从而保持更均匀的侧壁轮廓和更均匀的临界尺寸。 该方法包括在等离子体室内执行第一时分等离子体蚀刻工艺步骤至多个蚀刻特征的第一深度,以及执行闪光处理步骤以从多个蚀刻特征的暴露表面去除任何聚合物,而不需要 氧化步骤。 独立于分时等离子体蚀刻步骤执行闪光处理步骤。 在等离子体室内执行第二分时等离子体蚀刻工艺步骤到多个蚀刻特征的第二深度。 可以重复该方法直到达到期望的蚀刻深度。