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1. 发明公开

EP0461896A2 Digital signal processing system 失效
标题翻译：数字信号处理系统。
公开(公告)号：EP0461896A2
公开(公告)日：1991-12-18
申请号：EP91305350.0
申请日：1991-06-13
申请人： QUESTECH LIMITED
发明人： Tyson, Peter
IPC分类号： H04N9/64 , H04N9/45
CPC分类号： H04N9/64
摘要： A processor for use in synchronising the sampling frequency of an analogue to digital converter (5) to that of an analogue colour television signal to be digitised, comprises a signal processor (12) which is arranged to process signal samples received from the converter (5) during a colour burst of the television signal in order to calculate any phase error, to correct any phase error above a given magnitude by controlling the phase shift provided by a phase shifter (7) connected between the analogue to digital converter and a clock oscillator (6) defining the sampling frequency, and to correct any phase error below a given magnitude by adjusting the frequency of the clock oscillator (6).
摘要翻译：一种用于将模数转换器（5）的采样频率与要数字化的模拟彩色电视信号的采样频率同步的处理器包括信号处理器（12），其被配置为处理从转换器（5）接收的信号样本），以便计算任何相位误差，以通过控制由连接在模数转换器和时钟振荡器之间的移相器（7）提供的相移来校正高于给定幅度的任何相位误差（6）定义采样频率，并通过调整时钟振荡器（6）的频率来校正低于给定幅度的任何相位误差。

2. 发明授权

EP0461896B1 Digital signal processing system 失效
标题翻译：数字信号处理系统
公开(公告)号：EP0461896B1
公开(公告)日：1997-11-12
申请号：EP91305350.0
申请日：1991-06-13
申请人： QUESTECH LIMITED
发明人： Tyson, Peter
IPC分类号： H04N9/64 , H04N9/45
CPC分类号： H04N9/64

3. 发明公开

EP0565333A2 Apparatus for processing a pal colour television signal 失效
标题翻译： Vorrichtung zur Verarbeitung eines Farbfernsehsignals nach der PAL-Norm。
公开(公告)号：EP0565333A2
公开(公告)日：1993-10-13
申请号：EP93302665.0
申请日：1993-04-05
申请人： QUESTECH LIMITED
发明人： Tyson, Peter
IPC分类号： H04N9/64 , H04N9/45 , H04N11/16
CPC分类号： H04N11/165 , H04N9/44 , H04N9/45 , H04N9/64
摘要： The phase of a burst locked oscillator (7) controlling a PAL chrominance decoder (4) is controlled by a processor including means (11,12) for summing V and U chrominance signal components of picture signal samples provided by the decoder, means (13 to 16) for protecting the difference between summed V from alternate lines of the picture signal, means (20,21) for integrating the V-difference value over a field of the television signal, and a second order loop filter (23) via which the integrated signal is applied to the oscillator (7) in a feed back loop to correct the phase of the oscillator.
摘要翻译：控制PAL色度解码器（4）的突发锁定振荡器（7）的相位由包括用于对由解码器提供的图像信号样本的V和U色度信号分量进行求和的装置（11,12）来控制，装置（13 至16），用于保护来自图像信号的交替行的求和的V之间的差异，用于在电视信号的场上积分V差值的装置（20,21）和二阶环路滤波器（23）在反馈回路中将积分信号施加到振荡器（7）以校正振荡器的相位。

4. 发明公开

EP0565333A3 Apparatus for processing a pal colour television signal 失效
标题翻译：用于处理PAL彩色电视信号的装置
公开(公告)号：EP0565333A3
公开(公告)日：1994-05-11
申请号：EP93302665.0
申请日：1993-04-05
申请人： QUESTECH LIMITED
发明人： Tyson, Peter
IPC分类号： H04N9/64 , H04N9/45 , H04N11/16
CPC分类号： H04N11/165 , H04N9/44 , H04N9/45 , H04N9/64
摘要： The phase of a burst locked oscillator (7) controlling a PAL chrominance decoder (4) is controlled by a processor including means (11,12) for summing V and U chrominance signal components of picture signal samples provided by the decoder, means (13 to 16) for protecting the difference between summed V from alternate lines of the picture signal, means (20,21) for integrating the V-difference value over a field of the television signal, and a second order loop filter (23) via which the integrated signal is applied to the oscillator (7) in a feed back loop to correct the phase of the oscillator.

5. 发明公开

EP0461896A3 Digital signal processing system 失效
标题翻译：数字信号处理系统
公开(公告)号：EP0461896A3
公开(公告)日：1993-06-09
申请号：EP91305350.0
申请日：1991-06-13
申请人： QUESTECH LIMITED
发明人： Tyson, Peter
IPC分类号： H04N9/64 , H04N9/45
CPC分类号： H04N9/64
摘要： A processor for use in synchronising the sampling frequency of an analogue to digital converter (5) to that of an analogue colour television signal to be digitised, comprises a signal processor (12) which is arranged to process signal samples received from the converter (5) during a colour burst of the television signal in order to calculate any phase error, to correct any phase error above a given magnitude by controlling the phase shift provided by a phase shifter (7) connected between the analogue to digital converter and a clock oscillator (6) defining the sampling frequency, and to correct any phase error below a given magnitude by adjusting the frequency of the clock oscillator (6).

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