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1. 发明公开

EP4307592A2 BIT ALLOCATION FOR ENCODING AND DECODING 审中-实审
公开(公告)号：EP4307592A2
公开(公告)日：2024-01-17
申请号：EP23212192.1
申请日：2017-12-07
申请人： QUALCOMM Incorporated
发明人： JIANG, Jing , SARKIS, Gabi , YANG, Yang , KUDEKAR, Shrinivas , SORIAGA, Joseph Binamira , SANKAR, Hari , XU, Changlong , WEI, Chao
IPC分类号： H04L1/1812
摘要： Methods, systems, and devices for encoding and decoding are described. To encode a vector, an encoder allocates information bits of the vector to channel instances of a channel that are separated into groups. The groups may vary in size and allocation of the information bits is based on a base sequence of a given length. During decoding, a decoder assigns different bit types to channels instances by dividing a codeword into a plurality of groups and assigning bit types to channel instances of the plurality of groups using the base sequence.

2. 发明公开

EP3577763A1 MULTIPLE LOW DENSITY PARITY CHECK (LDPC) BASE GRAPH DESIGN 审中-公开
公开(公告)号：EP3577763A1
公开(公告)日：2019-12-11
申请号：EP18703163.8
申请日：2018-01-19
申请人： Qualcomm Incorporated
发明人： SORIAGA, Joseph Binamira , SARKIS, Gabi , KUDEKAR, Shrinivas , RICHARDSON, Thomas , LONCKE, Vincent
IPC分类号： H03M13/03 , H03M13/11 , H03M13/00

3. 发明申请

WO2018236831A1 COMMUNICATION TECHNIQUES WITH SELF-DECODABLE REDUNDANCY VERSIONS (RVs) USING SYSTEMATIC CODES 审中-公开
公开(公告)号：WO2018236831A1
公开(公告)日：2018-12-27
申请号：PCT/US2018/038229
申请日：2018-06-19
申请人： QUALCOMM INCORPORATED
发明人： SORIAGA, Joseph Binamira , KUDEKAR, Shrinivas , RICHARDSON, Thomas , SARKIS, Gabi , SANKAR, Hari , JIANG, Jing
IPC分类号： H04L1/18
摘要： The present disclosure provides self-decodable redundancy versions for a systematic code. An apparatus for wireless communications includes at least one processor coupled with a memory and comprising encoder circuitry configured to encode a set of information bits using a systematic code to generate an encoded bit stream with information bits and parity bits, and bit ordering circuitry configured to re-order bits in the encoded bit stream to distribute the information bits and the parity bits. The apparatus includes a transmitter configured to transmit the re-ordered bits in accordance with a radio technology via one or more antenna elements situated proximate the receiver.

4. 发明申请

WO2018136430A2 DESIGN OF ROBUST AND UNIVERSAL POLAR CODES 审中-公开
公开(公告)号：WO2018136430A2
公开(公告)日：2018-07-26
申请号：PCT/US2018/013901
申请日：2018-01-16
申请人： QUALCOMM INCORPORATED
发明人： KUDEKAR, Shrinivas , SARKIS, Gabi , RICHARDSON, Thomas
IPC分类号： H03M13/13
摘要： Aspects of the disclosure relate to polar coding. A polar codeword may be generated by sorting a plurality of synthetic channels utilized for transmission of the polar codeword over an air interface in order of reliability utilizing a convex combination of the mutual information calculated for each synthetic channel based on an Additive White Gaussian Noise (AWGN) channel and the mutual information calculated for each synthetic channel based on a binary erasure channel. A polar codeword may further be generated by sorting the plurality of synthetic channels in order of reliability utilizing cumulative sums calculated for each synthetic channel. Each cumulative sum may be calculated from a binary representation of a position of the synthetic channel within the plurality of synthetic channels.

5. 发明申请

WO2018126496A1 BIT ALLOCATION FOR ENCODING AND DECODING 审中-公开
公开(公告)号：WO2018126496A1
公开(公告)日：2018-07-12
申请号：PCT/CN2017/071363
申请日：2017-01-17
申请人： QUALCOMM INCORPORATED , JIANG, Jing , SARKIS, Gabi , YANG, Yang , KUDEKAR, Shrinivas , SORIAGA, Joseph Binamira , SANKAR, Hari , XU, Changlong , WEI, Chao
发明人： JIANG, Jing , SARKIS, Gabi , YANG, Yang , KUDEKAR, Shrinivas , SORIAGA, Joseph Binamira , SANKAR, Hari , XU, Changlong , WEI, Chao
IPC分类号： H03M13/00
摘要： Methods, systems, and devices for encoding and decoding are described. To encode a vector, an encoder allocates information bits of the vector to channel instances of a channel that are separated into groups. The groups may vary in size and allocation of the information bits is based on a base sequence of a given length. During decoding, a decoder assigns different bit types to channels instances by dividing a codeword into a plurality of groups and assigning bit types to channel instances of the plurality of groups using the base sequence.

6. 发明申请

WO2017034754A1 EFFICIENT ENCODING AND DECODING ARCHITECTURE FOR HIGH-RATE DATA TRANSFER THROUGH A PARALLEL BUS 审中-公开
标题翻译：通过并行总线实现高速数据传输的有效编码和解码架构
公开(公告)号：WO2017034754A1
公开(公告)日：2017-03-02
申请号：PCT/US2016/044592
申请日：2016-07-28
申请人： QUALCOMM INCORPORATED
发明人： KUDEKAR, Shrinivas , NIESEN, Urs
IPC分类号： G06F13/42
CPC分类号： G06F13/4221 , G06F13/4068 , G06F13/4204
摘要： System, methods, and apparatus are described that facilitate transmission/reception of data over a multi-line parallel bus. In an example, the apparatus selects from a sequential series of data bits a plurality of data bits for transmission over a plurality of parallel bus lines. For each bus line of the plurality of parallel bus lines, the apparatus compares a state of a current data bit selected for transmission on a current bus line during a current clock cycle with one or more conditions related to the current bus line or at least one bus line adjacent to the current bus line, wherein the one or more conditions includes a state of two data bits respectively transmitted on two bus lines adjacent to the current bus line during a previous clock cycle, and determines whether to transmit the current data bit on the current bus line based on the comparison.
摘要翻译：描述了通过多线并行总线进行数据传输/接收的系统，方法和装置。在一个示例中，该装置从连续的数据比特序列中选择多个数据比特，以便在多个并行总线上进行传输。对于多条并行总线线路中的每条总线，该装置将当前时钟周期内当前总线上选择的用于传输的当前数据位的状态与与当前总线相关的一个或多个条件或至少一个总线线路，其中所述一个或多个条件包括在先前时钟周期期间分别在与当前总线线路相邻的两条总线上传输的两个数据位的状态，并且确定是否将当前数据位传送到目前公交线路基于比较。

7. 发明申请

WO2019032881A1 SELF-DECODABLE RETRANSMISSION FOR LDPC CODE BASED HARQ SYSTEMS 审中-公开
公开(公告)号：WO2019032881A1
公开(公告)日：2019-02-14
申请号：PCT/US2018/046083
申请日：2018-08-09
申请人： QUALCOMM INCORPORATED
发明人： SORIAGA, Joseph, Binamira , KUDEKAR, Shrinivas , RICHARDSON, Thomas, Joseph , SARKIS, Gabi , JIANG, Jing
IPC分类号： H03M13/11 , H03M13/27
摘要： Methods, systems, and devices for wireless communication are described. In some examples, a wireless device (e.g., a user equipment (UE) or a base station) may encode a codeword from a set of information bits using an LDPC code. The wireless device may then transmit multiple versions of the codeword to improve the chances of the codeword being received. In some aspects, the wireless device may use the techniques herein to generate self- decodable redundancy versions of the codeword to be transmitted to the receiving device. Accordingly, a receiving device may be able to identify information bits from one or more redundancy versions of the codeword even if the receiving device failed to receive an original transmission of the codeword. Specifically, the wireless device may re-order bits in an encoded bit stream for a retransmission before storing these bits in a circular buffer. Once the bits are re-ordered and stored in the circular buffer, the wireless device may select bits from the buffer and transmit the selected bits to the receiving device. By re-ordering bits in the encoded bit stream, the wireless device may ensure that sets of information bits are distributed evenly across the selected bits. Accordingly, when the wireless device selects bits from the circular buffer for the retransmission, the retransmission may include sufficient systematic bits to enable the retransmission to be decoded by the receiving device with or without being combined with an original transmission.

8. 发明申请

WO2018128679A2 EFFICIENT LIST DECODING OF LDPC CODES 审中-公开
公开(公告)号：WO2018128679A2
公开(公告)日：2018-07-12
申请号：PCT/US2017/059835
申请日：2017-11-03
申请人： QUALCOMM INCORPORATED
发明人： KUDEKAR, Shrinivas , RICHARDSON, Thomas Joseph , SARKIS, Gabi , LONCKE, Vincent
CPC分类号： H03M13/1125 , H03M13/09 , H03M13/1111 , H03M13/1128 , H03M13/116 , H03M13/1185 , H03M13/2906 , H03M13/3707 , H03M13/3723 , H03M13/451 , H03M13/6306 , H03M13/6393 , H03M13/6561 , H04L1/0009 , H04L1/0045
摘要： Certain aspects of the present disclosure generally relate to methods and apparatus for decoding low density parity check (LDPC) codes, and more particularly to an efficient list decoder for list decoding low density parity check (LDPC) codes.

9. 发明申请

WO2017218667A1 METHODS AND APPARATUS FOR COMPACTLY DESCRIBING LIFTED LOW-DENSITY PARITY-CHECK (LDPC) CODES 审中-公开
标题翻译：用于紧凑描述提升低密度校验（LDPC）代码的方法和设备
公开(公告)号：WO2017218667A1
公开(公告)日：2017-12-21
申请号：PCT/US2017/037468
申请日：2017-06-14
申请人： QUALCOMM INCORPORATED
发明人： KUDEKAR, Shrinivas , RICHARDSON, Thomas Joseph
IPC分类号： H03M13/11 , H03M13/03
摘要： Certain aspects of the present disclosure generally relate to techniques for compactly describing lifted quasi-cyclic low-density parity-check (LDPC) codes. A method for wireless communications by a transmitting device generally includes selecting a first lifting size value Z and a first set of lifting values for generating a first lifted LDPC code (1302). The first lifted LDPC code is generated by applying the first set of lifting values to interconnect edges in Z copies of a base parity check matrix (PCM) to obtain a first lifted PCM corresponding to the first lifted LDPC code (1304). The method further includes determining a second set of lifting values for generating a second lifted PCM corresponding to a second lifted LDPC code for a second lifting size value based on the first set of lifting values (1306), encoding a set of information bits based on at least one of the first lifted LDPC code or the second lifted LDPC code to produce a code word (1308) and transmitting the code word (1310).
摘要翻译：本公开的某些方面一般涉及用于紧凑地描述提升的准循环低密度奇偶校验（LDPC）码的技术。由发射设备进行无线通信的方法通常包括选择第一提升大小值Z和第一组提升值以生成第一提升LDPC码（1302）。通过应用第一组提升值来互连基本奇偶校验矩阵（PCM）的Z个副本中的边缘以获得对应于第一提升LDPC码（1304）的第一提升PCM，来生成第一提升LDPC码。该方法进一步包括基于第一组提升值确定用于产生对应于第二提升尺寸值的第二提升尺寸值的第二提升LDPC码的第二提升值（1306），基于第一组提升值对信息比特集进行编码所述第一提升LDPC码或所述第二提升LDPC码中的至少一个以产生码字（1308）并发送所述码字（1310）。

10. 发明申请

WO2017095595A1 JOINT CROSSTALK-AVOIDANCE AND ERROR-CORRECTION CODING FOR PARALLEL DATA BUSSES 审中-公开
标题翻译：并行数据总线的联合串扰避免和纠错编码
公开(公告)号：WO2017095595A1
公开(公告)日：2017-06-08
申请号：PCT/US2016/060687
申请日：2016-11-04
申请人： QUALCOMM INCORPORATED
发明人： NIESEN, Urs , KUDEKAR, Shrinivas
IPC分类号： H04L1/00 , H04B3/32
CPC分类号： H04L1/0041 , G06F13/4208 , H04B3/32 , H04L1/0042 , H04L1/08 , H04L25/14
摘要： System, methods, and apparatus are described that facilitate transmission/reception of data over a multi-line parallel bus. In an example, the apparatus transmits data bits over a parallel bus includes determining from a prior bus state, a plurality of free wires in the bus for a current bus state, where each free wire satisfies a crosstalk-avoidance constraint in the current bus state for all values of a bit transmitted on the free wire. The apparatus may encode a plurality of data bits using a crosstalk avoidance encoder to obtain a CAC-encoded word, compute an error detection or correction code for the CAC-encoded word, assign bits of the error detection or correction code to the plurality of free wires for transmission during the current bus state, and assign the CAC-encoded word to unassigned wires of the bus for transmission during the current bus state.
摘要翻译：描述了便于通过多线并行总线传输/接收数据的系统，方法和设备。在一个示例中，该装置通过并行总线传输数据比特包括根据先前的总线状态确定总线中的多个空闲线以用于当前总线状态，其中每个空闲线满足当前总线状态中的串扰避免约束对于在免费线路上传输的所有比特值。该装置可以使用串扰避免编码器对多个数据比特进行编码以获得CAC编码的字，计算CAC编码的字的错误检测或校正码，将错误检测或校正码的比特分配给多个空闲用于在当前总线状态期间进行传输，并且在当前总线状态期间将CAC编码字分配给总线的未分配导线以用于传输。

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