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1. 发明申请

US20180074727A1 Managing Data Flow in Heterogeneous Computing 审中-公开
公开(公告)号：US20180074727A1
公开(公告)日：2018-03-15
申请号：US15266656
申请日：2016-09-15
申请人： QUALCOMM Incorporated
发明人： Han Zhao , Arun Raman , Aravind Natarajan
IPC分类号： G06F3/06 , G06F12/0855 , G06F12/0811 , G06F12/084
CPC分类号： G06F3/0613 , G06F3/0631 , G06F3/0656 , G06F3/0685 , G06F9/52 , G06F9/544 , G06F12/0811 , G06F12/084 , G06F12/0855 , G06F2212/283 , G06F2212/314
摘要： Embodiments include computing devices, apparatus, and methods implemented by the apparatus for implementing data flow management on a computing device. Embodiment methods may include initializing a buffer partition of a first memory of a first heterogeneous processing device for an output of execution of a first iteration of a first operation by the first heterogeneous processing device on which a first iteration of a second operation assigned for execution by a second heterogeneous processing device depends. Embodiment methods may include identifying a memory management operation for transmitting the output by the first heterogeneous processing device from the buffer partition as an input to the second heterogeneous processing device. Embodiment methods may include allocating a second memory for storing data for an iteration executed by a third heterogeneous processing device to minimize a number of memory management operations for the second allocated memory.

2. 发明申请

US20170206035A1 Random-Access Disjoint Concurrent Sparse Writes to Heterogeneous Buffers 审中-公开
公开(公告)号：US20170206035A1
公开(公告)日：2017-07-20
申请号：US15000667
申请日：2016-01-19
申请人： QUALCOMM Incorporated
发明人： Tushar Kumar , Aravind Natarajan , Dario Suarez Gracia
IPC分类号： G06F3/06 , G06F12/10
CPC分类号： G06F3/0656 , G06F3/061 , G06F3/0673 , G06F9/3834 , G06F9/467 , G06F9/544 , G06F12/1072 , G06F2212/65
摘要： Methods, devices, and non-transitory processor-readable storage media for a computing device to merge concurrent writes from a plurality of processing units to a buffer associated with an application. An embodiment method executed by a processor may include identifying a plurality of concurrent requests to access the buffer that are sparse, disjoint, and write-only, configuring a write-set for each of the plurality of processing units, executing the plurality of concurrent requests to access the buffer using the write-sets, determining whether each of the plurality of concurrent requests to access the buffer is complete, obtaining a buffer index and data via the write-set of each of the plurality of processing units, and writing to the buffer using the received buffer index and data via the write-set of each of the plurality of processing units in response to determining that each of the plurality of concurrent requests to access the buffer is complete.

3. 发明申请

US20180060130A1 Speculative Loop Iteration Partitioning for Heterogeneous Execution 审中-公开
公开(公告)号：US20180060130A1
公开(公告)日：2018-03-01
申请号：US15245604
申请日：2016-08-24
申请人： QUALCOMM Incorporated
发明人： Arun Raman , Han Zhao , Aravind Natarajan
IPC分类号： G06F9/50
CPC分类号： G06F9/5027 , G06F9/5066 , G06F2209/5017
摘要： Embodiments include computing devices, apparatus, and methods implemented by the apparatus for implementing speculative loop iteration partitioning (SLIP) for heterogeneous processing devices. A computing device may receive iteration information for a first partition of iterations of a repetitive process and select a SLIP heuristic based on available SLIP information and iteration information for the first partition. The computing device may determine a split value for the first partition using the SLIP heuristic, and partition the first partition using the split value to produce a plurality of next partitions.

4. 发明申请

US20180052776A1 Shared Virtual Index for Memory Object Fusion in Heterogeneous Cooperative Computing 审中-公开
公开(公告)号：US20180052776A1
公开(公告)日：2018-02-22
申请号：US15239937
申请日：2016-08-18
申请人： QUALCOMM Incorporated
发明人： Han Zhao , Arun Raman , Aravind Natarajan
IPC分类号： G06F12/109
CPC分类号： G06F12/109 , G06F2212/1041 , G06F2212/657
摘要： Embodiments include computing devices, apparatus, and methods implemented by the apparatus for implementing shared virtual index translation on a computing device. The computing device may receive a base virtual address for storing an output of a kernel function execution to a dedicated memory and determine whether the virtual address is in a range of virtual addresses for a privatized output buffer within the dedicated memory, which may be smaller than the dedicated memory. The computing device may calculate a first modified physical address using a physical address mapped to the base virtual address and an offset of a first processing device associated with the dedicated memory in response to determining that the base virtual address is in the range of virtual addresses. The computing device may store the output of the kernel function execution to the privatized output buffer at the first modified physical address.

5. 发明申请

US20160267005A1 MEMORY RECLAMATION ON A COMPUTING DEVICE 审中-公开
标题翻译：计算机设备的记忆恢复
公开(公告)号：US20160267005A1
公开(公告)日：2016-09-15
申请号：US14824142
申请日：2015-08-12
申请人： QUALCOMM Incorporated
发明人： Aravind Natarajan , Gheorghe Calin Cascaval
IPC分类号： G06F12/02 , G06F3/06
CPC分类号： G06F12/0253 , G06F3/0608 , G06F3/065 , G06F3/068 , G06F9/5016 , G06F9/5022 , G06F2212/702
摘要： Various embodiments include methods for reclaiming memory in a computing device that may include storing a first pointer pointing to a first memory location storing the beginning of a data structure in which a plurality of threads executing on the computing device may concurrently access the data structure and storing a second pointer pointing to the current beginning of the data structure. In response to performing an operation on the data structure that changes the location of the beginning of the data structure from the first memory location to a second memory location, the second pointer may be updated to point to the second memory location. In response to determining that memory allocated to the data structure may be reclaimed, memory allocated to the data structure, including memory located at the first memory location pointed to by the first pointer, may be reclaimed.
摘要翻译：各种实施例包括用于在计算设备中回收存储器的方法，其可以包括存储指向存储数据结构的开始的第一存储器位置的第一指针，其中在计算设备上执行的多个线程可以并发访问数据结构并存储指向数据结构的当前开始的第二个指针。响应于对将数据结构的开始位置从第一存储器位置改变到第二存储器位置的数据结构执行操作，可以更新第二指针以指向第二存储器位置。响应于确定分配给数据结构的存储器可以被回收，可以回收分配给数据结构的存储器，包括位于第一指针指向的第一存储器位置处的存储器。

6. 发明申请

US20170286182A1 Identifying Enhanced Synchronization Operation Outcomes to Improve Runtime Operations 审中-公开
公开(公告)号：US20170286182A1
公开(公告)日：2017-10-05
申请号：US15085108
申请日：2016-03-30
申请人： QUALCOMM Incorporated
发明人： Dario Suarez Gracia , Gheorghe Cascaval , Han Zhao , Tushar Kumar , Aravind Natarajan , Arun Raman
IPC分类号： G06F9/52
CPC分类号： G06F9/52 , G06F9/46
摘要： Embodiments include computing devices, systems, and methods identifying enhanced synchronization operation outcomes. A computing device may receive a first resource access request for a first resource of a computing device including a first requester identifier from a first computing element of the computing device. The computing device may also receive a second resource access request for the first resource including a second requester identifier from a second computing element of the computing device. The computing device may grant the first computing element access to the first resource based on the first resource access request, and return a response to the second computing element including the first requester identifier as a winner computing element identifier.

7. 发明授权

US09733978B2 Data management for multiple processing units using data transfer costs 有权
公开(公告)号：US09733978B2
公开(公告)日：2017-08-15
申请号：US14837156
申请日：2015-08-27
申请人： QUALCOMM Incorporated
发明人： Dario Suarez Gracia , Tushar Kumar , Aravind Natarajan , Ravish Hastantram , Gheorghe Calin Cascaval , Han Zhao
IPC分类号： G06F9/46 , G06F15/173 , G06F1/00 , G06F9/48 , G06F9/50 , G06F12/0806 , G06F12/0862 , G06F12/12 , G06F11/34
CPC分类号： G06F9/48 , G06F9/4806 , G06F9/4831 , G06F9/4837 , G06F9/4843 , G06F9/4881 , G06F9/4893 , G06F9/50 , G06F9/5005 , G06F9/5011 , G06F9/5016 , G06F9/5022 , G06F9/5027 , G06F9/5033 , G06F9/5038 , G06F9/5044 , G06F9/505 , G06F9/5055 , G06F9/5083 , G06F9/5094 , G06F11/3419 , G06F11/3466 , G06F12/0806 , G06F12/0862 , G06F12/12 , G06F12/128 , G06F2212/1016 , G06F2212/62 , Y02D10/22 , Y02D10/24
摘要： Various embodiments include methods for data management in a computing device utilizing a plurality of processing units. Embodiment methods may include generating a data transfer heuristic model based on measurements from a plurality of sample data transfers between a plurality of data storage units. The generated data transfer heuristic model may be used to calculate data transfer costs for each of a plurality of tasks. The calculated data transfer costs may be used to schedule execution of the plurality of tasks in an execution order on selected ones of the plurality of processing units. The data transfer heuristic model may be updated based on measurements of data transfers occurring during the executions of the plurality of tasks (e.g., time, power consumption, etc.). Code executing on the processing units may indicate to a runtime when certain data blocks are no longer needed and thus may be evicted and/or pre-fetched for others.

8. 发明申请

US20170060633A1 Data Management for Multiple Processing Units Using Data Transfer Costs 有权
标题翻译：使用数据传输成本的多个处理单元的数据管理
公开(公告)号：US20170060633A1
公开(公告)日：2017-03-02
申请号：US14837156
申请日：2015-08-27
申请人： QUALCOMM Incorporated
发明人： Dario Suarez Gracia , Tushar Kumar , Aravind Natarajan , Ravish Hastantram , Gheorghe Calin Cascaval , Han Zhao
IPC分类号： G06F9/50
CPC分类号： G06F9/48 , G06F9/4806 , G06F9/4831 , G06F9/4837 , G06F9/4843 , G06F9/4881 , G06F9/4893 , G06F9/50 , G06F9/5005 , G06F9/5011 , G06F9/5016 , G06F9/5022 , G06F9/5027 , G06F9/5033 , G06F9/5038 , G06F9/5044 , G06F9/505 , G06F9/5055 , G06F9/5083 , G06F9/5094 , G06F11/3419 , G06F11/3466 , G06F12/0806 , G06F12/0862 , G06F12/12 , G06F12/128 , G06F2212/1016 , G06F2212/62 , Y02D10/22 , Y02D10/24
摘要： Various embodiments include methods for data management in a computing device utilizing a plurality of processing units. Embodiment methods may include generating a data transfer heuristic model based on measurements from a plurality of sample data transfers between a plurality of data storage units. The generated data transfer heuristic model may be used to calculate data transfer costs for each of a plurality of tasks. The calculated data transfer costs may be used to schedule execution of the plurality of tasks in an execution order on selected ones of the plurality of processing units. The data transfer heuristic model may be updated based on measurements of data transfers occurring during the executions of the plurality of tasks (e.g., time, power consumption, etc.). Code executing on the processing units may indicate to a runtime when certain data blocks are no longer needed and thus may be evicted and/or pre-fetched for others.
摘要翻译：各种实施例包括利用多个处理单元的计算设备中的数据管理方法。实施方式可以包括基于来自多个数据存储单元之间的多个采样数据传输的测量来生成数据传输启发式模型。生成的数据传输启发式模型可用于计算多个任务中的每一个的数据传输成本。所计算的数据传输成本可以用于以多个处理单元中的选定的处理单元的执行顺序调度多个任务的执行。可以基于在执行多个任务期间发生的数据传输的测量（例如，时间，功耗等）来更新数据传输启发式模型。在处理单元上执行的代码可以向运行时指示某些数据块不再需要，并且因此可以被驱逐和/或预取其他数据块。

9. 发明申请

US20160292012A1 METHOD FOR EXPLOITING PARALLELISM IN TASK-BASED SYSTEMS USING AN ITERATION SPACE SPLITTER 有权
标题翻译：使用迭代空间分割器在基于任务的系统中开发并行的方法
公开(公告)号：US20160292012A1
公开(公告)日：2016-10-06
申请号：US14673857
申请日：2015-03-30
申请人： QUALCOMM Incorporated
发明人： Behnam ROBATMILI , Shaizeen Dilawarhusen Aga , Dario Suarez Gracia , Arun Raman , Aravind Natarajan , Gheorghe Calin Cascaval , Pablo Montesinos Ortego , Han Zhao
IPC分类号： G06F9/50
CPC分类号： G06F9/5066 , G06F9/5027
摘要： Embodiments include computing devices, systems, and methods for task-based handling of repetitive processes in parallel. At least one processor of the computing device, or a specialized hardware controller, may be configured to partition iterations of a repetitive process and assign the partitions to initialized tasks to be executed in parallel by a plurality of processor cores. Upon completing a task, remaining divisible partitions of the repetitive process of ongoing tasks may be subpartitioned and assigned to the ongoing task, and the completed task or a newly initialized task. Information about the iteration space for a repetitive process may be stored in a descriptor table, and status information for all partitions of a repetitive process stored in a status table. Each processor core may have an associated local table that tracks iteration execution of each task, and is synchronized with the status table.
摘要翻译：实施例包括用于并行地重复处理的基于任务的处理的计算设备，系统和方法。计算设备的至少一个处理器或专用硬件控制器可以被配置为分区重复过程的迭代，并且将分区分配给由多个处理器核并行执行的初始化任务。完成任务后，正在执行的任务的重复进程的剩余可分区可以被分分区并分配给正在进行的任务，以及完成的任务或新初始化的任务。关于重复过程的迭代空间的信息可以存储在描述符表中，以及存储在状态表中的重复进程的所有分区的状态信息。每个处理器核心可以具有跟踪每个任务的迭代执行的相关联的本地表，并且与状态表同步。

10. 发明授权

US10261831B2 Speculative loop iteration partitioning for heterogeneous execution 有权
公开(公告)号：US10261831B2
公开(公告)日：2019-04-16
申请号：US15245604
申请日：2016-08-24
申请人： QUALCOMM Incorporated
发明人： Arun Raman , Han Zhao , Aravind Natarajan
IPC分类号： G06F9/46 , G06F9/50
摘要： Embodiments include computing devices, apparatus, and methods implemented by the apparatus for implementing speculative loop iteration partitioning (SLIP) for heterogeneous processing devices. A computing device may receive iteration information for a first partition of iterations of a repetitive process and select a SLIP heuristic based on available SLIP information and iteration information for the first partition. The computing device may determine a split value for the first partition using the SLIP heuristic, and partition the first partition using the split value to produce a plurality of next partitions.

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