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1. 发明申请

WO2008064262A2 IMPROVED FREQUENCY CHANGER CIRCUITS 审中-公开
标题翻译：改进的变频器电路
公开(公告)号：WO2008064262A2
公开(公告)日：2008-05-29
申请号：PCT/US2007/085296
申请日：2007-11-20
申请人： QUALCOMM INCORPORATED , FILIPOVIC, Daniel, F. , KANG, Inyup
发明人： FILIPOVIC, Daniel, F. , KANG, Inyup
CPC分类号： H04B15/00 , H04B1/109
摘要： In accordance with one aspect of the disclosure, apparatus are provided. A filter is provided to receive from an antenna a receive signal of a given type and a low noise amplifier is provided to amplify the received signal. A translator down translates the receive signal carried at a radio frequency to be carried at an intermediate frequency. An I/Q channel separator is provided to separate the receive signal carried at the intermediate frequency into an analog in-phase (I) signal in an I channel and an analog quadrature-phase (Q) in a Q channel. An analog-to-digital (A/D) converter is provided to respectively convert the I signal and the Q signal to digital domain representations of the I signal and the Q signal. An intermodulation (IM) distortion avoider is provided to avoid IM distortion in the receive signal. The IM distortion avoider includes a carrier frequency exchanger to exchange an IM carrier frequency of IM distortion contained in the receive signal with a carrier frequency of the receive signal.
摘要翻译：根据本公开的一个方面，提供了一种装置。提供滤波器以从天线接收给定类型的接收信号，并且提供低噪声放大器来放大接收到的信号。翻译器将在射频下携带的接收信号转换为中频。提供I / Q信道分离器以将在中频处承载的接收信号分离成I信道中的模拟同相（I）信号和Q信道中的模拟正交相位（Q）。提供模数（A / D）转换器以分别将I信号和Q信号转换为I信号和Q信号的数字域表示。提供互调（IM）失真避免器以避免接收信号中的IM失真。 IM失真避免器包括载波频率交换器，以将接收信号中包含的IM失真的IM载波频率与接收信号的载波频率进行交换。

2. 发明申请

WO2010096710A2 METHODS AND APPARATUS FOR POWER CONTROL BASED ANTENNA SWITCHING 审中-公开
标题翻译：基于功率控制的天线开关的方法和装置
公开(公告)号：WO2010096710A2
公开(公告)日：2010-08-26
申请号：PCT/US2010/024811
申请日：2010-02-19
申请人： QUALCOMM INCORPORATED , FILIPOVIC, Daniel, F. , LI, Yong
发明人： FILIPOVIC, Daniel, F. , LI, Yong
IPC分类号： H04B7/06
CPC分类号： H04B7/0608 , H04B7/061
摘要： A method for selecting an antenna is described. The method may include transmitting using a first antenna with a first metric and a radio frequency (RF) chain for a first dwelling period. The method may include switching to transmitting using a second antenna with a second metric for a first testing period. The second antenna may use the same RF chain as the first antenna. The first metric may be compared with the second metric to determine an optimal antenna. The optimal antenna may be selected.
摘要翻译：描述用于选择天线的方法。该方法可以包括使用具有用于第一住宅周期的第一度量和射频（RF）链的第一天线进行发送。该方法可以包括在第一测试周期内使用具有第二度量的第二天线切换到发射。第二天线可以使用与第一天线相同的RF链。可以将第一度量与第二度量进行比较以确定最佳天线。可以选择最佳天线。

3. 发明申请

WO2009088788A1 INTERFERENCE DETECTION AND MITIGATION 审中-公开
标题翻译：干扰检测和缓解
公开(公告)号：WO2009088788A1
公开(公告)日：2009-07-16
申请号：PCT/US2008/088261
申请日：2008-12-23
申请人： QUALCOMM INCORPORATED , KOMNINAKIS, Christos , FILIPOVIC, Daniel, F.
发明人： KOMNINAKIS, Christos , FILIPOVIC, Daniel, F.
IPC分类号： H04B1/10 , H04B1/52
CPC分类号： H04B1/10 , H04B1/109 , H04B1/525
摘要： Techniques for detecting and mitigating interference are described. A device (e.g., a cellular phone) senses interference levels and digitally reconstructs the expected interference in the received signal. The device may correlate the reconstructed interference with the received signal and determine interference in the received signal based on correlation results. The device may adjust the operation of one or more circuit blocks (e.g., a mixer, an LNA, etc.) in a receiver based on the detected interference in the received signal. Alternatively or additionally, the device may condition the digital interference to obtain conditioned reconstructed interference matching the interference in the received signal and may then subtract the conditioned interference from the received signal.
摘要翻译：描述了用于检测和减轻干扰的技术。设备（例如，蜂窝电话）感测干扰电平并且数字地重构接收信号中的预期干扰。该装置可以将重建的干扰与接收到的信号相关联，并且基于相关结果确定接收信号中的干扰。该装置可以基于接收信号中检测到的干扰来调整接收机中的一个或多个电路块（例如，混频器，LNA等）的操作。替代地或附加地，设备可以调节数字干扰以获得与接收信号中的干扰匹配的经调整的重构干扰，然后可以从接收到的信号中减去经调节的干扰。

4. 发明申请

WO2011127033A1 METHOD AND APPARATUS FOR MAXIMUM RATIO TRANSMISSION MOBILE TRANSMIT DIVERSITY SYSTEM 审中-公开
标题翻译：用于最大比例传输移动传输多样性系统的方法和装置
公开(公告)号：WO2011127033A1
公开(公告)日：2011-10-13
申请号：PCT/US2011/031215
申请日：2011-04-05
申请人： QUALCOMM INCORPORATED , FILIPOVIC, Daniel, F. , ZHANG, Chengjin
发明人： FILIPOVIC, Daniel, F. , ZHANG, Chengjin
IPC分类号： H04B7/06 , H04B7/04
CPC分类号： H04B7/0443 , H04B7/0617
摘要： A method and apparatus for providing maximum ratio transmission mobile transmit diversity is provided. The method may include selecting (604) a first transmit power for a first antenna (514a) and a second transmit power for a second antenna (514b), wherein the first and second transmit powers are selected to generate a target power output, and using a first average power tracking unit (504a) to generate the first selected transmit power and a second average power tracking unit (504b) to generate the second selected transmit power.
摘要翻译：提供了一种用于提供最大比率传输移动发射分集的方法和装置。该方法可以包括：选择（604）第一天线（514a）的第一发射功率和第二天线（514b）的第二发射功率，其中选择第一和第二发射功率以产生目标功率输出，并且使用产生第一选择的发射功率的第一平均功率跟踪单元（504a）和产生第二选择的发射功率的第二平均功率跟踪单元（504b）。

5. 发明申请

WO2010068679A2 DIGITAL PHASE-LOCKED LOOP WITH TWO-POINT MODULATION AND ADAPTIVE DELAY MATCHING 审中-公开
标题翻译：具有两点调制和自适应延迟匹配的数字相位锁定环
公开(公告)号：WO2010068679A2
公开(公告)日：2010-06-17
申请号：PCT/US2009/067354
申请日：2009-12-09
申请人： QUALCOMM Incorporated , GENG, Jifeng , BALLANTYNE, Gary, John , FILIPOVIC, Daniel, F.
发明人： GENG, Jifeng , BALLANTYNE, Gary, John , FILIPOVIC, Daniel, F.
IPC分类号： H03L7/06
CPC分类号： H03C3/0925 , H03C3/0933 , H03C3/0941 , H03C3/095 , H03C3/0966
摘要： A digital phase-locked loop (DPLL) supporting two-point modulation with adaptive delay matching is described. The DPLL includes highpass and lowpass modulation paths that support wideband and narrowband modulation, respectively, of the frequency and/or phase of an oscillator. The DPLL can adaptively adjust the delay of one modulation path to match the delay of the other modulation path. In one design, the DPLL includes an adaptive delay unit that provides a variable delay for one of the two modulation paths. Within the adaptive delay unit, a delay computation unit determines the variable delay based on a modulating signal applied to the two modulation paths and a phase error signal in the DPLL. An interpolator provides a fractional portion of the variable delay, and a programmable delay unit provides an integer portion of the variable delay.
摘要翻译：描述了支持具有自适应延迟匹配的两点调制的数字锁相环（DPLL）。 DPLL包括分别支持振荡器的频率和/或相位的宽带和窄带调制的高通和低通调制路径。 DPLL可以自适应地调整一个调制路径的延迟以匹配另一个调制路径的延迟。在一种设计中，DPLL包括为两个调制路径中的一个提供可变延迟的自适应延迟单元。在自适应延迟单元内，延迟计算单元基于施加到两个调制路径的调制信号和DPLL中的相位误差信号来确定可变延迟。内插器提供可变延迟的小数部分，并且可编程延迟单元提供可变延迟的整数部分。

6. 发明申请

WO2008021815A1 INTERMODULATION DISTORTION DETECTION AND MITIGATION 审中-公开
标题翻译：互变异常检测和缓解
公开(公告)号：WO2008021815A1
公开(公告)日：2008-02-21
申请号：PCT/US2007/075337
申请日：2007-08-07
申请人： QUALCOMM INCORPORATED , FILIPOVIC, Daniel, F. , KOMNINAKIS, Christos
发明人： FILIPOVIC, Daniel, F. , KOMNINAKIS, Christos
IPC分类号： H04B1/10 , H04B1/12
CPC分类号： H04B1/109 , H04B1/123 , H04B1/525
摘要： Techniques for detecting and mitigating intermodulation distortion (IMD) are described. A device (e.g., a cellular phone) obtains digital intermodulation distortion and digitally determines intermodulation distortion in an input signal based on the digital intermodulation distortion. The device may correlate the digital intermodulation distortion with the input signal and determine intermodulation distortion in the input signal based on correlation results. The device may adjust the operation of one or more circuit blocks (e.g., a mixer, an LNA, etc.) in a receiver based on the detected intermodulation distortion in the input signal. Alternatively or additionally, the device may condition the digital intermodulation distortion to obtain conditioned intermodulation distortion matching intermodulation distortion in the input signal and may then subtract the conditioned intermodulation distortion from the input signal.
摘要翻译：描述了用于检测和减轻互调失真（IMD）的技术。设备（例如，蜂窝电话）基于数字互调失真获得数字互调失真并且数字地确定输入信号中的互调失真。该装置可以将数字互调失真与输入信号相关联，并且基于相关结果确定输入信号中的互调失真。该装置可以基于检测到的输入信号中的互调失真来调整接收机中的一个或多个电路块（例如，混频器，LNA等）的操作。或者或另外，设备可以调节数字互调失真以获得输入信号中的调制互调失真匹配互调失真，然后可以从输入信号中减去调节的互调失真。

7. 发明申请

WO2007002414A2 ADAPTIVE MULTI-CHANNEL MODEM 审中-公开
标题翻译：自适应多信道调制解调器
公开(公告)号：WO2007002414A2
公开(公告)日：2007-01-04
申请号：PCT/US2006/024499
申请日：2006-06-23
申请人： QUALCOMM INCORPORATED , FILIPOVIC, Daniel, F.
发明人： FILIPOVIC, Daniel, F.
CPC分类号： H04B1/71 , H04B1/0035 , H04B1/0071 , H04B1/406
摘要： An adaptive multi-channel (AMC) modem that can receive one or multiple spread spectrum signals simultaneously includes an adjustable filter, a ΔΣ ADC, and a digital processor. The adjustable filter filters an input signal with an adjustable bandwidth and provides an output signal comprised of a selected number of spread spectrum signals. The ΔΣ ADC digitizes the output signal and provides data samples. The sampling rate and/or the reference voltage of the ΔΣ ADC may be varied to obtain the desired performance. The digital processor processes the data samples for each spread spectrum signal to recover data sent in that signal. A controller ascertains the operating conditions (e.g., the desired signal level, the undesired signal level, and so on) and selects the number of spread spectrum signals to receive based on the operating conditions, user requirements, and possibly other factors.
摘要翻译：可同时接收一个或多个扩频信号的自适应多信道（AMC）调制解调器包括可调滤波器，ΔΣADC和数字处理器。可调滤波器以可调整的带宽对输入信号进行滤波，并提供由选定数量的扩频信号组成的输出信号。 ΔΣADC将输出信号数字化并提供数据采样。 ΔΣADC的采样速率和/或参考电压可以变化以获得期望的性能。数字处理器处理每个扩频信号的数据采样以恢复在该信号中发送的数据。控制器确定操作条件（例如，期望的信号电平，非期望的信号电平等），并基于操作条件，用户要求和可能的其他因素选择要接收的扩频信号的数量。

8. 发明申请

WO2012097358A1 IMPLEMENTATIONS FOR WIRELESS SIGNAL PROCESSING 审中-公开
标题翻译：无线信号处理的实现
公开(公告)号：WO2012097358A1
公开(公告)日：2012-07-19
申请号：PCT/US2012/021434
申请日：2012-01-16
申请人： QUALCOMM INCORPORATED , FILIPOVIC, Daniel, F. , GENG, Jifeng
发明人： FILIPOVIC, Daniel, F. , GENG, Jifeng
IPC分类号： G01S19/30 , G01S19/29 , G01S19/09
CPC分类号： G01S19/09
摘要： Implementations including methods, apparatuses, and systems relating to processing wireless signals are disclosed. Such processing may be performed, at least in part, at a receiver platform receiving such wireless signals and/or at a remote computing platform to obtain information that may be used in a variety of contexts, including cellular communications, radio-frequency identification, and navigation. In some techniques, modulated signals are received at a receiver platform, and at least partially demodulated and used to generate data. The data is transmitted to one or more network resources, and processed to obtain information based on the information in the modulated signals.
摘要翻译：公开了包括与处理无线信号有关的方法，装置和系统的实现。这种处理可以至少部分地在接收这样的无线信号的接收机平台上和/或在远程计算平台上执行，以获得可以在各种上下文中使用的信息，包括蜂窝通信，射频识别和导航。在一些技术中，在接收器平台处接收调制信号，并且至少部分解调并用于产生数据。将数据发送到一个或多个网络资源，并根据调制信号中的信息进行处理以获得信息。

9. 发明申请

WO2010141909A1 DIGITAL PHASE LOCKED LOOP WITH PARTS OPERATING AT DIFFERENT SAMPLE RATES 审中-公开
标题翻译：数字相位锁定环与不同采样率的零件操作
公开(公告)号：WO2010141909A1
公开(公告)日：2010-12-09
申请号：PCT/US2010/037530
申请日：2010-06-04
申请人： QUALCOMM Incorporated , BALLANTYNE, Gary, John , GENG, Jifeng , FILIPOVIC, Daniel, F.
发明人： BALLANTYNE, Gary, John , GENG, Jifeng , FILIPOVIC, Daniel, F.
IPC分类号： H03L7/08 , H03C3/09
CPC分类号： H03L7/08 , H03C3/0941 , H03C3/095 , H03C3/0966 , H03L2207/50
摘要： A Digital Phase-Locked Loop (DPLL) involves a Time-to-Digital Converter (TDC) that receives a DCO output signal and a reference clock and outputs a first stream of digital values. Quantization noise is reduced by clocking the TDC at a high rate. Downsampling circuitry converts the first stream into a second stream. The second stream is supplied to a phase detecting summer of the DPLL such that a control portion of the DPLL can switch at a lower rate to reduce power consumption. The DPLL is therefore referred to as a multi-rate DPLL. A third stream of digital tuning words output by the control portion is upsampled before being supplied to the DCO so that the DCO can be clocked at the higher rate, thereby reducing digital images. In a receiver application, no upsampling is performed and the DCO is clocked at the lower rate, thereby further reducing power consumption.
摘要翻译：数字锁相环（DPLL）涉及一个时间数字转换器（TDC），它接收DCO输出信号和参考时钟并输出第一个数字值。通过以较高的速率计时TDC来减少量化噪声。下采样电路将第一流转换为第二流。第二流被提供给DPLL的相位检测加法器，使得DPLL的控制部分可以以较低的速率切换以降低功耗。因此，DPLL被称为多速率DPLL。由控制部分输出的第三个数字调谐字流在被提供给DCO之前被上采样，从而可以以更高的速率计时DCO，从而减少数字图像。在接收机应用中，不执行上采样，并且以较低的速率对DCO进行计时，从而进一步降低功耗。

10. 发明申请

WO2007095475A1 CONVERSION OF MULTIPLE ANALOG SIGNALS IN AN ANALOG TO DIGITAL CONVERTER 审中-公开
标题翻译：多模式信号在数字转换器中的转换
公开(公告)号：WO2007095475A1
公开(公告)日：2007-08-23
申请号：PCT/US2007/061953
申请日：2007-02-09
申请人： QUALCOMM Incorporated , FILIPOVIC, Daniel, F.
发明人： FILIPOVIC, Daniel, F.
IPC分类号： H03M1/12 , H03M3/00
CPC分类号： H03M3/472 , H03M1/122
摘要： A multiple analog signal converter (100) simultaneously converts multiple analog signals (104,106) to digital signals (112, 114) using a single analog to digital converter (ADC) 102. A first analog signal (104) at a first center frequency and a second analog signal (106) at a second center frequency are processed by the ADC (102) to generate a composite digital signal (110) comprising a first digital signal (112) corresponding to the first analog signal (104) and a second digital signal (114) corresponding to the second analog signal (106). The composite digital signal (110) is digitally frequency shifted to recover the second digital signal (106). The first digital signal (104) is recovered by digitally filtering the composite digital signal (110). In some circumstances, a first radio frequency (RF) signal (118) and a second RF signal (122) are frequency shifted to generate the first analog signal (104) and second analog signal (106).
摘要翻译：多模拟信号转换器（100）使用单个模数转换器（ADC）102同时将多个模拟信号（104,106）转换为数字信号（112,114）。第一中心频率的第一模拟信号（104）在第二中心频率处的第二模拟信号（106）由ADC（102）处理以产生包括对应于第一模拟信号（104）的第一数字信号（112）和第二数字信号（104）的复合数字信号（114）对应于第二模拟信号（106）。复合数字信号（110）被数字频移以恢复第二数字信号（106）。通过数字滤波复合数字信号（110）来恢复第一数字信号（104）。在一些情况下，对第一射频（RF）信号（118）和第二RF信号（122）进行频移，以产生第一模拟信号（104）和第二模拟信号（106）。

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