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1. 发明申请

WO2018026447A1 SIDE-ASSEMBLED PASSIVE DEVICES 审中-公开
标题翻译：侧面组装的被动装置
公开(公告)号：WO2018026447A1
公开(公告)日：2018-02-08
申请号：PCT/US2017/039262
申请日：2017-06-26
申请人： QUALCOMM INCORPORATED
发明人： BERDY, David, Francis , YUN, Changhan, Hobie , ZUO, Chengjie , MUDAKATTE, Niranjan, Sunil , VELEZ, Mario, Francisco , GU, Shiqun , KIM, Jonghae
IPC分类号： H05K1/02 , H05K1/14 , H01L23/64
摘要： An integrated circuit device includes a first substrate having a ground plane. The integrated circuit device also includes a second substrate. The second substrate has a first layer of passive devices. The passive devices include at least one inductor on a first side of the second substrate. The first layer of passive devices is substantially orthogonal to the ground plane and the second substrate supported by the first substrate. An inductor magnetic field is substantially parallel to the ground plane.
摘要翻译：集成电路器件包括具有接地平面的第一基板。集成电路器件还包括第二衬底。第二衬底具有第一层无源器件。无源器件在第二衬底的第一侧上包括至少一个电感器。第一层无源器件与接地平面和第一衬底支撑的第二衬底基本正交。电感磁场基本上与地平面平行。

2. 发明申请

WO2016106197A3 METAL-INSULATOR-METAL (MIM) CAPACITORS ARRANGED IN A PATTERN TO REDUCE INDUCTANCE, AND RELATED METHODS 审中-公开
公开(公告)号：WO2016106197A3
公开(公告)日：2016-06-30
申请号：PCT/US2015/067052
申请日：2015-12-21
申请人： QUALCOMM INCORPORATED
发明人： YUN, Changhan, Hobie , LAN, Je-Hsiung, Jeffrey , KIM, Daeik, Daniel , BERDY, David, Francis , ZUO, Chengjie , KIM, Jonghae , MUDAKATTE, Niranjan, Sunil , VELEZ, Mario, Francisco , MIKULKA, Robert, Paul
IPC分类号： H01L27/08 , H01L49/02
摘要： Metal-insulator-metal (MIM) capacitors arranged in a pattern to reduce inductance, and related methods, are disclosed. In one aspect, circuits are provided that employ MIM capacitors coupled in series. The MIM capacitors are arranged in a pattern, wherein a MIM capacitor is placed so as to be electromagnetically adjacent to at least two MIM capacitors, and so that a current of the MIM capacitor flows in a direction opposite or substantially opposite of a direction in which a current of each adjacent MIM capacitor flows. The magnetic field generated at metal connections of each MIM capacitor rotates in an opposite direction of the magnetic field of each electromagnetically adjacent MIM capacitor, and thus a larger proportion of magnetic fields cancel out one another rather than combining, reducing equivalent series inductance (ESL) compared to linear arrangement of MIMs.

3. 发明公开

EP3353807A1 INTEGRATED CIRCUITS (ICS) ON A GLASS SUBSTRATE 无效
公开(公告)号：EP3353807A1
公开(公告)日：2018-08-01
申请号：EP16753757.0
申请日：2016-07-29
申请人： QUALCOMM Incorporated
发明人： GU, Shiqun , KIM, Daeik, Daniel , NOWAK, Matthew, Michael , KIM, Jonghae , YUN, Changhan, Hobie , LAN, Je-Hsiung, Jeffrey , BERDY, David, Francis
IPC分类号： H01L27/12 , H01L29/66
CPC分类号： H01L27/1203 , H01L21/304 , H01L21/30604 , H01L21/76251 , H01L21/76802 , H01L21/76877 , H01L21/76895 , H01L21/823481 , H01L21/84 , H01L23/49894 , H01L23/528 , H01L23/66 , H01L27/088 , H01L27/092 , H01L27/1207 , H01L27/1222 , H01L27/1248 , H01L27/1255 , H01L27/1266 , H01L29/1087 , H01L29/66772
摘要： An integrated circuit (IC) includes a first semiconductor device on a glass substrate. The first semiconductor device includes a first semiconductive region of a bulk silicon wafer. The IC includes a second semiconductor device on the glass substrate. The second semiconductor device includes a second semiconductive region of the bulk silicon wafer. The IC includes a through substrate trench between the first semiconductive region and the second semiconductive region. The through substrate trench includes a portion disposed beyond a surface of the bulk silicon wafer.

4. 发明公开

EP3434082A1 PASSIVE DEVICE ASSEMBLY FOR ACCURATE CONTROL OF THE DISTANCE TO A GROUND PLANE 审中-公开
公开(公告)号：EP3434082A1
公开(公告)日：2019-01-30
申请号：EP17711488.1
申请日：2017-03-03
申请人： Qualcomm Incorporated
发明人： ZUO, Chengjie , BERDY, David, Francis , KIM, Daeik, Daniel , YUN, Changhan, Hobie , VELEZ, Mario, Francisco , KIM, Jonghae
IPC分类号： H05K1/14 , H05K1/02 , H01L23/538 , H01L23/552

5. 发明申请

WO2017052774A1 INTEGRATED CIRCUITS (ICS) ON A GLASS SUBSTRATE 审中-公开
标题翻译：集成电路（ICS）在玻璃基板上
公开(公告)号：WO2017052774A1
公开(公告)日：2017-03-30
申请号：PCT/US2016/044751
申请日：2016-07-29
申请人： QUALCOMM INCORPORATED
发明人： GU, Shiqun , KIM, Daeik, Daniel , NOWAK, Matthew, Michael , KIM, Jonghae , YUN, Changhan, Hobie , LAN, Je-Hsiung, Jeffrey , BERDY, David, Francis
IPC分类号： H01L27/12 , H01L29/66
CPC分类号： H01L27/1203 , H01L21/304 , H01L21/30604 , H01L21/76251 , H01L21/76802 , H01L21/76877 , H01L21/76895 , H01L21/823481 , H01L21/84 , H01L23/49894 , H01L23/528 , H01L23/66 , H01L27/088 , H01L27/092 , H01L27/1222 , H01L27/1248 , H01L27/1255 , H01L27/1266 , H01L29/1087 , H01L29/66772
摘要： An integrated circuit (IC) includes a first semiconductor device on a glass substrate. The first semiconductor device includes a first semiconductive region of a bulk silicon wafer. The IC includes a second semiconductor device on the glass substrate. The second semiconductor device includes a second semiconductive region of the bulk silicon wafer. The IC includes a through substrate trench between the first semiconductive region and the second semiconductive region. The through substrate trench includes a portion disposed beyond a surface of the bulk silicon wafer.
摘要翻译：集成电路（IC）包括玻璃基板上的第一半导体器件。第一半导体器件包括体硅晶片的第一半导体区域。 IC包括在玻璃基板上的第二半导体器件。第二半导体器件包括本体硅晶片的第二半导体区域。 IC包括在第一半导体区域和第二半导体区域之间的贯穿衬底沟槽。贯通衬底沟道包括设置在体硅晶片的表面之外的部分。

6. 发明申请

WO2016011313A1 SUPERPOSED STRUCTURE 3D ORTHOGONAL THROUGH SUBSTRATE INDUCTOR 审中-公开
标题翻译：通过基板电感的超立体结构3D正交
公开(公告)号：WO2016011313A1
公开(公告)日：2016-01-21
申请号：PCT/US2015/040845
申请日：2015-07-17
申请人： QUALCOMM INCORPORATED
发明人： BERDY, David, Francis , ZUO, Chengjie , KIM, Daeik, Daniel , YUN, Changhan, Hobie , VELEZ, Mario, Francisco , MIKULKA, Robert, Paul , KIM, Jonghae
IPC分类号： H01L49/02 , H01F41/04 , H01F17/00
CPC分类号： H01F41/041 , H01F17/0013 , H01F27/2804 , H01F27/29 , H01F2017/004 , H01L23/5227 , H01L28/10 , H01L2924/0002 , H01L2924/00
摘要： A three-dimensional (3D) orthogonal inductor pair (700) is embedded in and supported by a substrate (701), and has a first inductor (702) having a first coil that winds around a first winding axis and a second inductor (706) having a second coil that winds around a second winding axis. The second winding axis is orthogonal to the first winding axis. The second winding axis intersects the first winding axis at an intersection point that is within the substrate.
摘要翻译：三维（3D）正交电感器对（700）被嵌入并由衬底（701）支撑，并且具有第一电感器（702），其具有卷绕第一绕组轴线的第一线圈和第二电感器（706））具有围绕第二卷绕轴线缠绕的第二线圈。第二卷绕轴线与第一卷绕轴线正交。第二绕组轴线在第一绕组轴线处于衬底内的交点处。

7. 发明申请

WO2017165101A1 PASSIVE DEVICE ASSEMBLY FOR ACCURATE CONTROL OF THE DISTANCE TO A GROUND PLANE 审中-公开
标题翻译：用于精确控制到地平面距离的被动装置组件
公开(公告)号：WO2017165101A1
公开(公告)日：2017-09-28
申请号：PCT/US2017/020601
申请日：2017-03-03
申请人： QUALCOMM INCORPORATED
发明人： ZUO, Chengjie , BERDY, David, Francis , KIM, Daeik, Daniel , YUN, Changhan, Hobie , VELEZ, Mario, Francisco , KIM, Jonghae
IPC分类号： H05K1/14 , H05K1/02 , H01L23/538 , H01L23/552
摘要： Passive device assembly (202) for accurate ground plane control is disclosed. A passive device assembly includes a device substrate (214) conductively coupled to a ground plane separation control substrate (216). A passive device (204) disposed on a lower surface (220) of the device substrate is separated from an embedded ground plane (210) mounted on a lower surface of the ground plane separation control substrate by a separation distance (D1). The separation distance is accurately controlled to minimize undesirable interference that may occur to the passive device. The separation distance is provided inside the passive device assembly. Conductive mounting pads (212) are disposed on the lower surface of the ground plane separation control substrate to support accurate alignment of the passive device assembly on a circuit board. By providing sufficient separation distance inside the passive device assembly, the passive device assembly can be precisely mounted onto any circuit board regardless of specific design and layout of the circuit board.
摘要翻译：公开了用于精确地平面控制的无源装置组件（202）。无源器件组件包括导电耦合到接地平面分离控制衬底（216）的器件衬底（214）。布置在器件基板的下表面（220）上的无源器件（204）与安装在接地平面分离控制基板的下表面上的嵌入式接地平面（210）隔开分离距离（D1）。精确控制分离距离以最小化无源设备可能发生的不希望的干扰。分离距离设置在无源装置组件内部。导电安装垫（212）设置在接地平面分离控制衬底的下表面上，以支持无源装置组件在电路板上的精确对准。通过在无源器件组件内提供足够的分离距离，无源器件组件可以精确地安装到任何电路板上，而不管电路板的具体设计和布局。

8. 发明申请

WO2017023439A1 TUNABLE CAVITY RESONATOR 审中-公开
标题翻译：可调节腔谐振器
公开(公告)号：WO2017023439A1
公开(公告)日：2017-02-09
申请号：PCT/US2016/039053
申请日：2016-06-23
申请人： QUALCOMM INCORPORATED
发明人： BERDY, David, Francis , ZUO, Chengjie , LAN, Je-Hsiung, Jeffrey , KIM, Daeik, Daniel , YUN, Changhan, Hobie , VELEZ, Mario, Francisco , KIM, Jonghae
IPC分类号： H01P7/06
CPC分类号： H01P7/06 , H01P7/10
摘要： An apparatus includes a tunable cavity resonator that includes conductive walls that form a tunable cavity. The tunable cavity has first dimensions when one or more phase change material layers within the tunable cavity have a first state. The tunable cavity has second dimensions when the one or more phase change material layers have a second state.
摘要翻译：一种装置包括可调谐腔谐振器，其包括形成可调谐空腔的导电壁。当可调谐腔内的一个或多个相变材料层具有第一状态时，可调谐腔具有第一尺寸。当一个或多个相变材料层具有第二状态时，可调谐腔具有第二维度。

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