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    • 1. 发明授权
    • Active matrix substrate
    • 有源矩阵基板
    • US07304351B2
    • 2007-12-04
    • US11162649
    • 2005-09-18
    • Po-Yuan LiuShu-Ming HuangChao-Liang Lu
    • Po-Yuan LiuShu-Ming HuangChao-Liang Lu
    • H01L23/62
    • H01L27/0248G02F1/136204H01L27/105H01L27/115H01L29/788
    • An active matrix substrate is provided, including a substrate, a plurality of pixel units, a static releasing conductive line and an ESD protection circuit, wherein the substrate has an active area and a peripheral area adjacent to each other. The pixel units are arranged in the active area in an array, and the static releasing conductive line is disposed in the peripheral area of the substrate. The ESD protection circuit is also disposed in the peripheral area of the substrate, being electrically connected between the pixel units and the static releasing conductive line. The ESD protection circuit includes a protection ring and a static consumption device, wherein the protection ring is disposed in a peripheral area of the substrate and the static consumption device has a floating gate, the static consumption device being electrically connected between the ESD protection circuit and the static releasing conductive line.
    • 提供有源矩阵基板,包括基板,多个像素单元,静电释放导线和ESD保护电路,其中基板具有彼此相邻的有源区域和周边区域。 像素单元布置在阵列中的有源区域中,并且静电释放导电线设置在基板的周边区域中。 ESD保护电路也设置在基板的周边区域中,电连接在像素单元和静电释放导电线之间。 ESD保护电路包括保护环和静电消耗装置,其中保护环设置在基板的周边区域中,静电消除装置具有浮动栅极,静电消除装置电连接在ESD保护电路和 静电释放导线。
    • 2. 发明申请
    • ACTIVE MATRIX SUBSTRATE
    • 主动矩阵基板
    • US20060278929A1
    • 2006-12-14
    • US11162649
    • 2005-09-18
    • Po-Yuan LiuShu-Ming HuangChao-Liang Lu
    • Po-Yuan LiuShu-Ming HuangChao-Liang Lu
    • H01L23/62
    • H01L27/0248G02F1/136204H01L27/105H01L27/115H01L29/788
    • An active matrix substrate is provided, including a substrate, a plurality of pixel units, a static releasing conductive line and an ESD protection circuit, wherein the substrate has an active area and a peripheral area adjacent to each other. The pixel units are arranged in the active area in an array, and the static releasing conductive line is disposed in the peripheral area of the substrate. The ESD protection circuit is also disposed in the peripheral area of the substrate, being electrically connected between the pixel units and the static releasing conductive line. The ESD protection circuit includes a protection ring and a static consumption device, wherein the protection ring is disposed in a peripheral area of the substrate and the static consumption device has a floating gate, the static consumption device being electrically connected between the ESD protection circuit and the static releasing conductive line.
    • 提供有源矩阵基板,包括基板,多个像素单元,静电释放导线和ESD保护电路,其中基板具有彼此相邻的有源区域和周边区域。 像素单元布置在阵列中的有源区域中,并且静电释放导电线设置在基板的周边区域中。 ESD保护电路也设置在基板的周边区域中,电连接在像素单元和静电释放导电线之间。 ESD保护电路包括保护环和静电消耗装置,其中保护环设置在基板的周边区域中,静电消除装置具有浮动栅极,静电消除装置电连接在ESD保护电路和 静电释放导线。
    • 3. 发明授权
    • Display panel with half source driver structure and display data supplying method thereof
    • 具有半源驱动器结构的显示面板及其显示数据提供方法
    • US08344990B2
    • 2013-01-01
    • US12491262
    • 2009-06-25
    • Ken-Ming ChenChi-Mao HungChao-Liang Lu
    • Ken-Ming ChenChi-Mao HungChao-Liang Lu
    • G09G3/36
    • G09G3/3614G09G2310/0235G09G2320/0242
    • A display panel with half source driver structure and a display data supplying method thereof are disclosed. The display panel includes a plurality of gate driving circuits, a data line, a plurality of first gate lines and second gate lines, a plurality of first pixels and second pixels. The first pixels are arranged along the data line and form two columns. The first pixels are disposed at one side of the data line and electrically coupled to the respective first gate lines. The second pixels are arranged along the data line and form two columns. The second pixels are disposed at an opposite side of the data lines and electrically coupled to the respective second gate lines. The data line has a bending portion between each two sequentially connected first pixels. The gate driving circuits are electrically coupled to the first gate lines and the second gate lines.
    • 公开了一种具有半源驱动器结构的显示面板及其显示数据提供方法。 显示面板包括多个栅极驱动电路,数据线,多个第一栅极线和第二栅极线,多个第一像素和第二像素。 第一个像素沿着数据线布置并形成两列。 第一像素设置在数据线的一侧并电耦合到相应的第一栅极线。 第二个像素沿着数据线布置并形成两列。 第二像素设置在数据线的相反侧并电耦合到相应的第二栅极线。 数据线在每两个顺序连接的第一像素之间具有弯曲部分。 栅极驱动电路电耦合到第一栅极线和第二栅极线。
    • 6. 发明申请
    • LIQUID CRYSTAL DISPLAY AND METHODS OF DRIVING SAME
    • 液晶显示器及其驱动方法
    • US20110193842A1
    • 2011-08-11
    • US12703896
    • 2010-02-11
    • Yu-Cheng TsaiKuo-Hsien LeeChao-Liang LuJing-Tin Kuo
    • Yu-Cheng TsaiKuo-Hsien LeeChao-Liang LuJing-Tin Kuo
    • G09G3/36G09G5/00G02F1/1343
    • G09G3/3607G09G3/3659G09G3/3677G09G2300/0809G09G2300/0814G09G2320/0219G09G2320/0233G09G2330/021
    • A liquid crystal display (LCD) and methods of driving same. In one embodiment, the LCD) includes a plurality of gate lines, {Gn}, spatially arranged along a row direction; a plurality of data lines, {Dm}, spatially arranged along a column direction perpendicular to the row direction, and a plurality of pixels, {Pn,m}, spatially arranged in the form of a matrix, where m=1, 2, . . . , M, n=1, 2, . . . , N, and M and N are positive integers. Each pixel Pn,m is defined between two neighboring gate lines Gn and Gn+1 and two neighboring data lines Dm and Dm+1, and comprises a first sub-pixel electrode, a second sub-pixel electrode, a first transistor having a gate electrically coupled to the gate line Gn+1, a source and a drain electrically coupled to the first sub-pixel electrode, a second transistor having a gate electrically coupled to the gate line Gn, a source electrically coupled to the source of the first transistor and a drain electrically coupled to the second sub-pixel electrode, and a third transistor having a gate electrically coupled to the gate line Gn+2, a source electrically coupled to one of the two neighboring data lines Dm and Dm+1 and a drain electrically coupled to the sources of the first and second transistors.
    • 液晶显示器(LCD)及其驱动方法。 在一个实施例中,LCD)包括沿着行方向在空间上排列的多条栅极线{Gn} 沿垂直于行方向的列方向空间排列的多条数据线{Dm},以矩阵形式空间排列的多个像素{Pn,m},其中m = 1,2, 。 。 。 ,M,n = 1,2。 。 。 ,N和M和N是正整数。 每个像素Pn,m定义在两个相邻的栅极线Gn和Gn + 1以及两个相邻的数据线Dm和Dm + 1之间,并且包括第一子像素电极,第二子像素电极,具有栅极的第一晶体管 电耦合到栅极线Gn + 1,电耦合到第一子像素电极的源极和漏极,具有电耦合到栅极线Gn的栅极的第二晶体管,电耦合到第一晶体管的源极的源极 以及漏极,电耦合到第二子像素电极,以及第三晶体管,其具有电耦合到栅极线Gn + 2的栅极,电耦合到两个相邻数据线Dm和Dm + 1中的一个的源极和漏极 电耦合到第一和第二晶体管的源极。