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1. 发明授权

US08760255B2 Contactless communications using ferromagnetic material 有权
标题翻译：使用铁磁材料的非接触式通信
公开(公告)号：US08760255B2
公开(公告)日：2014-06-24
申请号：US13206584
申请日：2011-08-10
申请人： Ping-Lin Yang , Jun-De Jin , Fu-Lung Hsueh , Sa-Lly Liu , Tong-Chern Ong , Chun-Jung Lin , Ya-Chen Kao
发明人： Ping-Lin Yang , Jun-De Jin , Fu-Lung Hsueh , Sa-Lly Liu , Tong-Chern Ong , Chun-Jung Lin , Ya-Chen Kao
IPC分类号： H01F5/00
CPC分类号： H01L25/0657 , H01F5/00 , H01F27/2804 , H01F41/046 , H01F2027/2809 , H01L23/48 , H01L23/5227 , H01L2225/06531 , H01L2924/0002 , Y10T29/4902 , H01L2924/00
摘要： A communications structure comprises a first semiconductor substrate having a first coil, and a second semiconductor substrate having a second coil above the first semiconductor substrate. Inner edges of the first and second coils define a boundary of a volume that extends below the first coil and above the second coil. A ferromagnetic core is positioned at least partially within the boundary, such that a mutual inductance is provided between the first and second coils for wireless transmission of signals or power between the first and second coils.
摘要翻译：通信结构包括具有第一线圈的第一半导体衬底和在第一半导体衬底上方具有第二线圈的第二半导体衬底。第一和第二线圈的内边缘限定在第一线圈下方延伸并在第二线圈之上的体积的边界。铁磁芯至少部分地位于边界内，使得在第一和第二线圈之间提供互感以在第一和第二线圈之间无线地传输信号或电力。

2. 发明申请

US20130038418A1 CONTACTLESS COMMUNICATIONS USING FERROMAGNETIC MATERIAL 有权
标题翻译：使用纤维材料的无缝通信
公开(公告)号：US20130038418A1
公开(公告)日：2013-02-14
申请号：US13206584
申请日：2011-08-10
申请人： Ping-Lin Yang , Jun-De Jin , Fu-Lung Hsueh , Sa-Lly Liu , Tong-Chern Ong , Chun-Jung Lin , Ya-Chen Kao
发明人： Ping-Lin Yang , Jun-De Jin , Fu-Lung Hsueh , Sa-Lly Liu , Tong-Chern Ong , Chun-Jung Lin , Ya-Chen Kao
IPC分类号： H01F38/14 , H01F41/00
CPC分类号： H01L25/0657 , H01F5/00 , H01F27/2804 , H01F41/046 , H01F2027/2809 , H01L23/48 , H01L23/5227 , H01L2225/06531 , H01L2924/0002 , Y10T29/4902 , H01L2924/00
摘要： A communications structure comprises a first semiconductor substrate having a first coil, and a second semiconductor substrate having a second coil above the first semiconductor substrate. Inner edges of the first and second coils define a boundary of a volume that extends below the first coil and above the second coil. A ferromagnetic core is positioned at least partially within the boundary, such that a mutual inductance is provided between the first and second coils for wireless transmission of signals or power between the first and second coils.
摘要翻译：通信结构包括具有第一线圈的第一半导体衬底和在第一半导体衬底上方具有第二线圈的第二半导体衬底。第一和第二线圈的内边缘限定在第一线圈下方延伸并在第二线圈之上的体积的边界。铁磁芯至少部分地位于边界内，使得在第一和第二线圈之间提供互感以在第一和第二线圈之间无线地传输信号或电力。

3. 发明授权

US08513795B2 3D IC configuration with contactless communication 有权
标题翻译： 3D IC配置无接触通讯
公开(公告)号：US08513795B2
公开(公告)日：2013-08-20
申请号：US13337346
申请日：2011-12-27
申请人： Ping-Lin Yang , Sa-Lly Liu , Chien-Min Lin
发明人： Ping-Lin Yang , Sa-Lly Liu , Chien-Min Lin
IPC分类号： H01L23/02
CPC分类号： H01L24/82 , H01L23/3677 , H01L23/48 , H01L23/5227 , H01L24/16 , H01L25/0657 , H01L2224/05571 , H01L2224/05573 , H01L2224/16225 , H01L2224/16227 , H01L2224/32225 , H01L2224/73253 , H01L2225/06517 , H01L2225/06531 , H01L2225/06551 , H01L2225/06572 , H01L2225/06589 , H01L2924/15788 , H01L2924/00 , H01L2224/05647 , H01L2924/00014
摘要： A package comprises a die stack having at least two stacked dies coupled for contactless communications with each other. At least one of the stacked dies has a substrate joined to its major face. The substrate has a plurality of conductive traces in or on the substrate for conducting power to the dies and for conducting heat from the dies. At least one conductive pillar is joined to at least one of the conductive traces on at least a first edge of the substrate, for conducting power to the at least one die and for conducting heat from the at least one die.
摘要翻译：封装包括具有至少两个堆叠管芯的管芯堆叠，用于彼此进行非接触式通信。堆叠的模具中的至少一个具有连接到其主面的衬底。衬底在衬底中或衬底上具有多个导电迹线，用于向裸片传导功率并且用于从模具传导热量。至少一个导电柱与基板的至少第一边缘上的导电迹线中的至少一个接合，用于将功率传导到至少一个管芯并且用于从至少一个管芯传导热量。

4. 发明申请

US20130007692A1 TOOL AND METHOD FOR MODELING INTERPOSER RC COUPLINGS 有权
标题翻译：用于建模间接RC联轴器的工具和方法
公开(公告)号：US20130007692A1
公开(公告)日：2013-01-03
申请号：US13172248
申请日：2011-06-29
申请人： Chao-Yang Yeh , Ze-Ming Wu , Meng-Lin Chung , Chih-Chia Chen , Li-Fu Ding , Sa-Lly Liu
发明人： Chao-Yang Yeh , Ze-Ming Wu , Meng-Lin Chung , Chih-Chia Chen , Li-Fu Ding , Sa-Lly Liu
IPC分类号： G06F17/50
CPC分类号： G06F17/5036
摘要： A method comprises analyzing front side conductive patterns and back side conductive patterns on a semiconductor interposer using a machine implemented RC extraction tool, and outputting data representing a plurality of respective RC nodes from the RC extraction tool to a tangible persistent machine readable storage medium. A substrate mesh model of the semiconductor interposer is generated, having a plurality of substrate mesh nodes. Each substrate mesh node is connected to adjacent ones of the plurality of substrate mesh nodes by respective substrate impedance elements. A set of inputs to a timing analysis tool is formed. The plurality of RC nodes are connected to ones of the plurality of substrate mesh nodes of the substrate mesh model. The set of inputs is stored in a tangible machine readable storage medium.
摘要翻译：一种方法包括使用机器实施的RC提取工具来分析半导体插入器上的前侧导电图案和背面导电图案，并将表示多个相应RC节点的数据从RC提取工具输出到有形的持久机器可读存储介质。产生半导体插入器的衬底网格模型，其具有多个衬底网格节点。每个衬底网格节点通过相应的衬底阻抗元件连接到多个衬底网格节点中的相邻衬底网格节点。形成了一组时序分析工具的输入。多个RC节点连接到衬底网格模型的多个衬底网格节点中的一个。该组输入存储在有形机器可读存储介质中。

5. 发明授权

US09103884B2 De-embedding on-wafer devices 有权
标题翻译：去嵌入晶圆器件
公开(公告)号：US09103884B2
公开(公告)日：2015-08-11
申请号：US12963511
申请日：2010-12-08
申请人： Hsiao-Tsung Yen , Yu-Ling Lin , Chin-Wei Kuo , Ho-Hsiang Chen , Sa-Lly Liu
发明人： Hsiao-Tsung Yen , Yu-Ling Lin , Chin-Wei Kuo , Ho-Hsiang Chen , Sa-Lly Liu
IPC分类号： G01R31/26 , G01R31/3185 , G11C29/56 , H01L21/66
CPC分类号： G01R31/2601 , G01R1/0491 , G01R31/2644 , G01R31/318511 , G11C29/56 , G11C2029/5602 , H01L22/34
摘要： A transmission line is provided. In one embodiment, the transmission line comprises a substrate, a well within the substrate, a shielding layer over the well, and a plurality of intermediate metal layers over the shielding layer, the plurality of intermediate metal layers coupled by a plurality of vias. The transmission line further includes a top metal layer over the plurality of intermediate metal layers. A test structure for de-embedding an on-wafer device, and a wafer are also disclosed.
摘要翻译：提供传输线。在一个实施例中，传输线包括衬底，衬底内的阱，阱上的屏蔽层以及屏蔽层上的多个中间金属层，多个中间金属层通过多个通孔耦合。传输线还包括多个中间金属层上的顶部金属层。还公开了用于去嵌入晶片装置和晶片的测试结构。

6. 发明申请

US20150311159A1 ELECTROMAGNETIC BANDGAP STRUCTURE FOR THREE DIMENSIONAL ICS 有权
标题翻译：三维ICS电磁带结构
公开(公告)号：US20150311159A1
公开(公告)日：2015-10-29
申请号：US14264076
申请日：2014-04-29
申请人： Hsieh-Hung Hsieh , Tzu-Jin Yeh , Sa-Lly Liu , Tzong-Lin Wu
发明人： Hsieh-Hung Hsieh , Tzu-Jin Yeh , Sa-Lly Liu , Tzong-Lin Wu
IPC分类号： H01L23/538 , H01L25/065 , H01L23/00
CPC分类号： H01L23/5384 , H01L23/481 , H01L23/5223 , H01L23/5226 , H01L23/5227 , H01L24/05 , H01L24/13 , H01L24/16 , H01L24/17 , H01L25/0657 , H01L2224/0401 , H01L2224/05009 , H01L2224/13025 , H01L2224/16146 , H01L2224/16225 , H01L2224/17181 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06544 , H01L2225/06565 , H01L2924/14 , H01L2924/30105 , H01L2924/30107
摘要： An electromagnetic bandgap (EBG) cell comprises a plurality of first conductive line layers beneath a first integrated circuit (IC) die, wherein wires on at least one of the first conductive line layers are each connected to one of a high voltage source and a low voltage source and are oriented to form a first mesh structure at a bottom of the EBG cell. The EBG cell further comprises a pair of through-substrate-vias (TSVs) above the plurality of first conductive line layers, wherein the pair of TSVs penetrate the first IC die and are connected to a high voltage source and a low voltage source, respectively, and a pair of micro bumps above a dielectric layer above the pair of TSVs, wherein the micro bumps connect the TSVs of the first IC die with a plurality of second conductive line layers formed on a second IC die.
摘要翻译：电磁带隙（EBG）单元包括在第一集成电路（IC）管芯下面的多个第一导线层，其中至少一个第一导线层上的导线各自连接到高电压源和低电压电压源并且被定向以在EBG电池的底部形成第一网状结构。 EBG单元还包括在多个第一导线层上方的一对穿通基板通孔（TSV），其中该对TSV穿过第一IC管芯并且分别连接到高电压源和低压源以及在所述一对TSV上方的电介质层上方的一对微凸块，其中所述微凸块将所述第一IC管芯的TSV与形成在第二IC管芯上的多个第二导线层连接。

7. 发明授权

US08856710B2 Tool and method for modeling interposer RC couplings 有权
标题翻译：用于对插件RC耦合进行建模的工具和方法
公开(公告)号：US08856710B2
公开(公告)日：2014-10-07
申请号：US13172248
申请日：2011-06-29
申请人： Chao-Yang Yeh , Ze-Ming Wu , Meng-Lin Chung , Chih-Chia Chen , Li-Fu Ding , Sa-Lly Liu
发明人： Chao-Yang Yeh , Ze-Ming Wu , Meng-Lin Chung , Chih-Chia Chen , Li-Fu Ding , Sa-Lly Liu
IPC分类号： G06F17/50
CPC分类号： G06F17/5036
摘要： A method comprises analyzing front side conductive patterns and back side conductive patterns on a semiconductor interposer using a machine implemented RC extraction tool, and outputting data representing a plurality of respective RC nodes from the RC extraction tool to a tangible persistent machine readable storage medium. A substrate mesh model of the semiconductor interposer is generated, having a plurality of substrate mesh nodes. Each substrate mesh node is connected to adjacent ones of the plurality of substrate mesh nodes by respective substrate impedance elements. A set of inputs to a timing analysis tool is formed. The plurality of RC nodes are connected to ones of the plurality of substrate mesh nodes of the substrate mesh model. The set of inputs is stored in a tangible machine readable storage medium.
摘要翻译：一种方法包括使用机器实施的RC提取工具来分析半导体插入器上的前侧导电图案和背面导电图案，并将表示多个相应RC节点的数据从RC提取工具输出到有形的持久机器可读存储介质。产生半导体插入器的衬底网格模型，其具有多个衬底网格节点。每个衬底网格节点通过相应的衬底阻抗元件连接到多个衬底网格节点中的相邻衬底网格节点。形成了一组时序分析工具的输入。多个RC节点连接到衬底网格模型的多个衬底网格节点中的一个。该组输入存储在有形机器可读存储介质中。

8. 发明申请

US20120146680A1 DE-EMBEDDING ON-WAFER DEVICES 有权
标题翻译：嵌入式嵌入式设备
公开(公告)号：US20120146680A1
公开(公告)日：2012-06-14
申请号：US12963511
申请日：2010-12-08
申请人： Hsiao-Tsung Yen , Yu-Ling Lin , Chin-Wei Kuo , Ho-Hsiang Chen , Sa-Lly Liu
发明人： Hsiao-Tsung Yen , Yu-Ling Lin , Chin-Wei Kuo , Ho-Hsiang Chen , Sa-Lly Liu
IPC分类号： G01R31/00
CPC分类号： G01R31/2601 , G01R1/0491 , G01R31/2644 , G01R31/318511 , G11C29/56 , G11C2029/5602 , H01L22/34
摘要： A transmission line is provided. In one embodiment, the transmission line comprises a substrate, a well within the substrate, a shielding layer over the well, and a plurality of intermediate metal layers over the shielding layer, the plurality of intermediate metal layers coupled by a plurality of vias. The transmission line further includes a top metal layer over the plurality of intermediate metal layers. A test structure for de-embedding an on-wafer device, and a wafer are also disclosed.
摘要翻译：提供传输线。在一个实施例中，传输线包括衬底，衬底内的阱，阱上的屏蔽层以及屏蔽层上的多个中间金属层，多个中间金属层通过多个通孔耦合。传输线还包括多个中间金属层上的顶部金属层。还公开了用于去嵌入晶片装置和晶片的测试结构。

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