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1. 发明授权

US09134627B2 Multiple-patterning overlay decoupling method 有权
标题翻译：多图案叠加去耦方法
公开(公告)号：US09134627B2
公开(公告)日：2015-09-15
申请号：US13328264
申请日：2011-12-16
申请人： Wen-Chuan Wang , Shy-Jay Lin , Pei-Yi Liu , Jaw-Jung Shin , Burn Jeng Lin
发明人： Wen-Chuan Wang , Shy-Jay Lin , Pei-Yi Liu , Jaw-Jung Shin , Burn Jeng Lin
IPC分类号： H01L21/66 , G03F7/20 , H01L23/544
CPC分类号： G03F7/70633 , H01L23/544 , H01L2223/5442 , H01L2223/54426 , H01L2223/54453 , H01L2223/5446 , H01L2924/0002 , H01L2924/00
摘要： A method for fabricating a semiconductor device is disclosed. An exemplary method includes forming a first structure in a first layer by a first exposure and determining placement information of the first structure. The method further includes forming a second structure in a second layer overlying the first layer by a second exposure and determining placement information of the second structure. The method further includes forming a third structure including first and second substructures in a third layer overlying the second layer by a third exposure. Forming the third structure includes independently aligning the first substructure to the first structure and independently aligning the second substructure to the second structure.
摘要翻译：公开了一种制造半导体器件的方法。一种示例性方法包括通过第一曝光在第一层中形成第一结构并确定第一结构的放置信息。该方法还包括通过第二曝光在覆盖第一层的第二层中形成第二结构，并确定第二结构的放置信息。该方法还包括在第三层中形成第三结构，该第三结构包括通过第三次曝光覆盖第二层的第三层中的第一和第二子结构。形成第三结构包括将第一子结构独立地对准第一结构并且将第二子结构独立地对准到第二结构。

2. 发明授权

US08510687B1 Error diffusion and grid shift in lithography 有权
标题翻译：光刻中的误差扩散和栅格位移
公开(公告)号：US08510687B1
公开(公告)日：2013-08-13
申请号：US13409765
申请日：2012-03-01
申请人： Pei-Yi Liu , Shy-Jay Lin , Wen-Chuan Wang , Jaw-Jung Shin , Burn Jeng Lin
发明人： Pei-Yi Liu , Shy-Jay Lin , Wen-Chuan Wang , Jaw-Jung Shin , Burn Jeng Lin
IPC分类号： G06F17/50
CPC分类号： G03F1/36
摘要： The present disclosure involves a method of data preparation in lithography processes. The method of data preparation includes providing an integrated circuit (IC) layout design in a graphic database system (GDS) grid, and converting the IC layout design GDS grid to a second exposure grid by applying an error diffusion and a grid shift technique to a sub-pixel exposure grid.
摘要翻译：本公开涉及在光刻工艺中的数据准备方法。数据准备的方法包括在图形数据库系统（GDS）网格中提供集成电路（IC）布局设计，并且通过向第二曝光网格应用误差扩散和网格移位技术将IC布局设计GDS网格转换为第二曝光网格子像素曝光网格。

3. 发明申请

US20130157389A1 Multiple-Patterning Overlay Decoupling Method 有权
标题翻译：多重图案叠加去耦方法
公开(公告)号：US20130157389A1
公开(公告)日：2013-06-20
申请号：US13328264
申请日：2011-12-16
申请人： Wen-Chuan Wang , Shy-Jay Lin , Pei-Yi Liu , Jaw-Jung Shin , Burn Jeng Lin
发明人： Wen-Chuan Wang , Shy-Jay Lin , Pei-Yi Liu , Jaw-Jung Shin , Burn Jeng Lin
IPC分类号： H01L21/66
CPC分类号： G03F7/70633 , H01L23/544 , H01L2223/5442 , H01L2223/54426 , H01L2223/54453 , H01L2223/5446 , H01L2924/0002 , H01L2924/00
摘要： A method for fabricating a semiconductor device is disclosed. An exemplary method includes forming a first structure in a first layer by a first exposure and determining placement information of the first structure. The method further includes forming a second structure in a second layer overlying the first layer by a second exposure and determining placement information of the second structure. The method further includes forming a third structure including first and second substructures in a third layer overlying the second layer by a third exposure. Forming the third structure includes independently aligning the first substructure to the first structure and independently aligning the second substructure to the second structure
摘要翻译：公开了一种制造半导体器件的方法。一种示例性方法包括通过第一曝光在第一层中形成第一结构并确定第一结构的放置信息。该方法还包括通过第二曝光在覆盖第一层的第二层中形成第二结构，并确定第二结构的放置信息。该方法还包括在第三层中形成第三结构，该第三结构包括通过第三次曝光覆盖第二层的第三层中的第一和第二子结构。形成第三结构包括将第一子结构独立地对准第一结构并且将第二子结构独立地对准到第二结构

4. 发明申请

US20130232455A1 ERROR DIFFUSION AND GRID SHIFT IN LITHOGRAPHY 有权
标题翻译：误差扩展和网格移位在LITHOGRAPHY
公开(公告)号：US20130232455A1
公开(公告)日：2013-09-05
申请号：US13409765
申请日：2012-03-01
申请人： Pei-Yi Liu , Shy-Jay Lin , Wen-Chuan Wang , Jaw-Jung Shin , Burn Jeng Lin
发明人： Pei-Yi Liu , Shy-Jay Lin , Wen-Chuan Wang , Jaw-Jung Shin , Burn Jeng Lin
IPC分类号： G06F17/50
CPC分类号： G03F1/36
摘要： The present disclosure involves a method of data preparation in lithography processes. The method of data preparation includes providing an integrated circuit (IC) layout design in a graphic database system (GDS) grid, and converting the IC layout design GDS grid to a second exposure grid by applying an error diffusion and a grid shift technique to a sub-pixel exposure grid.
摘要翻译：本公开涉及在光刻工艺中的数据准备方法。数据准备的方法包括在图形数据库系统（GDS）网格中提供集成电路（IC）布局设计，并且通过向第二曝光网格应用误差扩散和网格移位技术将IC布局设计GDS网格转换为第二曝光网格子像素曝光网格。

5. 发明申请

US20130232453A1 NON-DIRECTIONAL DITHERING METHODS 有权
标题翻译：非方向抖动方法
公开(公告)号：US20130232453A1
公开(公告)日：2013-09-05
申请号：US13409653
申请日：2012-03-01
申请人： Pei-Yi Liu , Shy-Jay Lin , Wen-Chuan Wang , Jaw-Jung Shin , Burn Jeng Lin
发明人： Pei-Yi Liu , Shy-Jay Lin , Wen-Chuan Wang , Jaw-Jung Shin , Burn Jeng Lin
IPC分类号： G06F17/50
CPC分类号： G03F7/00 , G03F1/00 , G03F7/70433 , G06F17/5081 , G06F19/00 , G21K5/00
摘要： A method of data preparation in lithography processes is described. The method includes providing an integrated circuit (IC) layout design in a graphic database system (GDS) grid, converting the IC layout design GDS grid to a first exposure grid, applying a non-directional dither technique to the first exposure, coincident with applying dithering to the first expose grid, applying a grid shift to the first exposure grid to generate a grid-shifted exposure grid and applying a dither to the grid-shifted exposure grid, and adding the first exposure grid (after receiving dithering) to the grid-shifted exposure grid (after receiving dithering) to generate a second exposure grid.
摘要翻译：描述了光刻工艺中数据准备的方法。该方法包括在图形数据库系统（GDS）网格中提供集成电路（IC）布局设计，将IC布局设计GDS网格转换为第一曝光网格，将非定向抖动技术应用于第一曝光，与应用将第一曝光栅格抖动到第一曝光栅格，将栅格移位施加到第一曝光栅格以产生栅格移动的曝光栅格并向栅格曝光栅格施加抖动，并将第一曝光栅格（在接收抖动之后）添加到栅格转换曝光网格（在接收到抖动之后）以产生第二曝光网格。

6. 发明授权

US08530121B2 Multiple-grid exposure method 有权
标题翻译：多栅曝光法
公开(公告)号：US08530121B2
公开(公告)日：2013-09-10
申请号：US13368877
申请日：2012-02-08
申请人： Wen Chuan Wang , Shy-Jay Lin , Pei-Yi Liu , Jaw-Jung Shin , Burn Jeng Lin
发明人： Wen Chuan Wang , Shy-Jay Lin , Pei-Yi Liu , Jaw-Jung Shin , Burn Jeng Lin
IPC分类号： G03F9/00 , G03G5/00
CPC分类号： G03F7/2022 , B82Y10/00 , B82Y40/00 , G03F7/20 , G03F7/704 , H01J37/3026 , H01J37/3174 , Y10S430/143
摘要： A method for fabricating a semiconductor device is disclosed. An exemplary method includes receiving an integrated circuit (IC) layout design including a target pattern on a grid. The method further includes receiving a multiple-grid structure. The multiple-grid structure includes a number of exposure grid segments offset one from the other by an offset amount in a first direction. The method further includes performing a multiple-grid exposure to expose the target pattern on a substrate and thereby form a circuit feature pattern on the substrate. Performing the multiple-grid exposure includes scanning the substrate with the multiple-grid structure in a second direction such that a sub-pixel shift of the exposed target pattern occurs in the first direction, and using a delta time (Δt) such that a sub-pixel shift of the exposed target pattern occurs in the second direction.
摘要翻译：公开了一种制造半导体器件的方法。一种示例性方法包括接收包括网格上的目标图案的集成电路（IC）布局设计。该方法还包括接收多网格结构。多栅格结构包括多个曝光网格段，其在第一方向上彼此偏移一个偏移量。该方法还包括执行多栅格曝光以将衬底上的目标图案曝光，从而在衬底上形成电路特征图案。执行多栅格曝光包括在第二方向上以多栅格结构扫描衬底，使得暴露的目标图案的子像素偏移在第一方向上发生，并且使用增量时间（Deltat）使得子像素曝光的目标图案的像素位移在第二方向发生。

7. 发明授权

US08584057B2 Non-directional dithering methods 有权
标题翻译：非定向抖动方法
公开(公告)号：US08584057B2
公开(公告)日：2013-11-12
申请号：US13409653
申请日：2012-03-01
申请人： Pei-Yi Liu , Shy-Jay Lin , Wen-Chuan Wang , Jaw-Jung Shin , Burn Jeng Lin
发明人： Pei-Yi Liu , Shy-Jay Lin , Wen-Chuan Wang , Jaw-Jung Shin , Burn Jeng Lin
IPC分类号： G06F17/50 , G06F19/00 , G03F1/00 , G21K5/00
CPC分类号： G03F7/00 , G03F1/00 , G03F7/70433 , G06F17/5081 , G06F19/00 , G21K5/00
摘要： A method of data preparation in lithography processes is described. The method includes providing an integrated circuit (IC) layout design in a graphic database system (GDS) grid, converting the IC layout design GDS grid to a first exposure grid, applying a non-directional dither technique to the first exposure, coincident with applying dithering to the first expose grid, applying a grid shift to the first exposure grid to generate a grid-shifted exposure grid and applying a dither to the grid-shifted exposure grid, and adding the first exposure grid (after receiving dithering) to the grid-shifted exposure grid (after receiving dithering) to generate a second exposure grid.
摘要翻译：描述了光刻工艺中数据准备的方法。该方法包括在图形数据库系统（GDS）网格中提供集成电路（IC）布局设计，将IC布局设计GDS网格转换为第一曝光网格，将非定向抖动技术应用于第一曝光，与应用将第一曝光栅格抖动到第一曝光栅格，将栅格移位施加到第一曝光栅格以产生栅格移动的曝光栅格并向栅格曝光栅格施加抖动，并将第一曝光栅格（在接收抖动之后）添加到栅格转换曝光网格（在接收到抖动之后）以产生第二曝光网格。

8. 发明申请

US20130203001A1 Multiple-Grid Exposure Method 有权
标题翻译：多网格曝光方法
公开(公告)号：US20130203001A1
公开(公告)日：2013-08-08
申请号：US13368877
申请日：2012-02-08
申请人： Wen-Chuan Wang , Shy-Jay Lin , Pei-Yi Liu , Jaw-Jung Shin , Burn Jeng Lin
发明人： Wen-Chuan Wang , Shy-Jay Lin , Pei-Yi Liu , Jaw-Jung Shin , Burn Jeng Lin
IPC分类号： G03F7/20
CPC分类号： G03F7/2022 , B82Y10/00 , B82Y40/00 , G03F7/20 , G03F7/704 , H01J37/3026 , H01J37/3174 , Y10S430/143
摘要： A method for fabricating a semiconductor device is disclosed. An exemplary method includes receiving an integrated circuit (IC) layout design including a target pattern on a grid. The method further includes receiving a multiple-grid structure. The multiple-grid structure includes a number of exposure grid segments offset one from the other by an offset amount in a first direction. The method further includes performing a multiple-grid exposure to expose the target pattern on a substrate and thereby form a circuit feature pattern on the substrate. Performing the multiple-grid exposure includes scanning the substrate with the multiple-grid structure in a second direction such that a sub-pixel shift of the exposed target pattern occurs in the first direction, and using a delta time (Δt) such that a sub-pixel shift of the exposed target pattern occurs in the second direction.
摘要翻译：公开了一种制造半导体器件的方法。一种示例性方法包括接收包括网格上的目标图案的集成电路（IC）布局设计。该方法还包括接收多网格结构。多栅格结构包括多个曝光网格段，其在第一方向上彼此偏移一个偏移量。该方法还包括执行多栅格曝光以将衬底上的目标图案曝光，从而在衬底上形成电路特征图案。执行多栅格曝光包括在第二方向上以多栅格结构扫描衬底，使得暴露的目标图案的子像素偏移在第一方向上发生，并且使用增量时间（Deltat）使得子像素曝光的目标图案的像素位移在第二方向发生。

9. 发明申请

US20120235063A1 Systems and Methods Providing Electron Beam Writing to a Medium 有权
标题翻译：提供电子束写入介质的系统和方法
公开(公告)号：US20120235063A1
公开(公告)日：2012-09-20
申请号：US13051507
申请日：2011-03-18
申请人： Wen-Chuan Wang , Shy-Jay Lin , Jaw-Jung Shin , Burn Jeng Lin
发明人： Wen-Chuan Wang , Shy-Jay Lin , Jaw-Jung Shin , Burn Jeng Lin
IPC分类号： G21K5/00
CPC分类号： G03F7/2059 , B82Y10/00 , B82Y40/00 , H01J37/3007 , H01J37/317 , H01J37/3177 , H01J2237/31761 , H01J2237/31774
摘要： A method for electron-beam writing to a medium includes positioning the medium within an e-beam writing machine so that the medium is supported by a stage and is exposed to an e-beam source. The method also includes writing a pattern to the medium using a plurality of independently-controllable beams of the e-beam source, in which the pattern comprises a plurality of parallel strips. Each of the parallel strips is written using multiple ones of the independently-controllable beams.
摘要翻译：用于电子束写入介质的方法包括将介质定位在电子束写入机内，使得介质由载物台支撑并暴露于电子束源。该方法还包括使用电子束源的多个可独立控制的光束将介质写入介质，其中图案包括多个平行条带。使用多个可独立控制的光束来写入每个平行条带。

10. 发明授权

US08524427B2 Electron beam lithography system and method for improving throughput 有权
标题翻译：电子束光刻系统及提高产量的方法
公开(公告)号：US08524427B2
公开(公告)日：2013-09-03
申请号：US13087133
申请日：2011-04-14
申请人： Jaw-Jung Shin , Shy-Jay Lin , Wen-Chuan Wang , Burn Jeng Lin
发明人： Jaw-Jung Shin , Shy-Jay Lin , Wen-Chuan Wang , Burn Jeng Lin
IPC分类号： G03C5/00 , G03F9/00
CPC分类号： G03F7/20 , B82Y10/00 , B82Y40/00 , G03F7/2059 , H01J37/3026 , H01J37/3174 , H01J2237/31764 , Y10S430/143
摘要： An electron beam lithography method and apparatus for improving throughput is disclosed. An exemplary lithography method includes receiving a pattern layout having a pattern layout dimension; shrinking the pattern layout dimension; and overexposing a material layer to the shrunk pattern layout dimension, thereby forming the pattern layout having the pattern layout dimension on the material layer.
摘要翻译：公开了一种用于提高吞吐量的电子束光刻方法和装置。示例性光刻方法包括接收具有图案布局尺寸的图案布局; 缩小图案布局尺寸; 并且将材料层过度曝光到缩小图案布局尺寸，从而在材料层上形成具有图案布局尺寸的图案布局。

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