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1. 发明授权

US08351558B2 Multiphase direct RF frequency to digital converter and related method 有权
标题翻译：多相直接射频到数字转换器及相关方法
公开(公告)号：US08351558B2
公开(公告)日：2013-01-08
申请号：US12567427
申请日：2009-09-25
申请人： Richard H. Strandberg , Paul Cheng-Po Liang
发明人： Richard H. Strandberg , Paul Cheng-Po Liang
IPC分类号： H03D3/00 , H03D3/24 , G01R25/00 , H04L7/04
CPC分类号： H04L27/18
摘要： The disclosure provides an effective means for fine-resolution determination of the frequency content of an RF signal using low speed digital circuits. The disclosure relates to a method and apparatus for decomposing a high frequency RF signal into several low frequency signals or data streams without loss of any information and without the use of extraneous circuit components such as local oscillators, mixers or offset phase-locked loops. Single or multiple phase oscillator outputs are fed directly to a single or multiple direct RF frequency-to-digital (DrfDC) circuits. The front end of the DrfDC circuit decomposes a high frequency signal into several low frequency signals without loss of any information. The low frequency signals are processed by the back-end of the DrfDC and converted into digital data streams. The digital data streams are then combined and averaged to represent the frequency of the input RF signal.
摘要翻译：本公开提供了使用低速数字电路精细分辨率确定RF信号的频率内容的有效手段。本公开涉及一种用于将高频RF信号分解为几个低频信号或数据流而不丢失任何信息并且不使用诸如本地振荡器，混频器或偏移锁相环之类的外部电路部件的方法和装置。单相或多相振荡器输出直接馈送到单个或多个直接RF频数（DrfDC）电路。 DrfDC电路的前端将高频信号分解成几个低频信号，而不会丢失任何信息。低频信号由DrfDC的后端处理并转换为数字数据流。然后将数字数据流组合并平均以表示输入RF信号的频率。

2. 发明授权

US08331490B2 Methods and apparatus for conditioning communications signals based on detection of high-frequency events in polar domain 有权
标题翻译：基于极地域高频事件检测的通信信号调理方法和装置
公开(公告)号：US08331490B2
公开(公告)日：2012-12-11
申请号：US12395981
申请日：2009-03-02
申请人： Hua Wang , Paul Cheng-Po Liang , Richard W. D. Booth , Stephan V. Schell , Thomas E. Biedka
发明人： Hua Wang , Paul Cheng-Po Liang , Richard W. D. Booth , Stephan V. Schell , Thomas E. Biedka
IPC分类号： H04L27/20
CPC分类号： H04L25/03866
摘要： Methods and apparatus for conditioning communications signals based on detection of high-frequency in the polar domain. High-frequency events detected in a phase-difference component of a complex baseband signal in the polar domain are detected and used as a basis for performing hole-blowing on the complex baseband signal in the quadrature domain and/or nonlinear filtering either or both the magnitude and phase-difference components in the polar domain. Alternatively, high-frequency events detected in the phase-difference signal that correlate in time with low-magnitude events detected in a magnitude component of the complex baseband signal are used as a basis for performing hole-blowing on the complex baseband signal in the quadrature domain and/or nonlinear filtering either or both the magnitude and phase-difference components in the polar domain.
摘要翻译：基于极区域中高频检测的通信信号调理方法和装置。检测在极坐标域中的复基带信号的相差分量中检测到的高频事件，并将其用作在正交域中的复基带信号上执行空气吹扫和/或非线性滤波的基础极化域中的幅度和相位差分量。或者，在相位差信号中检测到的与在复基带信号的幅度分量中检测到的低幅度事件相关的高频事件被用作在正交中的复基带信号上执行吹空的基础域和/或非线性滤波极化域中的幅度和相位差分量之一或两者。

3. 发明授权

US08222939B2 Method and system for a glitch correction in an all digital phase lock loop 有权
标题翻译：全数字锁相环中毛刺校正的方法和系统
公开(公告)号：US08222939B2
公开(公告)日：2012-07-17
申请号：US12838754
申请日：2010-07-19
申请人： Koji Takinami , Richard Strandberg , Paul Cheng-Po Liang
发明人： Koji Takinami , Richard Strandberg , Paul Cheng-Po Liang
IPC分类号： H03L7/06
CPC分类号： H03L7/16 , H03L2207/50
摘要： The present invention relates to a method and system for glitch correction in an all digital phase lock loop. An all digital phase lock loop can include a phase error signal generation unit, a multi-phase oscillator, a glitch correction unit, and a phase to digital converter. The phase to digital converter receives a multi-phase signal from the multi-phase oscillator and generates a phase signal. The error signal generation unit receives the phase signal and a reference phase signal and generates a phase error signal, which is fed to the glitch correction unit. The glitch correction unit removes the glitches in the phase error signal by a portion of the phase error signal. The phase lock loop can also include a phase rotator and a calibration block. The calibration block instructs the phase rotator to rotate the multi-phase signal by the phase rotation which generates the minimum number of glitches.
摘要翻译：本发明涉及一种全数字锁相环中毛刺校正的方法和系统。全数字锁相环可以包括相位误差信号生成单元，多相位振荡器，毛刺校正单元和相位数字转换器。相数转换器从多相振荡器接收多相信号并产生相位信号。误差信号发生单元接收相位信号和参考相位信号，并产生馈送到毛刺校正单元的相位误差信号。毛刺校正单元通过相位误差信号的一部分去除相位误差信号中的毛刺。锁相环还可以包括相位旋转器和校准块。校准块指示相位旋转器通过相位旋转旋转多相信号，该相位旋转产生最小数量的毛刺。

4. 发明申请

US20110018640A1 TRANSMITTER UTILIZING A DUTY CYCLE ENVELOPE REDUCTION AND RESTORATION MODULATOR 有权
标题翻译：发射机利用占空比减少和恢复调制器
公开(公告)号：US20110018640A1
公开(公告)日：2011-01-27
申请号：US12508464
申请日：2009-07-23
申请人： Paul Cheng-Po Liang , Koji Takinami , Toru Matsuura
发明人： Paul Cheng-Po Liang , Koji Takinami , Toru Matsuura
IPC分类号： H03F1/00
CPC分类号： H03F1/0227 , H03F1/02 , H03F3/189 , H03F3/24 , H03F2200/336 , H03F2200/351 , H04B2001/045
摘要： A broad power band transmitter utilizing a duty cycle modulator achieves 80dB of power range for 3G signals. The present invention greatly improves the efficiency of transmitters used in mobile phones, for example, by using the duty cycle modulator during medium and low power levels of the transmitting power amplifier. The power amplifier operates in three different modes based upon the amplifier power level selected. The power amplifier operates in an EER mode during high power levels, in a DCM ERR mode during medium power levels, and in a DCM mode during low power levels.
摘要翻译：利用占空比调制器的宽带功率带发射机实现3G信号的80dB的功率范围。本发明大大提高了在移动电话中使用的发射机的效率，例如通过在发射功率放大器的中等和低功率电平期间使用占空比调制器。功率放大器基于选择的放大器功率电平在三种不同的模式下工作。功率放大器在高功率电平下处于EER模式，在中等功率电平下处于DCM ERR模式，在低功率级下处于DCM模式。

5. 发明申请

US20100316164A1 Methods and Apparatus for Reducing Average-to-Minimum Power Ratio in Communications Signals 有权
标题翻译：用于降低通信信号中的平均到最小功率比的方法和装置
公开(公告)号：US20100316164A1
公开(公告)日：2010-12-16
申请号：US12482913
申请日：2009-06-11
申请人： Paul Cheng-Po Liang , Hua Wang , Kenichi Mori
发明人： Paul Cheng-Po Liang , Hua Wang , Kenichi Mori
IPC分类号： H04L27/36 , H04L27/00
CPC分类号： H04L27/363 , H03F1/3241 , H03F3/24 , H04L27/361
摘要： A baseband circuit for a communications transmitter includes a baseband modulator, a pulse-shaping filter, and an AMPR reduction circuit. The baseband modulator is configured to generate a sequence of symbols formatted in accordance with a non-constant envelope modulation scheme. The pulse-shaping filter is configured to band-limit the sequence of samples to provide a sequence of samples. The AMPR reduction circuit is configured to analyze and modify one or more samples in the sequence of samples, if a sample in the sequence of samples that has been previously analyzed by the AMPR reduction circuit is determined to have a magnitude less than a predetermined low-magnitude threshold.
摘要翻译：用于通信发射机的基带电路包括基带调制器，脉冲整形滤波器和AMPR降低电路。基带调制器被配置为生成根据非恒定包络调制方案格式化的符号序列。脉冲整形滤波器被配置为限制样本序列以提供样本序列。 AMPR降低电路被配置为分析和修改样本序列中的一个或多个样本，如果已经由AMPR降低电路先前分析的样本序列中的样本被确定为具有小于预定低通滤波器的幅度，幅度阈值。

6. 发明申请

US20100015932A1 SIGNAL DECOMPOSITION METHODS AND APPARATUS FOR MULTI-MODE TRANSMITTERS 有权
标题翻译：信号分解方法和多模式发射机的设备
公开(公告)号：US20100015932A1
公开(公告)日：2010-01-21
申请号：US12176570
申请日：2008-07-21
申请人： Paul Cheng-Po Liang , Koji Takinami
发明人： Paul Cheng-Po Liang , Koji Takinami
IPC分类号： H04B1/66
CPC分类号： H04B1/66
摘要： A multi-mode communications transmitter includes a signal decomposer that converts rectangular-coordinate in-channel and quadrature channel signals into polar-coordinate amplitude and angle component signals and form therefrom first and second modulation signals. The signal decomposition process performed by the signal decomposer combines envelope-reduction and restoration (ERR) with filtering to reduce the bandwidths of the first and second modulation signals compared to the bandwidths of the unmodified amplitude and angle component signals. The reduction in signal bandwidths eases the design requirements of the electrical components needed to process and generate the signals applied to the power supply and radio frequency (RF) input ports of the multi-mode communications transmitter's power amplifier (PA). It also makes the multi-mode communications transmitter more forgiving to gain and delay mismatches between the signals applied to the power supply and RF input ports of the PA, compared to conventional polar modulation transmitters.
摘要翻译：多模式通信发射机包括信号分解器，其将矩形坐标的信道内和正交信道信号转换为极坐标振幅和角度分量信号，并从其形成第一和第二调制信号。由信号分解器进行的信号分解处理将包络减少和恢复（ERR）与滤波相结合，以与未修改的幅度和角度分量信号的带宽相比降低第一和第二调制信号的带宽。信号带宽的减少可以减轻处理和产生施加到多模式通信发射机功率放大器（PA）的电源和射频（RF）输入端口的信号所需的电气部件的设计要求。与传统的极性调制发射机相比，它还使得多模式通信发射机更加宽容地获得并延迟了施加到PA的电源和RF输入端口的信号之间的不匹配。

7. 发明申请

US20090257526A1 METHODS AND APPARATUS FOR CONDITIONING COMMUNICATIONS SIGNALS BASED ON DETECTION OF HIGH-FREQUENCY EVENTS IN POLAR DOMAIN 有权
标题翻译：基于检测极域中高频事件的通信信号调理方法与装置
公开(公告)号：US20090257526A1
公开(公告)日：2009-10-15
申请号：US12395981
申请日：2009-03-02
申请人： Hua Wang , Paul Cheng-Po Liang , Richard W.D. Booth , Stephan V. Schell , Thomas E. Biedka
发明人： Hua Wang , Paul Cheng-Po Liang , Richard W.D. Booth , Stephan V. Schell , Thomas E. Biedka
IPC分类号： H04L27/36
CPC分类号： H04L25/03866
摘要： Methods and apparatus for conditioning communications signals based on detection of high-frequency in the polar domain. High-frequency events detected in a phase-difference component of a complex baseband signal in the polar domain are detected and used as a basis for performing hole-blowing on the complex baseband signal in the quadrature domain and/or nonlinear filtering either or both the magnitude and phase-difference components in the polar domain. Alternatively, high-frequency events detected in the phase-difference signal that correlate in time with low-magnitude events detected in a magnitude component of the complex baseband signal are used as a basis for performing hole-blowing on the complex baseband signal in the quadrature domain and/or nonlinear filtering either or both the magnitude and phase-difference components in the polar domain.
摘要翻译：基于极区域中高频检测的通信信号调理方法和装置。检测在极坐标域中的复基带信号的相差分量中检测到的高频事件，并将其用作在正交域中的复基带信号上执行空气吹扫和/或非线性滤波的基础极化域中的幅度和相位差分量。或者，在相位差信号中检测到的与在复基带信号的幅度分量中检测到的低幅度事件相关的高频事件被用作在正交中的复基带信号上执行吹空的基础域和/或非线性滤波极化域中的幅度和相位差分量之一或二者。

8. 发明授权

US08489046B2 Signal decomposition methods and apparatus for multi-mode transmitters 有权
标题翻译：用于多模发射机的信号分解方法和装置
公开(公告)号：US08489046B2
公开(公告)日：2013-07-16
申请号：US12176570
申请日：2008-07-21
申请人： Paul Cheng-Po Liang , Koji Takinami
发明人： Paul Cheng-Po Liang , Koji Takinami
IPC分类号： H01Q11/12 , H04B1/04
CPC分类号： H04B1/66
摘要： A multi-mode communications transmitter includes a signal decomposer that converts rectangular-coordinate in-channel and quadrature channel signals into polar-coordinate amplitude and angle component signals and form therefrom first and second modulation signals. The signal decomposition process performed by the signal decomposer combines envelope-reduction and restoration (ERR) with filtering to reduce the bandwidths of the first and second modulation signals compared to the bandwidths of the unmodified amplitude and angle component signals. The reduction in signal bandwidths eases the design requirements of the electrical components needed to process and generate the signals applied to the power supply and radio frequency (RF) input ports of the multi-mode communications transmitter's power amplifier (PA). It also makes the multi-mode communications transmitter more forgiving to gain and delay mismatches between the signals applied to the power supply and RF input ports of the PA, compared to conventional polar modulation transmitters.
摘要翻译：多模式通信发射机包括信号分解器，其将矩形坐标的信道内和正交信道信号转换为极坐标振幅和角度分量信号，并从其形成第一和第二调制信号。由信号分解器进行的信号分解处理将包络减少和恢复（ERR）与滤波相结合，以与未修改的幅度和角度分量信号的带宽相比降低第一和第二调制信号的带宽。信号带宽的减少可以减轻处理和产生施加到多模式通信发射机功率放大器（PA）的电源和射频（RF）输入端口的信号所需的电气部件的设计要求。与传统的极性调制发射机相比，它还使得多模式通信发射机更加宽容地获得并延迟了施加到PA的电源和RF输入端口的信号之间的不匹配。

9. 发明授权

US08340209B2 Method and apparatus for providing high efficiency cartesian modulation 有权
标题翻译：用于提供高效率笛卡尔调制的方法和装置
公开(公告)号：US08340209B2
公开(公告)日：2012-12-25
申请号：US12554863
申请日：2009-09-04
申请人： Paul Cheng-Po Liang , Koji Takinami , Hua Wang , Toru Matsuura
发明人： Paul Cheng-Po Liang , Koji Takinami , Hua Wang , Toru Matsuura
IPC分类号： H04L25/34 , H04L25/49
CPC分类号： H04L25/4917
摘要： The disclosure relates to a method and apparatus for providing efficient signal transmission. Conventional linear amplifiers are most efficient when operated in compressed mode. In the compressed mode, the digital power amplifier switches between the on and off modes. A digital power amplifier operates in compressed mode only if the incoming signal is an on-off constant envelop signal. In one embodiment, the disclosure provides a method and apparatus for converting a digital baseband signal to on-off constant envelop signals for processing through binary-weighted or thermometer-weighted amplifier which are operated in compressed mode.
摘要翻译：本公开涉及一种用于提供有效信号传输的方法和装置。传统的线性放大器在压缩模式下工作时效率最高。在压缩模式下，数字功率放大器在导通和关断模式之间切换。数字功率放大器仅在输入信号为开 - 关恒定包络信号时才以压缩模式工作。在一个实施例中，本公开提供了一种用于将数字基带信号转换为开 - 关恒定包络信号以便通过以压缩模式操作的二进制加权或温度计加权放大器进行处理的方法和装置。

10. 发明授权

US08193870B2 Method and system for compensation of frequency pulling in an all digital phase lock loop 有权
标题翻译：全数字锁相环频率补偿补偿方法及系统
公开(公告)号：US08193870B2
公开(公告)日：2012-06-05
申请号：US12838820
申请日：2010-07-19
申请人： Koji Takinami , Richard Strandberg , Paul Cheng-Po Liang
发明人： Koji Takinami , Richard Strandberg , Paul Cheng-Po Liang
IPC分类号： H03B7/12
CPC分类号： H03L7/0995 , H03L2207/06 , H03L2207/50
摘要： The present invention is a method and system for compensation of frequency pulling in an all digital phase lock loop. The all digital phase lock loop can utilize a multi-phase oscillator including latches with substantially all of the latches paired with a corresponding dummy cell. The dummy cells can have impedance characteristics, such as variable capacitance values which correspond to the variable capacitance value of the latches such that the sum of the two variable capacitance values remains substantially constant, even when the polarity of the reference clock signal changes. The dummy cells can be, for example, variable capacitors or dummy latches. The phase lock loop can also include a multiplying unit. The multiplying unit can receive a reference clock signal and generate a frequency multiplied reference clock signal.
摘要翻译：本发明是用于补偿全数字锁相环中的频率牵引的方法和系统。所有数字锁相环可以利用多相振荡器，其包括基本上所有锁存器与相应的虚拟单元配对的锁存器。虚拟单元可以具有阻抗特性，例如对应于锁存器的可变电容值的可变电容值，使得即使参考时钟信号的极性改变，两个可变电容值的总和也保持基本恒定。虚拟单元可以是例如可变电容器或虚拟锁存器。锁相环也可以包括乘法单元。乘法单元可以接收参考时钟信号并产生倍频参考时钟信号。

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