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    • 1. 发明授权
    • Field-testable integrated circuit and method of testing
    • 现场可测集成电路和测试方法
    • US5589766A
    • 1996-12-31
    • US417576
    • 1995-04-06
    • Paul A. FrankDonald T. McGrathDaniel A. Staver
    • Paul A. FrankDonald T. McGrathDaniel A. Staver
    • G01R31/28G01R31/02
    • G01R31/2884
    • A field-testable integrated circuit that includes a plurality of analog signal channels for receiving a respective analog signal during a normal mode of operation is provided. Individual test circuits are built-in within the integrated circuit for selecting respective ones of the plurality of channels to receive predetermined reference signals during a test mode of operation while uninterruptedly providing the normal mode of operation in any remaining unselected channels. Each test circuit includes a channel decoder responsive to predetermined channel select signals for producing a respective channel decoder output signal. A multiplexer is responsive to predetermined reference select signals and to the decoder output signal for supplying during the test mode of operation a selected one of the predetermined reference signals to the respective analog channel being coupled to the individual test circuit therein. A switching gate is responsive to the respective channel decoder output signal so that during the normal mode of operation the switching gate is in a respective conducting state for allowing the respective analog signal to pass therethrough while during the test mode of operation the switching gate is in a respective nonconductive state for interrupting the respective analog signal from passing therethrough.
    • 提供一种现场测试集成电路,其包括用于在正常操作模式期间接收相应模拟信号的多个模拟信号通道。 单个测试电路内置在集成电路内,用于选择多个通道中的相应通道以在测试操作模式期间接收预定的参考信号,同时在任何剩余的未选择的通道中不间断地提供正常操作模式。 每个测试电路包括响应于预定信道选择信号的信道解码器,以产生相应的信道解码器输出信号。 多路复用器响应于预定的参考选择信号和解码器输出信号,以在测试操作模式期间将选定的一个预定参考信号提供给相应的模拟通道,耦合到各个测试电路。 开关门响应于相应的通道解码器输出信号,使得在正常操作模式期间,开关门处于相应的导通状态,以允许相应的模拟信号通过,而在测试操作模式期间,开关门处于 用于中断相应的模拟信号从而通过的相应的非导通状态。
    • 2. 发明授权
    • Decimation filter having a selectable decimation ratio
    • 具有可选择抽取比率的抽取滤波器
    • US5548540A
    • 1996-08-20
    • US265475
    • 1994-06-24
    • Daniel A. StaverDonald T. McGrath
    • Daniel A. StaverDonald T. McGrath
    • H03H17/06G06F15/31
    • H03H17/0664
    • A decimation filter for filtering an externally derived stream of quantized electrical signals having a predetermined rate includes a coefficient generator responsive to a set of externally derived decimation-ratio select signals to provide a separate normalized coefficient signal at each respective one of a plurality of output ports. An accumulator is coupled to the coefficient generator to receive each normalized coefficient signal generated therein. The accumulator receives the stream of quantized electrical signals so as to produce, upon masking with respective ones of the received normalized coefficient signals, a plurality of accumulator output signals. An overflow detector is coupled to the accumulator to detect and correct any overflow condition arising in the accumulator.
    • 用于对具有预定速率的外部导出的量化电信号流进行滤波的抽取滤波器包括响应于一组外部推出的抽取比选择信号的系数发生器,以在多个输出端口中的每个相应的一个输出端口处提供单独的归一化系数信号 。 累加器耦合到系数发生器以接收其中产生的每个归一化系数信号。 累加器接收量化电信号流,以便在接收到的归一化系数信号中的相应的一个被掩蔽时产生多个累加器输出信号。 溢流检测器耦合到蓄电池,以检测和校正蓄电池中产生的任何溢出状况。
    • 3. 发明授权
    • Decimation filter using a zero-fill circuit for providing a selectable
decimation ratio
    • 抽取滤波器使用零填充电路提供可选择的抽取比例
    • US5463569A
    • 1995-10-31
    • US265343
    • 1994-06-24
    • Daniel A. StaverDonald T. McGrath
    • Daniel A. StaverDonald T. McGrath
    • H03H17/06G06F15/31
    • H03H17/0664
    • A decimation filter for filtering an externally derived stream of quantized electrical signals includes a coefficient generator responsive to a set of externally derived decimation-ratio select signals to provide a separate normalized coefficient signal at each respective one of a plurality of output ports. The coefficient generator employs a zero-fill circuit comprising first and second circuits which selectively ripple therethrough an scaling-control output signal from a demultiplexer unit in order to provide the normalized coefficient signals. An accumulator is coupled to the coefficient generator to receive each normalized coefficient signal generated therein. The accumulator receives the stream of quantized electrical signals so as to produce, upon masking with respective ones of the received normalized coefficient signals, a plurality of accumulator output signals. An overflow detector is coupled to the accumulator to detect and correct any overflow condition arising in the accumulator.
    • 用于对外部导出的量化电信号流进行滤波的抽取滤波器包括响应于一组外部导出的抽取比选择信号的系数发生器,以在多个输出端口中的每个相应的一个输出端口处提供单独的归一化系数信号。 系数发生器采用零填充电路,该零填充电路包括第一和第二电路,其选择性地从多路分解器单元中纹波通过缩放控制输出信号,以便提供归一化的系数信号。 累加器耦合到系数发生器以接收其中产生的每个归一化系数信号。 累加器接收量化电信号流,以便在接收到的归一化系数信号中的相应的一个被掩蔽时产生多个累加器输出信号。 溢流检测器耦合到蓄电池,以检测和校正蓄电池中产生的任何溢出状况。
    • 4. 发明授权
    • Relocatable built-in self test (BIST) elements for relocatable mixed-signal elements
    • 可重定位的内置自检(BIST)元素,用于可重定位的混合信号元素
    • US07373622B2
    • 2008-05-13
    • US11129547
    • 2005-05-13
    • Scott C. SavageDonald T. McGrathRobert D. WaldronKenneth G. Richardson
    • Scott C. SavageDonald T. McGrathRobert D. WaldronKenneth G. Richardson
    • G06F17/50
    • G01R31/31704G01R31/3167
    • An apparatus including a base layer of a platform application specific integrated circuit (ASIC), a mixed-signal function and a built-in self test (BIST) function. The base layer of the platform ASIC generally includes a plurality of pre-diffused regions disposed around a periphery of the platform ASIC. Each of the pre-diffused regions is generally configured to be metal-programmable. The mixed-signal function may include two or more sub-functions formed with a metal mask set placed over a first number of the plurality of pre-diffused regions. The BIST function may be formed with a metal mask set placed over a second number of the plurality of pre-diffused regions. The BIST function may be configured to test the mixed-signal function and present a digital signal indicating an operating condition of the mixed-signal function.
    • 一种包括平台专用集成电路(ASIC)的基础层,混合信号功能和内置自检(BIST)功能的装置。 平台ASIC的基础层通常包括围绕平台ASIC的外围设置的多个预扩散区域。 每个预扩散区域通常被配置为金属可编程的。 混合信号功能可以包括由设置在多个预扩散区域的第一数量上的金属掩模组形成的两个或更多个子功能。 BIST功能可以形成有放置在多个预扩散区域的第二数量上的金属掩模组。 BIST功能可以被配置为测试混合信号功能并呈现指示混合信号功能的操作条件的数字信号。