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1. 发明申请

US20120233479A1 Oversubscribing Branch Circuits While Lowering Power Distribution Costs 失效
标题翻译：降低分配成本的过度分支电路
公开(公告)号：US20120233479A1
公开(公告)日：2012-09-13
申请号：US13451181
申请日：2012-04-19
申请人： Patrick K. Egan , Wesley M. Felter , Karthick Rajamani , Juan C. Rubio , Malcolm S. Ware
发明人： Patrick K. Egan , Wesley M. Felter , Karthick Rajamani , Juan C. Rubio , Malcolm S. Ware
IPC分类号： G06F1/32
CPC分类号： G06F1/30
摘要： A mechanism is provided for oversubscribing branch circuits. An active energy management mechanism determines a cumulative wattage rating using power consumption information for a powered element, the power consumption information is for a primary and a redundant portion of the powered element. The active energy management mechanism determines a power reduction power cap to be used by the powered element in the event of a loss of either a primary or a redundant power source supplied to the powered element using the cumulative wattage rating, a branch circuit rating, and a circuit breaker rating for the powered element. The active energy management mechanism sends the power reduction power cap to the powered element in order that the powered element reduces power to the power reduction power cap in the event of the loss of either the primary power source or the redundant power source supplied to the powered element.
摘要翻译：提供了一种用于超额订购分支电路的机制。主动能量管理机构使用功率元件的功耗信息确定累积功率额定值，功率消耗信息用于有源元件的主要部分和冗余部分。主动能量管理机构确定在使用累积功率额定值，分支电路额定值和供电元件的主电源或冗余电源的损耗的情况下由供电元件使用的功率降低功率帽，以及电源元件的断路器额定值。主动能量管理机构将功率降低功率帽发送到有源元件，以便在被供电到主动力源的主电源或冗余电源丢失的情况下，有源元件降低功率降低功率上限的功率元件。

2. 发明授权

US08392729B2 Oversubscribing branch circuits while lowering power distribution costs 失效
标题翻译：超大规模的分支电路，同时降低配电成本
公开(公告)号：US08392729B2
公开(公告)日：2013-03-05
申请号：US13451181
申请日：2012-04-19
申请人： Patrick K. Egan , Wesley M. Felter , Karthick Rajamani , Juan C. Rubio , Malcolm S. Ware
发明人： Patrick K. Egan , Wesley M. Felter , Karthick Rajamani , Juan C. Rubio , Malcolm S. Ware
IPC分类号： G06F1/26
CPC分类号： G06F1/30
摘要： A mechanism is provided for oversubscribing branch circuits. An active energy management mechanism determines a cumulative wattage rating using power consumption information for a powered element, the power consumption information is for a primary and a redundant portion of the powered element. The active energy management mechanism determines a power reduction power cap to be used by the powered element in the event of a loss of either a primary or a redundant power source supplied to the powered element using the cumulative wattage rating, a branch circuit rating, and a circuit breaker rating for the powered element. The active energy management mechanism sends the power reduction power cap to the powered element in order that the powered element reduces power to the power reduction power cap in the event of the loss of either the primary power source or the redundant power source supplied to the powered element.
摘要翻译：提供了一种用于超额订购分支电路的机制。主动能量管理机构使用功率元件的功耗信息确定累积功率额定值，功率消耗信息用于有源元件的主要部分和冗余部分。主动能量管理机构确定在使用累积功率额定值，分支电路额定值和供电元件的主电源或冗余电源的损耗的情况下由供电元件使用的功率降低功率帽，以及电源元件的断路器额定值。主动能量管理机构将功率降低功率帽发送到有源元件，以便在被供电到主动力源的主电源或冗余电源丢失的情况下，有源元件降低功率降低功率上限的功率元件。

3. 发明授权

US08352757B2 Oversubscribing branch circuits while lowering power distribution costs 失效
公开(公告)号：US08352757B2
公开(公告)日：2013-01-08
申请号：US12686008
申请日：2010-01-12
申请人： Patrick K. Egan , Wesley M. Felter , Karthick Rajamani , Juan C. Rubio , Malcolm S. Ware
发明人： Patrick K. Egan , Wesley M. Felter , Karthick Rajamani , Juan C. Rubio , Malcolm S. Ware
IPC分类号： G06F1/26
CPC分类号： G06F1/30
摘要： A mechanism is provided for oversubscribing branch circuits. An active energy management mechanism determines a cumulative wattage rating using power consumption information for a powered element, the power consumption information is for a primary and a redundant portion of the powered element. The active energy management mechanism determines a power reduction power cap to be used by the powered element in the event of a loss of either a primary or a redundant power source supplied to the powered element using the cumulative wattage rating, a branch circuit rating, and a circuit breaker rating for the powered element. The active energy management mechanism sends the power reduction power cap to the powered element in order that the powered element reduces power to the power reduction power cap in the event of the loss of either the primary power source or the redundant power source supplied to the powered element.

4. 发明申请

US20110173468A1 Oversubscribing Branch Circuits While Lowering Power Distribution Costs 失效
标题翻译：降低分配成本的过度分支电路
公开(公告)号：US20110173468A1
公开(公告)日：2011-07-14
申请号：US12686008
申请日：2010-01-12
申请人： Patrick K. Egan , Wesley M. Felter , Karthick Rajamani , Juan C. Rubio , Malcolm S. Ware
发明人： Patrick K. Egan , Wesley M. Felter , Karthick Rajamani , Juan C. Rubio , Malcolm S. Ware
IPC分类号： G06F1/26
CPC分类号： G06F1/30
摘要： A mechanism is provided for oversubscribing branch circuits. An active energy management mechanism determines a cumulative wattage rating using power consumption information for a powered element, the power consumption information is for a primary and a redundant portion of the powered element. The active energy management mechanism determines a power reduction power cap to be used by the powered element in the event of a loss of either a primary or a redundant power source supplied to the powered element using the cumulative wattage rating, a branch circuit rating, and a circuit breaker rating for the powered element. The active energy management mechanism sends the power reduction power cap to the powered element in order that the powered element reduces power to the power reduction power cap in the event of the loss of either the primary power source or the redundant power source supplied to the powered element.
摘要翻译：提供了一种用于超额订购分支电路的机制。主动能量管理机构使用功率元件的功耗信息确定累积功率额定值，功率消耗信息用于有源元件的主要部分和冗余部分。主动能量管理机构确定在使用累积功率额定值，分支电路额定值和供电元件的主电源或冗余电源的损耗的情况下由供电元件使用的功率降低功率帽，以及电源元件的断路器额定值。主动能量管理机构将功率降低功率帽发送到有源元件，以便在被供电到主动力源的主电源或冗余电源丢失的情况下，有源元件降低功率降低功率上限的功率元件。

5. 发明授权

US07272517B1 Method and system for providing performance estimations for a specified power budget 有权
标题翻译：用于为指定功率预算提供性能估计的方法和系统
公开(公告)号：US07272517B1
公开(公告)日：2007-09-18
申请号：US11380101
申请日：2006-04-25
申请人： Thomas M. Brey , Wesley M. Felter , Charles R. Lefurgy , Karthick Rajamani , Juan C. Rubio , Malcolm S. Ware
发明人： Thomas M. Brey , Wesley M. Felter , Charles R. Lefurgy , Karthick Rajamani , Juan C. Rubio , Malcolm S. Ware
IPC分类号： G01R21/00 , G06F15/00
CPC分类号： G06F11/3409 , G01R21/1333 , G06F11/3452 , G06F2201/88 , Y02D10/34
摘要： A method and system for providing performance estimations for a specified power budget provides an indication of the impact on processing performance when closed-loop power/performance control is employed to meet the specified power budget. A workload, which may be the actual workload, or a test workload is run to determine actual power consumption at intervals during the execution of the workload. The power values are examined and if they exceed the specified budget, which may be one of multiple possible budget values, an estimate of the amount by and duration for which the closed-loop power/performance control would have to reduce the performance of the system for each interval in order to provide an estimate of actual performance for the budgetary level(s). The estimate is informed by tests of the workload at each power/performance level to provide a non-linear estimate of the relationship between performance and power for the particular workload.
摘要翻译：用于为指定功率预算提供性能估计的方法和系统提供了当采用闭环功率/性能控制以满足指定功率预算时对处理性能的影响的指示。运行可能是实际工作负载的工作负载或测试工作负载，以确定在执行工作负载期间的间隔实际功耗。检查功率值，如果它们超出了可能是多个可能预算值之一的指定预算，则闭环功率/性能控制必须降低系统性能的量和持续时间的估计为每个间隔提供对预算级别的实际绩效的估计。通过对每个功率/性能级别的工作负载测试通知估计值，以提供对特定工作负载的性能和功耗之间的关系的非线性估计。

6. 发明授权

US08358503B2 Stackable module for energy-efficient computing systems 有权
标题翻译：用于节能计算系统的可堆叠模块
公开(公告)号：US08358503B2
公开(公告)日：2013-01-22
申请号：US12789617
申请日：2010-05-28
申请人： John B. Carter , Wael R. El-Essawy , Elmootazbellah N. Elnozahy , Wesley M. Felter , Madhusudan K. Iyengar , Thomas W. Keller, Jr. , Karthick Rajamani , Juan C. Rubio , William E. Speight , Lixin Zhang
发明人： John B. Carter , Wael R. El-Essawy , Elmootazbellah N. Elnozahy , Wesley M. Felter , Madhusudan K. Iyengar , Thomas W. Keller, Jr. , Karthick Rajamani , Juan C. Rubio , William E. Speight , Lixin Zhang
IPC分类号： H05K7/20
CPC分类号： H05K7/20 , G06F1/181 , G06F1/20
摘要： A modular processing module is provided. The modular processing module comprises a set of processing module sides. Each processing module side comprises a circuit board, a plurality of connectors coupled to the circuit board, and a plurality of processing nodes coupled to the circuit board. Each processing module side in the set of processing module sides couples to another processing module side using at least one connector in the plurality of connectors such that, when all of the set of processing module sides are coupled together, the modular processing module is formed. The modular processing module comprises an exterior connection to a power source and a communication system.
摘要翻译：提供模块化处理模块。模块化处理模块包括一组处理模块侧面。每个处理模块侧包括电路板，耦合到电路板的多个连接器以及耦合到电路板的多个处理节点。处理模块组中的每个处理模块侧均使用多个连接器中的至少一个连接器耦合到另一个处理模块侧，使得当所有这组处理模块侧面耦合在一起时，形成模块化处理模块。模块化处理模块包括到电源和通信系统的外部连接。

7. 发明申请

US20110292597A1 Stackable Module for Energy-Efficient Computing Systems 有权
标题翻译：用于节能计算系统的可堆叠模块
公开(公告)号：US20110292597A1
公开(公告)日：2011-12-01
申请号：US12789617
申请日：2010-05-28
申请人： John B. Carter , Wael R. El-Essawy , Elmootazbellah N. Elnozahy , Wesley M. Felter , Madhusudan K. Iyengar , Thomas W. Keller, JR. , Karthick Rajamani , Juan C. Rubio , William E. Speight , Lixin Zhang
发明人： John B. Carter , Wael R. El-Essawy , Elmootazbellah N. Elnozahy , Wesley M. Felter , Madhusudan K. Iyengar , Thomas W. Keller, JR. , Karthick Rajamani , Juan C. Rubio , William E. Speight , Lixin Zhang
IPC分类号： G06F1/20 , G06F13/00
CPC分类号： H05K7/20 , G06F1/181 , G06F1/20
摘要： A modular processing module is provided. The modular processing module comprises a set of processing module sides. Each processing module side comprises a circuit board, a plurality of connectors coupled to the circuit board, and a plurality of processing nodes coupled to the circuit board. Each processing module side in the set of processing module sides couples to another processing module side using at least one connector in the plurality of connectors such that, when all of the set of processing module sides are coupled together, the modular processing module is formed. The modular processing module comprises an exterior connection to a power source and a communication system.
摘要翻译：提供模块化处理模块。模块化处理模块包括一组处理模块侧面。每个处理模块侧包括电路板，耦合到电路板的多个连接器以及耦合到电路板的多个处理节点。处理模块组中的每个处理模块侧均使用多个连接器中的至少一个连接器耦合到另一个处理模块侧，使得当所有这组处理模块侧面耦合在一起时，形成模块化处理模块。模块化处理模块包括到电源和通信系统的外部连接。

8. 发明授权

US08171319B2 Managing processor power-performance states 失效
标题翻译：管理处理器功耗状态
公开(公告)号：US08171319B2
公开(公告)日：2012-05-01
申请号：US12425189
申请日：2009-04-16
申请人： Soraya Ghiasi , Malcolm S. Ware , Karthick Rajamani , Freeman L. Rawson, III , Michael S. Floyd , Juan C. Rubio
发明人： Soraya Ghiasi , Malcolm S. Ware , Karthick Rajamani , Freeman L. Rawson, III , Michael S. Floyd , Juan C. Rubio
IPC分类号： G06F1/32
CPC分类号： G06F1/3203 , G06F1/324 , G06F1/3296 , Y02D10/126 , Y02D10/172
摘要： Disclosed are systems, methods, and computer program products for managing power states in processors of a data processing system. In one embodiment, the invention is directed to a data processing system having dynamically configurable power-performance states (“pstates”). The data processing system includes a processor configured to operate at multiple states of frequency and voltage. The data processing system also has a power manager module configured to monitor operation of the data processing system. The data processing system further includes a pstates table having a plurality of pstate definitions, wherein each pstate definition includes a voltage value, a frequency value, and at least one unique pointer that indicates a transition from a given pstate to a different pstate. The voltage value, frequency value, and unique pointer of a given pstate definition are configurable, during operation of the data processing system, by the power manager module in response to changes in the operating parameters of the data processing system.
摘要翻译：公开了用于管理数据处理系统的处理器中的电力状态的系统，方法和计算机程序产品。在一个实施例中，本发明涉及具有动态可配置的功率状态（“pstates”）的数据处理系统。数据处理系统包括配置成在多个频率和电压状态下工作的处理器。数据处理系统还具有被配置为监视数据处理系统的操作的功率管理器模块。数据处理系统还包括具有多个pstate定义的pstates表，其中每个pstate定义包括电压值，频率值和指示从给定pstate到不同pstate的转换的至少一个唯一指针。给定pstate定义的电压值，频率值和唯一指针在数据处理系统的操作期间可由电源管理器模块根据数据处理系统的操作参数的变化进行配置。

9. 发明授权

US08566618B2 Reliable setting of voltage and frequency in a microprocessor 有权
标题翻译：微处理器中电压和频率的可靠设置
公开(公告)号：US08566618B2
公开(公告)日：2013-10-22
申请号：US12573284
申请日：2009-10-05
申请人： Michael S. Floyd , Karthick Rajamani , Juan C. Rubio , Malcolm S. Ware
发明人： Michael S. Floyd , Karthick Rajamani , Juan C. Rubio , Malcolm S. Ware
IPC分类号： G06F1/00 , G06F1/26
CPC分类号： G06F1/3296 , G06F1/3203 , G06F1/324 , Y02D10/126 , Y02D10/172
摘要： Managing operations associated with one or more voltage changes and one or more frequency changes. A voltage change request and a frequency change request are associated with dynamic voltage and frequency scaling (DVFS) operations. The DVFS operations are transmitted by the processors to be executed by one or more direct current assemblies. A sequence associated with the one or more voltage changes and a sequence associated with the one or more frequency changes are detected by the system. The sequences are dynamically modified to enable insertion of an additional voltage change, whereby the additional voltage change indicates completion of one or more previous voltage change requests. Completion of the voltage change request enables one or more subsequent voltage change requests to be processed. When a voltage change request is not successfully completed one or more future voltage changes are suspended.
摘要翻译：管理与一个或多个电压变化和一个或多个频率变化相关联的操作。电压变化请求和频率变化请求与动态电压和频率缩放（DVFS）操作相关联。 DVFS操作由处理器发送以由一个或多个直流组件执行。与该一个或多个电压变化相关联的序列和与一个或多个频率变化相关联的序列由系统检测。这些序列被动态地修改以允许插入额外的电压变化，由此额外的电压变化指示完成一个或多个先前的电压变化请求。完成电压变化请求使得能够处理一个或多个后续电压变化请求。当电压变化请求未成功完成时，一个或多个未来的电压变化被暂停。

10. 发明授权

US07908493B2 Unified management of power, performance, and thermals in computer systems 有权
标题翻译：计算机系统中的功率，性能和热量的统一管理
公开(公告)号：US07908493B2
公开(公告)日：2011-03-15
申请号：US11758798
申请日：2007-06-06
申请人： Andreas Bieswanger , Michael S. Floyd , Soraya Ghiasi , Steven P. Hartman , Thomas W. Keller, Jr. , Hye-Young McCreary , Karthick Rajamani , Freeman L. Rawson, III , Juan C. Rubio , Malcolm S. Ware
发明人： Andreas Bieswanger , Michael S. Floyd , Soraya Ghiasi , Steven P. Hartman , Thomas W. Keller, Jr. , Hye-Young McCreary , Karthick Rajamani , Freeman L. Rawson, III , Juan C. Rubio , Malcolm S. Ware
IPC分类号： G06F1/32
CPC分类号： G06F1/206 , G06F1/3203
摘要： A mechanism is provided for unified management of power, performance, and thermals in computer systems. This mechanism incorporates elements to effectively address all aspects of managing computing systems in an integrated manner, instead of independently. The mechanism employs an infrastructure for real-time measurements feedback, an infrastructure for regulating system activity, component operating levels, and environmental control, a dedicated control structure for guaranteed response/preemptive action, and interaction and integration components. The mechanism provides interfaces for user-level interaction. The mechanism also employs methods to address power/thermal concerns at multiple timescales. In addition, the mechanism improves efficiency by adopting an integrated approach, rather than treating different aspects of the power/thermal problem as individual issues to be addressed in a piecemeal fashion.
摘要翻译：提供了一种统一管理计算机系统的功率，性能和热量的机制。该机制包含了以综合方式有效地解决管理计算系统的所有方面的元素，而不是独立的。该机制采用基础设施进行实时测量反馈，用于调节系统活动的基础设施，组件操作级别和环境控制，用于保证响应/抢先动作的专用控制结构以及交互和集成组件。该机制为用户级交互提供接口。该机制还采用了多个时间尺度来解决功率/热问题的方法。此外，该机制采用综合方法提高效率，而不是以单独的方式处理单个问题，而不是将功率/热问题的不同方面进行处理。

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