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1. 发明授权

US07060624B2 Deep filled vias 有权
标题翻译：深填充的通孔
公开(公告)号：US07060624B2
公开(公告)日：2006-06-13
申请号：US10639989
申请日：2003-08-13
申请人： Panayotis Andricacos , Emanuel Israel Cooper , Timothy Joseph Dalton , Hariklia Deligianni , Daniel Guidotti , Keith Thomas Kwietniak , Michelle Leigh Steen , Cornelia Kang-I Tsang
发明人： Panayotis Andricacos , Emanuel Israel Cooper , Timothy Joseph Dalton , Hariklia Deligianni , Daniel Guidotti , Keith Thomas Kwietniak , Michelle Leigh Steen , Cornelia Kang-I Tsang
IPC分类号： H01L21/311
CPC分类号： H01L21/2885 , H01L21/30655 , H01L21/76898
摘要： Flared and non-flared metallized deep vias having aspect ratios of about 2 or greater are provided. Blind vias have been fabricated in silicon substrates up to a depth of about 300 microns, and flared through vias have been fabricated up to about 750 microns, the approximate thickness of a silicon substrate wafer, enabling the formation of electrical connections at either or both ends of a via.In spite of the depth and high aspect ratios attainable, the etched vias are completely filled with plated copper conductor, completing the formation of deep vias and allowing fuller use of both sides of the substrate.
摘要翻译：提供具有约2或更大的纵横比的扩张和未扩口的金属化深通孔。盲孔已经在硅衬底中制造达到约300微米的深度，并且通过通孔已经被制造高达约750微米，硅衬底晶片的大致厚度，使得能够在两端或两端形成电连接的通道。尽管可以获得深度和高纵横比，但是蚀刻的通孔完全被电镀铜导体填充，从而形成深通孔并允许更充分地使用基板的两侧。

2. 发明申请

US20100035430A1 METHOD OF MAKING THROUGH WAFER VIAS 有权
标题翻译：通过WAVER VIAS制作的方法
公开(公告)号：US20100035430A1
公开(公告)日：2010-02-11
申请号：US12188230
申请日：2008-08-08
申请人： Paul Stephen Andry , Edmund Juris Sprogis , Cornelia Kang-I Tsang
发明人： Paul Stephen Andry , Edmund Juris Sprogis , Cornelia Kang-I Tsang
IPC分类号： H01L21/768
CPC分类号： H01L21/76898
摘要： A method of making a through wafer via. The method includes: forming a trench in a semiconductor substrate, the trench open to a top surface of the substrate; forming a polysilicon layer on sidewalls and a bottom of the trench; oxidizing the polysilicon layer to convert the polysilicon layer to a silicon oxide layer on the sidewalls and bottom of the trench, the silicon oxide layer not filling the trench; filling remaining space in the trench with an electrical conductor; and thinning the substrate from a bottom surface of the substrate and removing the silicon oxide layer from the bottom of the trench. The method may further include forming a metal layer on the silicon oxide layer before filling the trench.
摘要翻译：制造通过晶片通孔的方法。该方法包括：在半导体衬底中形成沟槽，沟槽通向衬底的顶表面; 在沟槽的侧壁和底部上形成多晶硅层; 氧化多晶硅层以将多晶硅层转变成沟槽的侧壁和底部上的氧化硅层，氧化硅层不填充沟槽; 用电导体填充沟槽中的剩余空间; 以及从衬底的底表面使衬底细化并从沟槽的底部去除氧化硅层。该方法还可以包括在填充沟槽之前在氧化硅层上形成金属层。

3. 发明申请

US20090194864A1 INTEGRATED MODULE FOR DATA PROCESSING SYSTEM 有权
标题翻译：数据处理系统集成模块
公开(公告)号：US20090194864A1
公开(公告)日：2009-08-06
申请号：US12024394
申请日：2008-02-01
申请人： Bing Dang , John Ulrich Knickerbocker , Cornelia Kang-I Tsang
发明人： Bing Dang , John Ulrich Knickerbocker , Cornelia Kang-I Tsang
IPC分类号： H01L23/538
CPC分类号： H01L23/3736 , H01L23/055 , H01L23/42 , H01L23/49827 , H01L23/5384 , H01L24/13 , H01L24/16 , H01L24/32 , H01L24/73 , H01L25/0655 , H01L25/0657 , H01L25/165 , H01L25/18 , H01L2224/16145 , H01L2224/16225 , H01L2224/29111 , H01L2224/32145 , H01L2224/73153 , H01L2224/73204 , H01L2224/73253 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06589 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01049 , H01L2924/01073 , H01L2924/01074 , H01L2924/01079 , H01L2924/0132 , H01L2924/09701 , H01L2924/10253 , H01L2924/14 , H01L2924/1433 , H01L2924/15311 , H01L2924/157 , H01L2924/15787 , H01L2924/16152 , H01L2924/16195 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2924/30107 , H01L2924/351 , H01L2924/0105 , H01L2924/01047 , H01L2924/01082 , H01L2224/13111 , H01L2924/00014 , H01L2924/00
摘要： An apparatus for an integrated module. A silicon carrier with through-silicon vias has a plurality of die connected to a top side of the silicon carrier. In addition, a substrate is connected to a bottom side of the silicon carrier. The substrate is coupled to the plurality of die via the through-silicon vias.
摘要翻译：一种用于集成模块的装置。具有通硅通孔的硅载体具有连接到硅载体的顶侧的多个管芯。此外，衬底连接到硅载体的底侧。衬底通过硅通孔耦合到多个管芯。

4. 发明授权

US07987591B2 Method of forming silicon chicklet pedestal 有权
标题翻译：形成硅芯座的方法
公开(公告)号：US07987591B2
公开(公告)日：2011-08-02
申请号：US12540487
申请日：2009-08-13
申请人： S. Jay Chey , Timothy C. Krywanczyk , Mohammed S. Shaikh , Matthew T. Tiersch , Cornelia Kang-I Tsang
发明人： S. Jay Chey , Timothy C. Krywanczyk , Mohammed S. Shaikh , Matthew T. Tiersch , Cornelia Kang-I Tsang
IPC分类号： H01K3/10
CPC分类号： G01R3/00 , G01R1/07378
摘要： A silicon chicklet pedestal for use in a wafer-level test probe of a wafer is provided and includes a main body, first and second opposing faces, and an array of vias formed through the main body to extend between the first and second faces, through which pairs of leads, respectively associated with each via at the first and second faces, are electrically connectable to one another.
摘要翻译：提供了一种用于晶片的晶片级测试探针中的硅芯座，包括主体，第一和第二相对面以及通过主体形成的通孔阵列，以在第一和第二面之间延伸通过分别与第一和第二表面上的每个通孔相关联的引线对可彼此电连接。

5. 发明授权

US07678696B2 Method of making through wafer vias 有权
标题翻译：通过晶片通孔制作方法
公开(公告)号：US07678696B2
公开(公告)日：2010-03-16
申请号：US12188230
申请日：2008-08-08
申请人： Paul Stephen Andry , Edmund Juris Sprogis , Cornelia Kang-I Tsang
发明人： Paul Stephen Andry , Edmund Juris Sprogis , Cornelia Kang-I Tsang
IPC分类号： H01L21/44
CPC分类号： H01L21/76898
摘要： A method of making a through wafer via. The method includes: forming a trench in a semiconductor substrate, the trench open to a top surface of the substrate; forming a polysilicon layer on sidewalls and a bottom of the trench; oxidizing the polysilicon layer to convert the polysilicon layer to a silicon oxide layer on the sidewalls and bottom of the trench, the silicon oxide layer not filling the trench; filling remaining space in the trench with an electrical conductor; and thinning the substrate from a bottom surface of the substrate and removing the silicon oxide layer from the bottom of the trench. The method may further include forming a metal layer on the silicon oxide layer before filling the trench.
摘要翻译：制造通过晶片通孔的方法。该方法包括：在半导体衬底中形成沟槽，沟槽通向衬底的顶表面; 在沟槽的侧壁和底部上形成多晶硅层; 氧化多晶硅层以将多晶硅层转变成沟槽的侧壁和底部上的氧化硅层，氧化硅层不填充沟槽; 用电导体填充沟槽中的剩余空间; 以及从衬底的底表面使衬底细化并从沟槽的底部去除氧化硅层。该方法还可以包括在填充沟槽之前在氧化硅层上形成金属层。

6. 发明授权

US08806740B2 Silicon chicklet pedestal 有权
标题翻译：硅芯座
公开(公告)号：US08806740B2
公开(公告)日：2014-08-19
申请号：US13095969
申请日：2011-04-28
申请人： S. Jay Chey , Timothy C. Krywanczyk , Mohammed S. Shaikh , Matthew T. Tiersch , Cornelia Kang-I Tsang
发明人： S. Jay Chey , Timothy C. Krywanczyk , Mohammed S. Shaikh , Matthew T. Tiersch , Cornelia Kang-I Tsang
IPC分类号： H01R43/00 , G01R3/00 , G01R1/073
CPC分类号： G01R3/00 , G01R1/07378
摘要： A silicon chicklet pedestal for use in a wafer-level test probe of a wafer is provided and includes a main body, first and second opposing faces, and an array of vias formed through the main body to extend between the first and second faces, through which pairs of leads, respectively associated with each via at the first and second faces, are electrically connectable to one another.
摘要翻译：提供了一种用于晶片的晶片级测试探针中的硅芯座，包括主体，第一和第二相对面以及通过主体形成的通孔阵列，以在第一和第二面之间延伸通过分别与第一和第二表面上的每个通孔相关联的引线对可彼此电连接。

7. 发明授权

US08637937B2 Through silicon via for use in integrated circuit chips 有权
标题翻译：通过硅通孔用于集成电路芯片
公开(公告)号：US08637937B2
公开(公告)日：2014-01-28
申请号：US13364804
申请日：2012-02-02
申请人： Paul Stephen Andry , Edmund Juris Sprogis , Cornelia Kang-I Tsang
发明人： Paul Stephen Andry , Edmund Juris Sprogis , Cornelia Kang-I Tsang
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L24/19 , H01L21/76898 , H01L21/823871 , H01L23/481 , H01L24/05 , H01L24/06 , H01L24/13 , H01L24/14 , H01L2224/0401 , H01L2224/0557 , H01L2224/05572 , H01L2224/06181 , H01L2224/131 , H01L2224/14181 , H01L2924/00014 , H01L2924/0002 , H01L2924/1305 , H01L2924/1306 , H01L2924/14 , H01L2924/014 , H01L2924/00 , H01L2224/05552
摘要： A through silicon via structure and a method of fabricating the through silicon via. The method includes: (a) forming a trench in a silicon substrate, the trench open to a top surface of the substrate; (b) forming a silicon dioxide layer on sidewalls of the trench, the silicon dioxide layer not filling the trench; (c) filling remaining space in the trench with polysilicon; after (c), (d) fabricating at least a portion of a CMOS device in the substrate; (e) removing the polysilicon from the trench, the dielectric layer remaining on the sidewalls of the trench; (f) re-filling the trench with an electrically conductive core; and after (f), (g) forming one or more wiring layers over the top surface of the substrate, a wire of a wiring level of the one or more wiring levels closest to the substrate contacting a top surface of the conductive core.
摘要翻译：一种硅通孔结构和一种制造通硅通孔的方法。该方法包括：（a）在硅衬底中形成沟槽，沟槽通向衬底的顶表面; （b）在所述沟槽的侧壁上形成二氧化硅层，所述二氧化硅层不填充所述沟槽; （c）用多晶硅填充沟槽中的剩余空间; （c）之后，（d）在衬底中制造至少一部分CMOS器件; （e）从所述沟槽去除所述多晶硅，所述电介质层残留在所述沟槽的侧壁上; （f）用导电芯重新填充沟槽; 在（f）之后，（g）在衬底的顶表面上形成一个或多个布线层，与接触导电芯的顶表面的最接近衬底的一个或多个布线层的布线层的布线。

8. 发明授权

US07750459B2 Integrated module for data processing system 有权
标题翻译：数据处理系统集成模块
公开(公告)号：US07750459B2
公开(公告)日：2010-07-06
申请号：US12024394
申请日：2008-02-01
申请人： Bing Dang , John Ulrich Knickerbocker , Cornelia Kang-I Tsang
发明人： Bing Dang , John Ulrich Knickerbocker , Cornelia Kang-I Tsang
IPC分类号： H01L23/538
CPC分类号： H01L23/3736 , H01L23/055 , H01L23/42 , H01L23/49827 , H01L23/5384 , H01L24/13 , H01L24/16 , H01L24/32 , H01L24/73 , H01L25/0655 , H01L25/0657 , H01L25/165 , H01L25/18 , H01L2224/16145 , H01L2224/16225 , H01L2224/29111 , H01L2224/32145 , H01L2224/73153 , H01L2224/73204 , H01L2224/73253 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06589 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01049 , H01L2924/01073 , H01L2924/01074 , H01L2924/01079 , H01L2924/0132 , H01L2924/09701 , H01L2924/10253 , H01L2924/14 , H01L2924/1433 , H01L2924/15311 , H01L2924/157 , H01L2924/15787 , H01L2924/16152 , H01L2924/16195 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2924/30107 , H01L2924/351 , H01L2924/0105 , H01L2924/01047 , H01L2924/01082 , H01L2224/13111 , H01L2924/00014 , H01L2924/00
摘要： An apparatus for an integrated module. A silicon carrier with through-silicon vias has a plurality of die connected to a top side of the silicon carrier. In addition, a substrate is connected to a bottom side of the silicon carrier. The substrate is coupled to the plurality of die via the through-silicon vias.
摘要翻译：一种用于集成模块的装置。具有通硅通孔的硅载体具有连接到硅载体顶侧的多个管芯。此外，衬底连接到硅载体的底侧。衬底通过硅通孔耦合到多个管芯。

9. 发明授权

US07741722B2 Through-wafer vias 有权
标题翻译：通晶圆通孔
公开(公告)号：US07741722B2
公开(公告)日：2010-06-22
申请号：US11690181
申请日：2007-03-23
申请人： Paul Stephen Andry , Edmund Juris Sprogis , Kenneth Jay Stein , Timothy Dooling Sullivan , Cornelia Kang-I Tsang , Ping-Chuan Wang , Bucknell C. Webb
发明人： Paul Stephen Andry , Edmund Juris Sprogis , Kenneth Jay Stein , Timothy Dooling Sullivan , Cornelia Kang-I Tsang , Ping-Chuan Wang , Bucknell C. Webb
IPC分类号： H01L23/48
CPC分类号： H01L23/481 , H01L2924/0002 , H01L2924/09701 , H01L2924/00
摘要： A through-wafer via structure and method for forming the same. The through-wafer via structure includes a wafer having an opening and a top wafer surface. The top wafer surface defines a first reference direction perpendicular to the top wafer surface. The through-wafer via structure further includes a through-wafer via in the opening. The through-wafer via has a shape of a rectangular plate. A height of the through-wafer via in the first reference direction essentially equals a thickness of the wafer in the first reference direction. A length of the through-wafer via in a second reference direction is at least ten times greater than a width of the through-wafer via in a third reference direction. The first, second, and third reference directions are perpendicular to each other.
摘要翻译：一种晶片通孔结构及其形成方法。贯通晶片通孔结构包括具有开口和顶部晶片表面的晶片。顶部晶片表面限定垂直于顶部晶片表面的第一参考方向。贯通晶片通孔结构还包括在开口中的通晶片通孔。贯通晶片通孔具有矩形板的形状。贯通晶片通孔在第一参考方向上的高度基本上等于晶片在第一参考方向上的厚度。贯穿晶片通孔在第二参考方向上的长度比通过晶片通孔在第三参考方向上的宽度大至少十倍。第一，第二和第三参考方向彼此垂直。

10. 发明申请

US20100032764A1 THROUGH SILICON VIA AND METHOD OF FABRICATING SAME 有权
标题翻译：通过硅与其制造方法
公开(公告)号：US20100032764A1
公开(公告)日：2010-02-11
申请号：US12188228
申请日：2008-08-08
申请人： Paul Stephen Andry , Edmund Juris Sprogis , Cornelia Kang-I Tsang
发明人： Paul Stephen Andry , Edmund Juris Sprogis , Cornelia Kang-I Tsang
IPC分类号： H01L27/08 , H01L21/76
CPC分类号： H01L24/19 , H01L21/76898 , H01L21/823871 , H01L23/481 , H01L24/05 , H01L24/06 , H01L24/13 , H01L24/14 , H01L2224/0401 , H01L2224/0557 , H01L2224/05572 , H01L2224/06181 , H01L2224/131 , H01L2224/14181 , H01L2924/00014 , H01L2924/0002 , H01L2924/1305 , H01L2924/1306 , H01L2924/14 , H01L2924/014 , H01L2924/00 , H01L2224/05552
摘要： A through silicon via structure and a method of fabricating the through silicon via. The method includes: (a) forming a trench in a silicon substrate, the trench open to a top surface of the substrate; (b) forming a silicon dioxide layer on sidewalls of the trench, the silicon dioxide layer not filling the trench; (c) filling remaining space in the trench with polysilicon; after (c), (d) fabricating at least a portion of a CMOS device in the substrate; (e) removing the polysilicon from the trench, the dielectric layer remaining on the sidewalls of the trench; (f) re-filling the trench with an electrically conductive core; and after (f), (g) forming one or more wiring layers over the top surface of the substrate, a wire of a wiring level of the one or more wiring levels closet to the substrate contacting a top surface of the conductive core.
摘要翻译：一种硅通孔结构和一种制造通硅通孔的方法。该方法包括：（a）在硅衬底中形成沟槽，沟槽通向衬底的顶表面; （b）在所述沟槽的侧壁上形成二氧化硅层，所述二氧化硅层不填充所述沟槽; （c）用多晶硅填充沟槽中的剩余空间; （c）之后，（d）在衬底中制造至少一部分CMOS器件; （e）从所述沟槽去除所述多晶硅，所述电介质层残留在所述沟槽的侧壁上; （f）用导电芯重新填充沟槽; 在（f）之后，（g）在衬底的顶表面上形成一个或多个布线层，所述一个或多个布线层的布线层的布线层接触到所述导电芯的顶表面。

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