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1. 发明专利

JPS5450248A CONTROL SYSTEM FOR DATA CHANNEL UNIT 失效
公开(公告)号：JPS5450248A
公开(公告)日：1979-04-20
申请号：JP11554877
申请日：1977-09-28
申请人： OKI ELECTRIC IND CO LTD , NIPPON TELEGRAPH & TELEPHONE , NIPPON ELECTRIC CO , HITACHI LTD , FUJITSU LTD
发明人： KAJIZUKA SHIYOUJI , MURATA TATSUTOSHI , HANIBUCHI KENICHI , OOKAWA KAZUMASA , SHIYOUDA AKIO , AWAJI TOSHIO
IPC分类号： G06F13/12 , G06F3/00 , G06F13/00
摘要： PURPOSE:To make data transfer high-speed by reading out the first one word of transfer data from a memory to a buffer at an operation start time and correcting the number of transfer words and the address in the main memory of transfer data in the unit which controls data transfer between the main memory and I/O devices. CONSTITUTION:In the control system where data channel unit 4 for controlling data transfer between main memory 3 and plural I/O devices 5 and memory control circuit 2 are provided, the first word of data is loaded to buffer register 6 in data channel unit 4 at an operation start time, and transfer word register 10 and data address register 11 are beforehand corrected. Then, fractional data or look-ahead data is stored in data buffer 15 at a transfer interrupt time, and the complication of update of transfer byte storing register 18 and data address register 11 at a transfer time is canceled. Then, the transfer control is made simple, and the decision processing is reduced to make transfer high-speed.

2. 发明专利

JPS6229829B2 失效
公开(公告)号：JPS6229829B2
公开(公告)日：1987-06-29
申请号：JP10551078
申请日：1978-08-31
申请人： OKI ELECTRIC IND CO LTD
发明人： ICHIURA NOBORU , OOTA YOSHIHISA , MURATA TATSUTOSHI
IPC分类号： G06F13/37 , G06F3/00 , G06F9/46 , G06F13/14 , G06F13/36

3. 发明专利

JPS5533213A INFORMATION PROCESSING SYSTEM 失效
公开(公告)号：JPS5533213A
公开(公告)日：1980-03-08
申请号：JP10551078
申请日：1978-08-31
申请人： OKI ELECTRIC IND CO LTD
发明人： ICHIURA NOBORU , OOTA YOSHIHISA , MURATA TATSUTOSHI
IPC分类号： G06F13/37 , G06F3/00 , G06F9/46 , G06F13/14 , G06F13/36
摘要： PURPOSE:To make the most of the transfer performance of a bus line by using three kind of synchronous bus cycles to perform information transfer via the bus. CONSTITUTION:In the 1st cycle, a signal for a request for a right to use is sent from each group of CPU2, memory unit 3, etc., to bus controller 5 at synchronous timing. Bus controller 5 sends a signal for a permit to use the bus to a group with top priority to decide on a unit to be connected to the bus by a dizzy chain in the group. In the 2nd cycle, discrimination number 10 for a transmitting unit, discrimination number 11 for a receiving unit, control information 12, and data are sent out synchronously. Each unit is assigned by slave number 11 and receives them when ready to receive. In the 3rd cycle, a reception confirmative signal is sent out. Various cycles are simultaneously carried out in sequences of S, T and R.

4. 发明专利

JPS5533214A INFORMATION PROCESSING SYSTEM 失效
公开(公告)号：JPS5533214A
公开(公告)日：1980-03-08
申请号：JP10551178
申请日：1978-08-31
申请人： OKI ELECTRIC IND CO LTD
发明人： OOTA YOSHIHISA , MURATA TATSUTOSHI
IPC分类号： G06F13/36 , G06F3/00 , G06F13/00
摘要： PURPOSE:To attain a smooth interchange of information between informaton processing systems in an information processing system equipped with several information processing systems via a single bus line, by providing bus extension units to the bus between different information processing systems. CONSTITUTION:When the unit of information processing system 72 sends out data information to the unit of information processing system 71, information assigning a reception destination and data information are sent out to bus 12. Bus extension unit 61 makes a comparison between the contents of a register holding previously the unit number of the accessible unit of system 72 and those of the information assigning the reception destination and assigns the reception destinaton if the unit of system 72 is accessible. The information and data information are held in the register and at the same time, information on whether reception is made is sent out to bus 12. On receiving the data information, bus extension unit 61 releases bus 12 and bus extension unit 61 attains independently access to information processing system 71.

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