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    • 3. 发明申请
    • Dish washer
    • 洗碗机
    • US20070034239A1
    • 2007-02-15
    • US11497269
    • 2006-08-02
    • Nung ParkSang YoonYong ChoiDae Han
    • Nung ParkSang YoonYong ChoiDae Han
    • B08B3/00
    • A61L2/10A47L15/42A47L15/4257A61L2/24
    • A dish washer according to the present invention comprises: a tub for holding dishes and opened an one end thereof; a door for selectively sealing the opened end of the tub, and have a depressed part with a little of depth on an inner side; and a sterilizing apparatus which is installed on the door; wherein the sterilizing apparatus includes an ultraviolet rays generating section which occurs the ultraviolet rays, a reflection member which is installed on the depressed part, and reflects the ultraviolet rays which is occurred on an ultraviolet rays generating section into the inner side of the tub, and a cover member which prevents the influx of the washing liquid into an ultraviolet rays generating section.
    • 根据本发明的洗碗机包括:用于保持碗碟并打开其一端的桶; 用于选择性地密封桶的开口端的门,并且在内侧具有一点深度的凹陷部; 和安装在门上的灭菌装置; 其特征在于,所述灭菌装置具有发生紫外线的紫外线产生部,安装在所述凹部的反射部件,将在所述紫外线产生部发生的紫外线反射到所述盛水桶的内侧;以及 盖部件,其防止洗涤液体流入紫外线发生部。
    • 4. 发明申请
    • MULTICHANNEL DETECTOR HAVING A REDUCED NUMBER OF OUTPUT CHANNELS
    • 具有减少输出通道数量的多通道检测器
    • US20140048692A1
    • 2014-02-20
    • US13988619
    • 2011-10-25
    • Jihoon KangYong ChoiJin Ho Jung
    • Jihoon KangYong ChoiJin Ho Jung
    • G01J1/16
    • G01J1/1626H03F3/45475H03F3/45928H03F3/72H03F2200/375H03F2200/405H03F2200/408H03F2203/45212H03F2203/45528H03F2203/45544H03F2203/45588H03F2203/45594H03F2203/7221H03F2203/7236
    • The present disclosure relates to a multi-channel detector having a reduced number of output channels and including: a linear amplifier linearly amplifying an input signal; an offset correcting unit configured by a circuit that is independent from the linear amplifier, including an operational amplifier inside, and correcting an offset level that changes in accordance with an amplification rate of the operational amplifier; a uniformity correcting unit reducing a non-uniform characteristic of the input signal by finely adjusting a gain of an output signal of the linear amplifier; a signal delay unit delaying an output signal of the uniformity correcting unit until a time point when output signals are generated from a comparison unit and a signal determining unit, and a switch circuit receives a trigger from the signal determining unit; a comparison unit comparing the output signal of the uniformity correcting unit with a signal of a predetermined level with each other; a signal determining unit receiving a trigger signal from the comparison unit, determining channel position information of a channel in which an event occurs, transmitting a trigger signal to a switch circuit located at the determined channel position, and outputting the determined position information; and a channel information processing unit receiving energy information, time information, or the channel position information of a channel in which an event occurs as input when a trigger signal is input from the signal determining unit to the switch circuit located at the determined channel position.
    • 本公开涉及具有减少数量的输出通道的多通道检测器,并且包括:线性放大器,其输入信号线性放大; 偏移校正单元,其由独立于线性放大器的电路构成,包括内部的运算放大器,并且校正根据运算放大器的放大率而变化的偏移电平; 均匀性校正单元,通过微调线性放大器的输出信号的增益来减小输入信号的不均匀特性; 信号延迟单元延迟均匀性校正单元的输出信号,直到从比较单元和信号确定单元产生输出信号的时间点,并且开关电路从信号确定单元接收触发; 比较单元,将均匀性校正单元的输出信号与预定水平的信号进行比较; 信号确定单元,从比较单元接收触发信号,确定发生事件的信道的信道位置信息,将触发信号发送到位于所确定的信道位置的开关电路,并输出确定的位置信息; 以及频道信息处理单元,当从信号确定单元向位于所确定的频道位置的开关电路输入触发信号时,接收能量信息,时间信息或事件发生的频道的频道位置信息作为输入。
    • 7. 发明申请
    • Semiconductor device having high voltage MOS transistor and fabrication method thereof
    • 具有高电压MOS晶体管的半导体器件及其制造方法
    • US20060148183A1
    • 2006-07-06
    • US11320859
    • 2005-12-30
    • Yong Choi
    • Yong Choi
    • H01L21/336
    • H01L29/42368H01L29/66553H01L29/66659H01L29/7833Y10S438/981
    • A semiconductor device having a high voltage MOS transistor. The device includes a gate oxide layer disposed between a gate electrode and a substrate on an active area and having relatively thick portions at edges thereof. A fabrication method includes forming on the substrate is a nitride layer having an opening in a high voltage region. An oxide layer is deposited over the substrate and anisotropically etched to remain only on sidewalls of the opening. A first gate oxide layer is formed on the substrate in the opening, and the nitride layer is removed. Then a second gate oxide layer is formed over the substrate such that the second gate oxide layer has a relatively thinner thickness than the first gate oxide layer. Gate electrodes are then formed in the high voltage region and the low voltage region.
    • 一种具有高压MOS晶体管的半导体器件。 该器件包括设置在有源区域上的栅电极和衬底之间的栅极氧化物层,并且在其边缘处具有相对较厚的部分。 一种制造方法,包括在基板上形成具有高电压区域的开口的氮化物层。 将氧化物层沉积在衬底上并进行各向异性蚀刻以仅保留在开口的侧壁上。 在开口中的基板上形成第一栅氧化层,去除氮化物层。 然后在衬底上形成第二栅极氧化物层,使得第二栅极氧化物层具有比第一栅极氧化物层更薄的厚度。 然后在高电压区域和低电压区域中形成栅电极。
    • 9. 发明申请
    • Method for manufacturing semiconductor device
    • 制造半导体器件的方法
    • US20050142855A1
    • 2005-06-30
    • US10969550
    • 2004-10-20
    • Yong Choi
    • Yong Choi
    • G03F7/16H01L21/4763H01L21/768H01L23/48H01L23/52H01L29/40
    • H01L21/76808Y10S430/108
    • A method for manufacturing a semiconductor device which, on performing a via first Dual Damascene process, inhibits or prevents the formation of a void in a bottom anti-reflective coating filling a via hole. The method typically includes the steps of forming a bottom anti-reflective coating (BARC) in a via hole in an interlayer dielectric on a semiconductor substrate sufficiently to fill the via hole; disposing an acid diffusion material on the BARC; forming a cross-link layer between the BARC and the acid diffusion material; removing the remaining acid diffusion material; and etching the cross-link layer, the BARC and the interlayer dielectric to form a trench extending from an upper portion of the via hole.
    • 一种用于制造半导体器件的方法,所述半导体器件在执行通孔第一双镶嵌工艺时,抑制或防止在填充通孔的底部抗反射涂层中形成空隙。 该方法通常包括以下步骤:在半导体衬底上的层间电介质的通孔中形成底部抗反射涂层(BARC),以充分填充通孔; 在BARC上设置酸扩散材料; 在BARC和酸扩散材料之间形成交联层; 除去剩余的酸扩散材料; 并且蚀刻交联层,BARC和层间电介质以形成从通孔的上部延伸的沟槽。