专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20100078810A1 SEMICONDUCTOR APPARATUS, SUBSTRATE DESIGN METHOD, AND SUBSTRATE DESIGN APPARATUS 有权
标题翻译：半导体设备，基板设计方法和基板设计设备
公开(公告)号：US20100078810A1
公开(公告)日：2010-04-01
申请号：US12567893
申请日：2009-09-28
申请人： Noriyuki Matsui , Hidehisa Sakai
发明人： Noriyuki Matsui , Hidehisa Sakai
IPC分类号： H01L23/498 , G06F17/50
CPC分类号： H01L23/49816 , H01L23/3677 , H01L23/49827 , H01L23/49838 , H01L2924/0002 , H01L2924/15311 , H01L2924/00
摘要： A semiconductor apparatus including: a substrate; and a semiconductor chip mounted on the substrate, wherein the substrate has plural holes, and the plural holes are provided such that the density on a substrate surface of the holes in a first area, which is an area of the substrate facing a semiconductor chip peripheral portion, is higher than the density on the substrate surface of the holes in an area excluding the first area on the substrate.
摘要翻译：一种半导体装置，包括：基板; 以及安装在所述基板上的半导体芯片，其中，所述基板具有多个孔，并且所述多个孔被设置为使得所述基板表面上的所述孔的密度在所述第一区域中，所述第一区域是面向半导体芯片周边的所述基板的区域比基板上的第一区域以外的区域的孔的基板表面的密度高。

2. 发明申请

US20080217864A1 Wide Range Temperature and Pressure Hydraulic Cylinder Sealing System 有权
标题翻译：宽范围温压液压缸密封系统
公开(公告)号：US20080217864A1
公开(公告)日：2008-09-11
申请号：US11684318
申请日：2007-03-09
申请人： Joel T. Johnson , Benjamin E. Westbrook , Noriyuki Matsui , Yoshiyuki Abe , Takeshi Wakana , Mathias Burkert
发明人： Joel T. Johnson , Benjamin E. Westbrook , Noriyuki Matsui , Yoshiyuki Abe , Takeshi Wakana , Mathias Burkert
IPC分类号： F16J15/32
CPC分类号： F16J15/56 , F16J15/002
摘要： A seal system for a reciprocating cylinder includes a buffer seal, a rod seal, and a wiper seal. The buffer seal includes a dynamic seal lip and a static lip extending from a hinge portion. The hinge portion of the static lip allows fluid to escape past the outer diameter of the seal when the rod is retracted thereby releasing any pressure build-up between the rod seal and buffer seal. The axial face portion of the dynamic seal lip includes axially extending notches therein. The notches prevent the buffer seal from sticking to the axial wall of the groove and provide a consistent path for the fluid to energize the annular groove between the static and dynamic lips during the extension phase which is necessary for the function of the seal. The back-up ring is an integrated part of the buffer seal, used to provide superior extrusion resistance. The rod seal includes an annular seal body having a dynamic seal lip angularly extending radially inwardly and axially from the seal body, and a static lip angularly extending radially outwardly and axially from the seal body. An axial face portion of the dynamic seal lip and the static lip each include radially extending notches therein. The notches prevent the seal from sticking to the axial walls of the groove the rod seal is installed in and provides a consistent path for the fluid to energize the annular groove created by the static and dynamic lip during the extension phase. The back-up ring is an integrated part of the rod seal, used to provide superior extrusion resistance.
摘要翻译：用于往复式气缸的密封系统包括缓冲密封件，杆密封件和擦拭器密封件。缓冲密封件包括动态密封唇缘和从铰链部分延伸的静态唇缘。当杆缩回时，静态唇缘的铰链部分允许流体逃离密封件的外径，从而释放杆密封件和缓冲密封件之间的任何压力积聚。动态密封唇的轴向面部分包括其中轴向延伸的凹口。凹口防止缓冲密封件粘附到凹槽的轴向壁上，并提供一致的路径，用于在密封功能所需的延伸阶段期间使流体在静态和动态唇缘之间激励环形凹槽。备用环是缓冲密封件的集成部件，用于提供优异的挤出阻力。杆密封件包括环形密封体，其具有从密封体径向向内和轴向成角度地延伸的动态密封唇，以及从密封体径向向外并且轴向地成角度地延伸的静态唇缘。动态密封唇缘和静态唇缘的轴向面部各自包括径向延伸的凹口。凹口防止密封件粘附到凹槽的轴向壁上，杆密封件安装在该轴向壁中，并且提供一致的路径，以使流体在延伸阶段期间由静态和动态唇缘产生的环形凹槽通电。支撑环是杆密封件的集成部件，用于提供优异的挤压阻力。

3. 发明申请

US20090166984A1 Rod Sealing System 有权
标题翻译：杆密封系统
公开(公告)号：US20090166984A1
公开(公告)日：2009-07-02
申请号：US12086211
申请日：2006-12-05
申请人： Noriyuki Matsui , Manabu Hirano , Yoshihiro Kuzumaki , Kuniyoshi Saito , Hayato Takada
发明人： Noriyuki Matsui , Manabu Hirano , Yoshihiro Kuzumaki , Kuniyoshi Saito , Hayato Takada
IPC分类号： F16J15/32
CPC分类号： C09K3/1021 , C08G18/10 , C08G18/44 , C08G2140/00 , C08G18/3206
摘要： In a rod sealing system, which comprises a buffer ring, a rod seal, and a dust seal, provided successively in this order from a fluid hydraulic side toward the outside in an annular clearance between two members in reciprocating motion, the buffer ring is made up of a thermoplastic polyurethane molding product obtained by subjecting a thermoplastic polyurethane molding product prepared by reaction of (A) a high molecular weight polycarbonatediol having a number average molecular weight Mn of 500-6,000, (B) an aromatic diisocyanate, and (C) a low molecular weight diol as a chain elongation agent in an NCO/OH ratio of 0.95-1.20, to heat treatment under conditions that a glass transition point (Tg) of hard phases becomes 170° C. or higher, preferably 170-230° C., and an endothermic peak area (ΔH) at Tg becomes 5 J/g or more, by differential scanning calorimetry. The buffer ring made up of the thermoplastic polyurethane molding product has a distinguished heat resistance capable of withstanding the service environmental temperature, particularly maximum 120° C., compression set characteristics, follow-up to eccentricity, etc.
摘要翻译：在包括缓冲环，杆密封和防尘密封的杆密封系统中，以往复运动中的两个构件之间的环形间隙从液压侧朝向外部依次提供缓冲环，制成缓冲环（A）数均分子量Mn为500〜6000的高分子量聚碳酸酯二醇，（B）芳香族二异氰酸酯和（C）的反应制得的热塑性聚氨酯成型体，作为NCO / OH比为0.95-1.20的链延长剂的低分子量二醇，在硬相的玻璃化转变温度（Tg）为170℃以上，优选为170〜230℃的条件下进行热处理通过差示扫描量热法测定Tg的吸热峰面积（DeltaH）为5J / g以上。由热塑性聚氨酯成型制品制成的缓冲环具有耐受使用环境温度，特别是最高120℃，压缩永久变形特性，偏心率等特性的耐热性。

4. 发明申请

US20070035988A1 SRAM, semiconductor memory device, method for maintaining data in SRAM, and electronic device 有权
公开(公告)号：US20070035988A1
公开(公告)日：2007-02-15
申请号：US11523586
申请日：2006-09-20
申请人： Noriyuki Matsui
发明人： Noriyuki Matsui
IPC分类号： G11C11/00 , G11C7/00
CPC分类号： G11C11/406 , G11C11/4125 , G11C2211/4068
摘要： An SRAM (Static Ransom Access Memory) has a refreshing unit for performing a refreshing operation to maintain a state of an electric charge in a memory cell in order to prevent stored data from being destructed by a latch-up phenomenon to maintain the stored data certainly even when a soft error occurs due to a neutron.

5. 发明申请

US20050156000A1 Lock release operator layout structure in vehicle 有权
标题翻译：车辆锁定释放操作员布局结构
公开(公告)号：US20050156000A1
公开(公告)日：2005-07-21
申请号：US11037194
申请日：2005-01-19
申请人： Fuminori Kamemizu , Kengo Yano , Nobuo Yamaguchi , Kazuhiko Mori , Noriyuki Matsui , Atsushi Hatayama
发明人： Fuminori Kamemizu , Kengo Yano , Nobuo Yamaguchi , Kazuhiko Mori , Noriyuki Matsui , Atsushi Hatayama
IPC分类号： B62H5/00 , B62J7/06 , B62J9/00 , B62J35/00 , B62J99/00 , B62K19/46 , B62J7/00
CPC分类号： B62H5/00 , B62J35/00 , B62K19/46 , B62K2202/00
摘要： In a vehicle including a plurality of containing portions, namely, a front containing portion provided in an inner cover covering from the rear side a head pipe of a vehicle body frame at its front end and constituting a part of a vehicle body cover which can be locked in a fully closed condition, to facilitate the operation for releasing the lock conditions of the plurality of containing portions. A plurality of lock release operating buttons for respectively releasing the locked conditions of a plurality of containing portions inclusive of a front containing portion is disposed at an inner cover on a lateral side of the front containing portion.
摘要翻译：在包括多个容纳部分的车辆中，即设置在内盖中的前部容纳部分，其从后侧覆盖车体框架的前端的头管，并且构成车身罩的一部分，其可以是锁定在完全关闭状态，以便于解除多个容纳部分的锁定状态的操作。用于分别释放包括前容纳部分的多个容纳部分的锁定状态的多个锁定释放操作按钮设置在前容纳部分的侧面的内盖上。

6. 发明授权

US06647521B2 Memory testing method and apparatus, and computer-readable recording medium 失效
标题翻译：记忆体测试方法和装置以及计算机可读记录介质
公开(公告)号：US06647521B2
公开(公告)日：2003-11-11
申请号：US09247554
申请日：1999-02-10
申请人： Noriyuki Matsui
发明人： Noriyuki Matsui
IPC分类号： G11C2900
CPC分类号： G11C29/48 , G11C29/56
摘要： A memory testing method tests a memory by writing test data to and reading test data from the memory. Data is successively read from the memory is synchronism with a clock and the data is compared. The memory testing method then judges a defect in the memory based on a result of the comparison.
摘要翻译：内存测试方法通过向内存写入测试数据和读取测试数据来测试内存。从存储器中连续读取数据与时钟同步并比较数据。然后，存储器测试方法基于比较的结果来判断存储器中的缺陷。

7. 发明授权

US5764591A Memory device and memory control circuit 失效
标题翻译：存储器和存储器控制电路
公开(公告)号：US5764591A
公开(公告)日：1998-06-09
申请号：US724475
申请日：1996-10-01
申请人： Noriyuki Matsui , Yuzo Usui
发明人： Noriyuki Matsui , Yuzo Usui
IPC分类号： G11C11/413 , G06F12/02 , G11C8/18 , G11C11/407 , G11C8/00 , G11C7/00
CPC分类号： G11C8/18
摘要： A memory device having a memory element including a plurality of memory cells each designated by a row address signal and a column address signal, and a circuit for detecting a transition between the row address signal and the column address signal to thereby effect an equalize operation on the memory element. The supply of a row/column address signal including the row address signal and the column address signal to the memory element is cut off during a logical indeterminate period at the time of the transition. The row/column address signal immediately before its cutoff is held and the held signal is supplied to the memory element during the logical indeterminate period. Thus, a high-speed operation can be done by the equalize operation and the cutoff can provide the prevention of occurrence of a malfunction due to noise such as a glitch or the like.
摘要翻译：一种具有存储元件的存储器件，所述存储元件包括由行地址信号和列地址信号指定的多个存储单元，以及用于检测行地址信号和列地址信号之间的转换的电路，从而对记忆元素。在转换时的逻辑不确定期间，将包括行地址信号和列地址信号的行/列地址信号提供给存储元件被切断。保持其截止之前的行/列地址信号，并且在逻辑不确定期间内将保持信号提供给存储元件。因此，可以通过均衡操作进行高速操作，并且切断可以防止由于诸如毛刺等的噪声引起的故障的发生。

8. 发明授权

US5517129A High-speed dual-buffered output circuit 失效
标题翻译：高速双缓冲输出电路
公开(公告)号：US5517129A
公开(公告)日：1996-05-14
申请号：US920911
申请日：1992-07-28
申请人： Noriyuki Matsui
发明人： Noriyuki Matsui
IPC分类号： G11C11/417 , G11C7/10 , G11C11/409 , H03K17/16 , H03K19/0175 , H03K19/0948 , H03K19/003
CPC分类号： G11C7/1057 , G11C7/1051 , H03K17/164
摘要： In an output circuit for driving a load connected to an output terminal in accordance with an input signal input to an input terminal, the output circuit connects to the input and output terminals, a first output buffer which operates when activated; connects in parallel to the first output buffer, a second output buffer which, when activated, operates with driving ability higher than the first output buffer; and activates the second output buffer for a predetermined period when the input signal is input and, after the period, activates the first output buffer.
摘要翻译：在用于根据输入到输入端子的输入信号驱动连接到输出端子的负载的输出电路中，输出电路连接到输入和输出端子，第一输出缓冲器在被激活时工作; 与第一输出缓冲器并联连接的第二输出缓冲器，其在被激活时以比第一输出缓冲器高的驱动能力操作; 并且当输入信号被输入时激活第二输出缓冲器一段预定的周期，并且在该周期之后激活第一输出缓冲器。

9. 发明授权

US08816510B2 Semiconductor apparatus, substrate design method, and substrate design apparatus 有权
标题翻译：半导体装置，基板设计方法和基板设计装置
公开(公告)号：US08816510B2
公开(公告)日：2014-08-26
申请号：US12567893
申请日：2009-09-28
申请人： Noriyuki Matsui , Hidehisa Sakai
发明人： Noriyuki Matsui , Hidehisa Sakai
IPC分类号： H01L23/48 , H01L23/52 , H01L23/498 , H01L23/367
CPC分类号： H01L23/49816 , H01L23/3677 , H01L23/49827 , H01L23/49838 , H01L2924/0002 , H01L2924/15311 , H01L2924/00
摘要： A semiconductor apparatus including: a substrate; and a semiconductor chip mounted on the substrate, wherein the substrate has plural holes, and the plural holes are provided such that the density on a substrate surface of the holes in a first area, which is an area of the substrate facing a semiconductor chip peripheral portion, is higher than the density on the substrate surface of the holes in an area excluding the first area on the substrate.
摘要翻译：一种半导体装置，包括：基板; 以及安装在所述基板上的半导体芯片，其中，所述基板具有多个孔，并且所述多个孔被设置为使得所述基板表面上的所述孔的密度在所述第一区域中，所述第一区域是面向半导体芯片周边的所述基板的区域比基板上的第一区域以外的区域的孔的基板表面的密度高。

10. 发明授权

US07705646B2 Threshold correction circuit, integrated circuit with threshold correction function, and circuit board with threshold correction function 失效
标题翻译：阈值校正电路，具有阈值校正功能的集成电路和具有阈值校正功能的电路板
公开(公告)号：US07705646B2
公开(公告)日：2010-04-27
申请号：US12240188
申请日：2008-09-29
申请人： Noriyuki Matsui
发明人： Noriyuki Matsui
IPC分类号： H03K5/01
CPC分类号： H03K5/082 , H03K5/1252
摘要： In order to monitor various types of noises which are to be introduced on signals through signal lines on a circuit board and automatically adjust the thresholds for signal state discriminations to make it possible to surely make a signal state discrimination without being affected by these noises even if the amplitude of a signal is reduced for higher-speed transmission and lowered electric power, there is provided a configuration comprising a signal generation unit generating a noise monitor signal; a noise monitor signal line receiving and propagating the noise monitor signal; a noise detection unit detecting a noise which has been introduced into that noise monitor signal propagated through the noise monitor signal line and which affects a state discrimination using a threshold; and a threshold adjustment unit, if the noise detection unit detects the noise, adjusting the threshold such that the state discrimination is not affected by the noise.
摘要翻译：为了监视通过电路板上的信号线引入信号的各种噪声，并自动调整信号状态鉴别的阈值，使得有可能确定地进行信号状态判别而不受这些噪声的影响，即使信号的振幅降低，以实现高速传输和降低电力，提供了包括产生噪声监测信号的信号产生单元的结构; 噪声监测信号线接收并传播噪声监测信号; 噪声检测单元，其检测已经被引入到通过噪声监视信号线传播的噪声监测信号中并且影响使用阈值的状态判别的噪声; 以及阈值调整单元，如果噪声检测单元检测到噪声，则调整阈值使得状态判别不受噪声影响。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式