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1. 发明授权

US5231512A Editing apparatus employing serial to parallel converters and parallel to serial converters to achieve a dimensional reduction of the apparatus 失效
标题翻译：使用并行转换器并行串行转换器来实现设备尺寸缩小的编辑设备
公开(公告)号：US5231512A
公开(公告)日：1993-07-27
申请号：US673681
申请日：1991-03-22
申请人： Norio Ebihara , Satoru Kusaka , Tsutomu Takamori , Tetsuro Kato , Masakatsu Kaburagi , Kiyoshi Inoue
发明人： Norio Ebihara , Satoru Kusaka , Tsutomu Takamori , Tetsuro Kato , Masakatsu Kaburagi , Kiyoshi Inoue
IPC分类号： G11B27/031 , G11B27/032 , H04H1/00 , H04H20/10 , H04H60/04 , H04H60/95 , H04N5/262 , H04N5/265 , H04N5/268
CPC分类号： H04N5/268 , G11B27/031 , G11B27/032 , H04H60/04 , H04H60/95 , H04N5/262 , G11B2220/2512 , G11B2220/90
摘要： An editing apparatus for editing digital video signals employs a number of video recording and/or reproduction devices, a signal processing mechanism, and a switching mechanism, wherein the number of transfer lines and the area occupied by the associated connectors is decreased by converting parallel signals into serial format.

2. 发明授权

US5175622A Apparatus and method for generating special effects by processing video signals from three sources 失效
标题翻译：通过从三个来源处理视频信号产生特殊效果的装置和方法
公开(公告)号：US5175622A
公开(公告)日：1992-12-29
申请号：US757208
申请日：1991-09-10
申请人： Kiyoshi Inoue , Tsutomu Takamori , Ichiro Ninomiya
发明人： Kiyoshi Inoue , Tsutomu Takamori , Ichiro Ninomiya
IPC分类号： G11B27/024 , G11B27/028 , H04N5/262
CPC分类号： H04N5/262 , G11B27/028 , G11B2220/20 , G11B2220/90 , G11B27/024
摘要： A special effect generating system processes first, second, and third video signals supplied respectively from first, second, and third video signal sources to produce an output video signal with special effects. At a plurality of points of time along a first time base, first control data indicative of positions of edges of a first image represented by the first video signal are generated and stored in a first memory. At a plurality of points of time along a second time base, second control data indicative of positions of a boundary between second and third images represented by the second and third video signals are generated and stored in a second memory. The first, second, and third video signals are combined into the output video signal based on the first and second control data stored in the first and second memories.

3. 发明授权

US5896181A Video signal processing apparatus with matrix switching capability 失效
标题翻译：具有矩阵切换能力的视频信号处理装置
公开(公告)号：US5896181A
公开(公告)日：1999-04-20
申请号：US891815
申请日：1997-07-14
申请人： Tsutomu Takamori
发明人： Tsutomu Takamori
IPC分类号： H04N5/268
CPC分类号： H04N5/268
摘要： A digital switcher of this invention comprises a matrix switcher section 11 adapted so that a plurality of serial digital video signals are inputted through respective input buses, a control section 12 for carrying out operation control of the matrix switcher section 11, signal processing sections 13A, 13B . . . connected to a plurality of output buses of the matrix switcher section 11, an input detector 14 connected to one output bus of the matrix switcher section 11, and an error detector 15 connected to one output bus of the matrix switcher section 11. An approach is employed to control the matrix switcher section 11 by the control section 12 with respect to a plurality of digital video signals inputted through respective input buses to thereby selectively detect presence or absence of input and occurrence of error by the input detector 14 and the error detector 15 connected to one output bus of the matrix switcher section 11.
摘要翻译：本发明的数字切换器包括矩阵切换器部分11，其适于使得通过各个输入总线输入多个串行数字视频信号;控制部分12，用于执行矩阵切换器部分11的操作控制;信号处理部分13A， 13B。。。连接到矩阵切换器部分11的多个输出总线，连接到矩阵切换器部分11的一个输出总线的输入检测器14和连接到矩阵切换器部分11的一个输出总线的错误检测器15.方法是用于通过控制部分12相对于通过各个输入总线输入的多个数字视频信号来控制矩阵切换器部分11，从而通过输入检测器14和误差检测器15选择性地检测是否存在输入和出现错误连接到矩阵切换器部分11的一个输出总线。

4. 发明授权

US5754254A Digital video audio processing apparatus 失效
标题翻译：数字视频音频处理装置
公开(公告)号：US5754254A
公开(公告)日：1998-05-19
申请号：US583549
申请日：1996-01-05
申请人： Seiji Kobayashi , Tsutomu Takamori , Ryuji Nonaka
发明人： Seiji Kobayashi , Tsutomu Takamori , Ryuji Nonaka
IPC分类号： H04N5/262 , G11B27/032 , H04N5/268 , H04N5/92 , H04N5/93 , H04N9/74
CPC分类号： H04N5/268 , G11B27/032 , H04H60/04 , H04H20/10
摘要： A digital video audio processing apparatus in which serial signal formed digital video signals and digital audio signals, which are supplied to a plurality of input terminals and are multiplexed each other, are converted into parallel signal form respectively; the digital video signals and digital audio signals are separated respectively; switching processing or video special effect processing is performed on a plurality of digital video signals; switching processing or mixing processing is performed on a plurality of digital audio signals; and these processed digital video signals and digital audio signals are multiplexed each other to convert into serial signal form and output them.
摘要翻译：一种数字视频音频处理装置，其中形成数字视频信号和数字音频信号的数字视频信号和数字音频信号被提供给多个输入端并被彼此复用，分别被转换成并行信号形式; 数字视频信号和数字音频信号分别分离; 对多个数字视频信号执行切换处理或视频特效处理; 对多个数字音频信号执行切换处理或混合处理; 并且将这些处理的数字视频信号和数字音频信号彼此复用以转换成串行信号形式并输出。

5. 发明授权

US4768103A Write clock generator for time base corrector including frequency fluctuation and write clock difference signal reduction 失效
标题翻译：用于时基校正器的写时钟发生器，包括频率波动和写时钟差信号降低
公开(公告)号：US4768103A
公开(公告)日：1988-08-30
申请号：US838950
申请日：1986-03-12
申请人： Yoshiyuki Nakamura , Tsutomu Takamori
发明人： Yoshiyuki Nakamura , Tsutomu Takamori
IPC分类号： H04N9/89 , H04N9/896 , H04N5/95
CPC分类号： H04N9/896
摘要： A write clock generator for a time base corrector incorporated in a video tape recorder can generate a write clock signal including accurate phase and frequency fluctuation information on a reproduced video signal in spite of a simple circuit configuration. A write clock signal is generated from a VCO oscillated in response to a reproduced burst signal, and further the VCO is so controlled on the basis of frequency difference between the oscillated write clock signal and a frequency fluctuation signal such that the frequency difference may be eliminated. The frequency fluctuation signal is generated in response to a horizontal synchronizing signal so as to include time base fluctuations in a reproduced video signal.
摘要翻译：用于并入录像机中的时基校正器的写时钟发生器可以产生一个写入时钟信号，尽管有一个简单的电路配置，该时钟信号包括关于再现的视频信号的精确的相位和频率波动信息。从响应于再现的脉冲信号振荡的VCO产生写入时钟信号，并且还基于振荡的写入时钟信号和频率波动信号之间的频率差来控制VCO，从而可以消除频率差异。响应于水平同步信号产生频率波动信号，以便包括再现的视频信号中的时基波动。

6. 发明授权

US4743961A Digital chrominance signal processing system 失效
标题翻译：数字色度信号处理系统
公开(公告)号：US4743961A
公开(公告)日：1988-05-10
申请号：US854508
申请日：1986-04-22
申请人： Yuji Kobayashi , Tsutomu Takamori
发明人： Yuji Kobayashi , Tsutomu Takamori
IPC分类号： H04N9/804 , H04N9/64 , H04N9/80 , H04N9/808 , H04N9/87 , H04N9/88
CPC分类号： H04N9/64 , H04N9/80
摘要： A digital chrominance signal processing system for processing an input digital composite chrominance signal, which is sampled with a sampling frequency f.sub.s =2mf.sub.sc, wherein m is an integer and f.sub.sc is a color subcarrier frequency, has a decoder for decoding the input digital composite chrominance signal into digital chrominance components, the decoder including a code converter for inverting the input digital composite chrominance signal and a switch for selectively switching between the input digital composite chrominance signal and an output of the code converter at a switching rate mf.sub.sc.
摘要翻译：一种用于处理以采样频率fs = 2mfsc采样的输入数字复合色度信号的数字色度信号处理系统，其中m是整数，fsc是彩色副载波频率，具有用于对输入的数字复合色度信号进行解码的解码器解码器包括用于反相输入数字复合色度信号的代码转换器和用于以切换速率mfsc选择性地在输入数字合成色度信号和代码转换器的输出之间切换的开关。

7. 发明授权

US08264617B2 Analog TV broadcast signal receiving apparatus and analog TV broadcast signal demodulating apparatus 有权
标题翻译：模拟电视广播信号接收装置和模拟电视广播信号解调装置
公开(公告)号：US08264617B2
公开(公告)日：2012-09-11
申请号：US12413908
申请日：2009-03-30
申请人： Tsutomu Takamori , Toshihisa Hyakudai , Nobuaki Tsuchiya , Gerd Spalink
发明人： Tsutomu Takamori , Toshihisa Hyakudai , Nobuaki Tsuchiya , Gerd Spalink
IPC分类号： H04N5/455
CPC分类号： H04N5/455 , H04N5/46
摘要： Disclosed herein is an analog television broadcast signal receiving apparatus including: a tuner section configured to convert an analog television broadcast signal into a predetermined intermediate frequency band signal; a demodulation circuit section configured to obtain a picture output signal and a sound intermediate frequency signal from the predetermined intermediate frequency band signal coming from the tuner section; a picture processing circuit section configured to convert the picture output signal into a display-ready picture signal; a sound demodulation processing circuit section configured to demodulate the sound intermediate frequency signal; and a control section.
摘要翻译：这里公开了一种模拟电视广播信号接收装置，包括：调谐器部分，被配置为将模拟电视广播信号转换成预定的中频带信号; 解调电路部，被配置为从所述调谐器部分获得来自所述预定中频带信号的图像输出信号和声音中频信号; 图像处理电路部分，被配置为将图像输出信号转换为显示就绪图像信号; 声音解调处理电路部，被配置为对声音中频信号进行解调; 和控制部分。

8. 发明授权

US5793440A Key signal processing apparatus for video signal processing 失效
公开(公告)号：US5793440A
公开(公告)日：1998-08-11
申请号：US405158
申请日：1995-03-16
申请人： Chikatomo Nakasaka , Tsutomu Takamori
发明人： Chikatomo Nakasaka , Tsutomu Takamori
IPC分类号： H04N5/262 , H04N5/275 , H04N9/74
CPC分类号： H04N5/275 , H04N5/2622
摘要： A key signal processing apparatus for video signal processing including a signal delay circuit for successively delaying by 1 clock units a key input signal, used for applying a special effect to a video signal, and outputting the delayed key signal; a signal selection circuit for receiving the key input signal and a plurality of delayed key signals output from the signal delay circuit and selecting based on a selection control signal two pairs of signals in predetermined relationships of delay; a first signal interpolation circuit for performing signal interpolation on the first pair output from the signal selection circuit using a first coefficient; a second signal interpolation circuit for performing signal interpolation on the second pair output from the signal selection circuit using a second coefficient; and a signal synthesization circuit for combining a signal from the output of the first signal interpolation circuit and the output of the second signal interpolation circuit and outputting it as a key signal for video signal processing.

9. 发明授权

US5754255A Digital switcher 失效
标题翻译：数字切换器
公开(公告)号：US5754255A
公开(公告)日：1998-05-19
申请号：US553463
申请日：1995-11-28
申请人： Tsutomu Takamori
发明人： Tsutomu Takamori
IPC分类号： H04N5/268
CPC分类号： H04N5/268
摘要： A digital switcher of this invention comprises a matrix switcher section 11 adapted so that a plurality of serial digital video signals are inputted through respective input buses, a control section 12 for carrying out operation control of the matrix switcher section 11, signal processing sections 13A, 13B . . . connected to a plurality of output buses of the matrix switcher section 11, an input detector 14 connected to one output bus of the matrix switcher section 11, and an error detector 15 connected to one output bus of the matrix switcher section 11. An approach is employed to control the matrix switcher section 11 by the control section 12 with respect to a plurality of digital video signals inputted through respective input buses to thereby selectively detect presence or absence of input and occurrence of error by the input detector 14 and the error detector 15 connected to one output bus of the matrix switcher section 11.
摘要翻译： PCT No.PCT / JP95 / 00512 Sec。 371日期：1995年11月28日 102（e）1995年11月28日PCT PCT 1995年3月20日PCT公布。 WO95 / 27368 PCT公开日期：1995年10月12日本发明的数字切换器包括：矩阵切换器部分11，其适于使得通过各个输入总线输入多个串行数字视频信号;控制部分12，用于执行矩阵切换器部分11的操作控制; 信号处理部13A，13B。。。连接到矩阵切换器部分11的多个输出总线，连接到矩阵切换器部分11的一个输出总线的输入检测器14和连接到矩阵切换器部分11的一个输出总线的错误检测器15.方法是用于通过控制部分12相对于通过各个输入总线输入的多个数字视频信号来控制矩阵切换器部分11，从而通过输入检测器14和误差检测器15选择性地检测是否存在输入和出现错误连接到矩阵切换器部分11的一个输出总线。

10. 发明授权

US5161032A Velocity error generator with first-order interpolation 失效
标题翻译：具有一阶插值的速度误差发生器
公开(公告)号：US5161032A
公开(公告)日：1992-11-03
申请号：US593393
申请日：1990-10-02
申请人： Yuji Kobayashi , Tsutomu Takamori
发明人： Yuji Kobayashi , Tsutomu Takamori
IPC分类号： G11B20/02 , H04N5/95 , H04N9/89 , H04N9/896
CPC分类号： H04N9/89
摘要： There is an apparatus for generating a velocity error signal for use in a time base corrector. This apparatus comprises: an A/D converter that converts a velocity error to a digital signal that is fed to a summing circuit to convert it to a phase shift amount. A zero value interpolation circuit multiplies the sampling frequency of the phase shift amount with an integer and a digital low-pass filter interpolates an output signal of the interpolation circuit. A differentiating circuit to convert an interpolated phase shift amount of an output signal of the LPF to a phase difference and a D/A converter 9 converts the digital phase difference data to an analog signal. With this apparatus, the velocity error can be accurately corrected.
摘要翻译：存在用于生成用于时基校正器的速度误差信号的装置。该装置包括：A / D转换器，其将速度误差转换为馈送到求和电路的数字信号，以将其转换为相移量。零值内插电路将相移量的采样频率与整数相乘，并且数字低通滤波器内插内插电路的输出信号。将LPF的输出信号的内插相移量转换为相位差的差分电路和D / A转换器9将数字相位差数据转换为模拟信号。利用该装置，可以精确地校正速度误差。

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