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1. 发明授权

US4282785A Electronic musical instrument 失效
标题翻译：电子乐器
公开(公告)号：US4282785A
公开(公告)日：1981-08-11
申请号：US842525
申请日：1977-10-17
申请人： Nobuharu Obayashi , Hikaru Hashizume , Seiji Kameyama , Sadaaki Ezawa , Tatsunori Kondo , Kiyomi Takauji , Tohru Aoyama
发明人： Nobuharu Obayashi , Hikaru Hashizume , Seiji Kameyama , Sadaaki Ezawa , Tatsunori Kondo , Kiyomi Takauji , Tohru Aoyama
IPC分类号： G10H1/18 , G10H5/06 , G10H1/00 , G10F1/00 , G10H1/04
CPC分类号： G10H5/06 , G10H1/185 , Y10S84/11
摘要： An electronic musical instrument which is provided with a note frequency data memory for storing note frequency data corresponding to data of key switch depression through a key code register, a note frequency data register for latching and storing the data from the note frequency data memory by a time division pulse from a time division control signal generator, an octave data register for latching and storing octave data from the key code register by the time division pulse from the time division control signal generator, a frequency generator composed of a programmable counter supplied with the output from the note frequency data register to provide a frequency corresponding thereto, a frequency divider array supplied with the frequency and a decoder supplied with the output from the octave data register, the outputs from the respective output ends of the frequency divider array being selected by the output from the decoder in accordance with the octave data, and a musical waveform generator composed of filter circuits corresponding to respective musical instrument sounds and supplied with the output from the frequency generator to provide a musical signal.
摘要翻译：一种电子乐器，其具有音符频率数据存储器，用于存储对应于通过键码寄存器的按键开关按压数据的音符频率数据，音符频率数据寄存器，用于锁存和存储来自音符频率数据存储器的数据来自时分控制信号发生器的时分脉冲，用于通过来自时分控制信号发生器的时分脉冲来存储和存储来自键码寄存器的八度数据的八度数据寄存器，由可编程计数器构成的频率发生器，从音符频率数据寄存器输出以提供与其对应的频率，提供有频率的分频器阵列和提供有来自倍频程数据寄存器的输出的解码器，分频器阵列的相应输出端的输出由来自解码器的根据八度数据的输出和音乐波形发生器由对应于各乐器声音的滤波器电路组成，并且提供有来自频率发生器的输出以提供音乐信号。

2. 发明授权

US06228166B1 Method for boron contamination reduction in IC fabrication 失效
标题翻译： IC制造中硼污染减少的方法
公开(公告)号：US06228166B1
公开(公告)日：2001-05-08
申请号：US08974990
申请日：1997-11-20
申请人： Tatsuya Suzuki , Tohru Aoyama
发明人： Tatsuya Suzuki , Tohru Aoyama
IPC分类号： C08B2302
CPC分类号： H01L21/02046 , C23C16/0227 , C23C16/4405 , C30B25/18 , H01L21/02381 , H01L21/02532 , H01L21/0262 , H01L21/02636 , H01L21/02658 , H01L21/26506
摘要： In order to reduce boron concentration between a silicon substrate and an Si or Si1-xGex layer which is epitaxially grown in a CVD (chemical vapor deposition) apparatus, the silicon substrate is pretreated, before being loaded into the CVD apparatus, such as to prevent the substrate from being contaminated by boron in a clean room. Further, in accordance with one embodiment, a CVD growth chamber itself is cleaned, before the substrate is loaded into the growth chamber, using an F2 gas at a predetermined temperature of the substrate, thereby to remove boron residues in the growth chamber.
摘要翻译：为了减少在硅衬底和在CVD（化学气相沉积）装置中外延生长的Si或Si1-xGex层之间的硼浓度，硅衬底在被装入CVD装置之前被预处理，以防止基材在洁净室内被硼污染。此外，根据一个实施例，在衬底被加载到生长室中之前，使用在衬底的预定温度下的F2气体清洁CVD生长室本身，从而去除生长室中的硼残余物。

3. 发明授权

US5951774A Cold-wall operated vapor-phase growth system 失效
标题翻译：冷壁操作气相生长系统
公开(公告)号：US5951774A
公开(公告)日：1999-09-14
申请号：US967058
申请日：1997-11-10
申请人： Seiichi Shishiguchi , Tohru Aoyama , Tatsuya Suzuki
发明人： Seiichi Shishiguchi , Tohru Aoyama , Tatsuya Suzuki
IPC分类号： C30B25/02 , C23C16/44 , C23C16/458 , C23C16/46 , C30B25/12 , H01L21/20 , H01L21/205 , C23C16/00
CPC分类号： C23C16/4581 , C23C16/46
摘要： A vapor-phase growth system able to avoid fluctuation of the heating performance of a heater during repeated growth processes is provided. This system includes a reactor, a substrate holder for holding a substrate, and a heater for heating the substrate held by the holder. The holder and the heater are placed in an inner space of the reactor. The holder and the substrate held by the holder divide an inner space of the reactor to thereby form a growth chamber in which a thin film is grown during a growth process and a heater chamber in which the heater is placed. The holder has a supporting member on which the substrate is placed. At least a part of the member is made of the same material as that of the thin film. The supporting member is made of a SOI substrate.
摘要翻译：提供了能够避免反复生长过程中加热器加热性能波动的气相生长系统。该系统包括反应器，用于保持基板的基板保持器和用于加热由保持器保持的基板的加热器。保持器和加热器被放置在反应器的内部空间中。保持器和由保持器保持的基板分隔反应器的内部空间，从而形成生长室，其中在生长过程中生长薄膜和其中放置加热器的加热器室。保持器具有支撑构件，衬底放置在支撑构件上。构件的至少一部分由与薄膜相同的材料制成。支撑构件由SOI衬底制成。

4. 发明授权

US6150221A Semiconductor device and method for manufacturing same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US6150221A
公开(公告)日：2000-11-21
申请号：US26494
申请日：1998-02-20
申请人： Tohru Aoyama
发明人： Tohru Aoyama
IPC分类号： H01L29/78 , H01L21/20 , H01L21/336 , H01L21/8238 , H01L27/092
CPC分类号： H01L29/66628 , H01L21/02381 , H01L21/02532 , H01L21/02579 , H01L21/0262 , H01L21/823814 , H01L21/823842
摘要： It is an object of the invention to provide a CMOS device comprising p-channel FETs having shallow source and drain regions and a method for fabricating the same. A B-doped selective epitaxial layer is grown only on an area, where the source and drain regions of the p-channel FET is to be formed. Growth of the B-doped selective epitaxial layer on an area, where the source and drain regions of a n-channel FET is to be formed, is impeded by forming a amorphous region on the area corresponding to the n-channel FET.
摘要翻译：本发明的目的是提供一种包括具有浅源极和漏极区的p沟道FET的CMOS器件及其制造方法。 B掺杂的选择性外延层仅在要形成p沟道FET的源极和漏极区域的区域上生长。通过在对应于n沟道FET的区域上形成非晶区，阻碍在要形成n沟道FET的源极和漏极区域的区域上的B掺杂选择性外延层的生长。

5. 发明授权

US06281097B1 Method of fabricating a semiconductor device having epitaxial layer 失效
标题翻译：制造具有外延层的半导体器件的方法
公开(公告)号：US06281097B1
公开(公告)日：2001-08-28
申请号：US09295582
申请日：1999-04-22
申请人： Tohru Aoyama
发明人： Tohru Aoyama
IPC分类号： H01L2120
CPC分类号： H01L29/66242 , H01L29/7378
摘要： There is provided a method of fabricating a semiconductor device, including the steps of forming an insulating film and an electrically conductive film on a silicon substrate, forming a first opening in the insulating film and a second opening in the electrically conductive film, the second opening having a smaller length than the first opening so that tunnel portions are formed in the insulating film below the electrically conductive film, and forming a Si1-xGex base epitaxial layer on the silicon substrate in the first opening of the insulating film, wherein a process gas for growing the Si1-xGex base epitaxial layer includes disilane, an etching gas includes chlorine, a ratio of the chlorine to the disilane is greater than {fraction (1/50)}, and a growth temperature is smaller than 640° C. In accordance with the method, it is possible to form a SiGe base epitaxial film having a greater thickness at opposite ends thereof than a thickness at the center thereof. Hence, even if the SiGe epitaxial film is formed to have a great thickness at opposite ends thereof for making electrical contact with the electrically conductive film, a central portion of the SiGe epitaxial layer acting as a base can have a small thickness. As a result, whereas a SiGe base epitaxial layer occupied about 80% of a thickness of an insulating film in a conventional semiconductor device, the SiGe base epitaxial layer formed in the above-mentioned method merely occupies about 60-3% of a thickness of the insulating film. Thus, the SiGe base epitaxial layer can be formed thinner, which ensures a higher operation rate of a bipolar transistor.
摘要翻译：提供一种制造半导体器件的方法，包括在硅衬底上形成绝缘膜和导电膜的步骤，在绝缘膜中形成第一开口和在导电膜中形成第二开口，第二开口具有比第一开口更小的长度，使得隧道部分形成在导电膜下面的绝缘膜中，并且在绝缘膜的第一开口中的硅衬底上形成Si1-xGex基极外延层，其中处理气体为了生长Si1-xGex基底外延层包括乙硅烷，蚀刻气体包括氯，氯与乙硅烷的比例大于{分数（1/50）}，生长温度小于640℃。根据该方法，可以形成在其相对端具有比其中心处的厚度更大的厚度的SiGe基底外延膜。因此，即使SiGe外延膜在其两端形成为具有与导电膜电接触的厚度较大的厚度，作为基底的SiGe外延层的中心部分也可以具有小的厚度。结果，在现有的半导体器件中，SiGe基极外延层占绝缘膜厚度的80％左右，而以上述方法形成的SiGe基极外延层仅占其厚度的约60〜3％绝缘膜。因此，SiGe基极外延层可以形成得更薄，这确保双极晶体管的更高的工作速率。

6. 发明授权

US5633040A Method and apparatus for treating film coated on substrate 失效
标题翻译：用于处理涂覆在基材上的薄膜的方法和设备
公开(公告)号：US5633040A
公开(公告)日：1997-05-27
申请号：US246817
申请日：1994-05-20
申请人： Takayuki Toshima , Tohru Aoyama
发明人： Takayuki Toshima , Tohru Aoyama
IPC分类号： B05D1/00 , B05D3/04 , G03F7/16 , B05D3/02 , B05D3/12
CPC分类号： G03F7/168 , B05D3/0466 , B05D3/0486 , B05D1/005
摘要： A film treating method treats a resist film which is formed on a substrate by spin coating. The method comprises a step for coating resist on the substrate to form the resist film, a step for conveying the substrate to a region having an atmosphere of a saturated vapor or a super-saturated vapor of solvent before the solvent contained in the resist film is lost, a step for executing a first heating process wherein the substrate is heated at a temperature which lowers the viscosity of the resist film and permits solvent to remain in the resist film in an amount sufficient to maintain the fluidity of the resist film, a step for conveying the substrate away from the region having the atmosphere of the saturated vapor or the super-saturated vapor of solvent, and a step for executing a second heating process wherein the substrate is heated at a temperature higher than that of the first heating process, thereby permitting the solvent to evaporate from the resist film.
摘要翻译：膜处理方法通过旋涂处理在基板上形成的抗蚀剂膜。该方法包括在基板上涂覆抗蚀剂以形成抗蚀剂膜的步骤，在抗蚀剂膜中包含的溶剂是在基板上传送到具有饱和蒸气或溶剂的超饱和蒸气的区域的区域的步骤丢失，执行第一加热过程的步骤，其中在降低抗蚀剂膜的粘度的温度下加热基板并允许溶剂以足以保持抗蚀剂膜的流动性的量保留在抗蚀剂膜中的步骤，步骤用于将衬底远离具有饱和蒸汽气氛或溶剂的超饱和蒸气的区域，以及用于执行第二加热过程的步骤，其中衬底在比第一加热过程高的温度下被加热，从而允许溶剂从抗蚀剂膜蒸发。

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