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1. 发明授权

US5410573A Digital phase-locked loop circuit 失效
标题翻译：数字锁相环电路
公开(公告)号：US5410573A
公开(公告)日：1995-04-25
申请号：US149005
申请日：1993-11-08
申请人： Noboru Taga , Tatsuya Ishikawa , Susumu Komatsu
发明人： Noboru Taga , Tatsuya Ishikawa , Susumu Komatsu
IPC分类号： H03L7/085 , H03L7/087 , H04L27/00 , H04L27/233 , H03D3/24
CPC分类号： H04L27/2332 , H03L7/087 , H03L2207/14 , H04L2027/003 , H04L2027/0057 , H04L2027/0079
摘要： A digital phase locked loop which incorporates a phase comparator which produces a phase deviation signal having a sinusoidal phase comparison characteristic rather than a sawtooth phase comparison characteristic in order to avoid aliases.
摘要翻译：一种数字锁相环，其包含相位比较器，其产生具有正弦相位比较特性而不是锯齿相位比较特性的相位偏差信号，以避免别名。

2. 发明授权

US5440268A AFC circuit for QPSK demodulator 失效
标题翻译：用于QPSK解调器的AFC电路
公开(公告)号：US5440268A
公开(公告)日：1995-08-08
申请号：US306957
申请日：1994-09-16
申请人： Noboru Taga , Tatsuya Ishikawa , Susumu Komatsu
发明人： Noboru Taga , Tatsuya Ishikawa , Susumu Komatsu
IPC分类号： H04L27/22 , H04L27/00 , H04L27/233 , H03D3/00
CPC分类号： H04L27/2332 , H04L2027/0032 , H04L2027/0055 , H04L2027/0057 , H04L2027/0065 , H04L2027/0081
摘要： AFC circuit for QPSK demodulator including, a circuit for obtaining quadrature related detection signals by multiplying a modulated input signal with quadrature related local oscillation frequency signals from a quadrature phase local oscillator, digital converter for converting the detection signals into corresponding digital signals by sampling them with quadrature related clocks which have a frequency two times higher than a symbol rate of the input signal, frequency error detecter for detecting a frequency error between the quadrature related digital signals using a symbol timing sample value and a symbol intermediate timing sample value in the converted digital signals, first validity determinator for determining whether the frequency error signal is valid or not through a detection of the pattern of the modulated input signal from sample values before and after the symbol timing so as to result a first validity signal, second validity determinator for deetermining whether the frequency error signal is valid or not through a detection of an absolute sample value of the symbol intermediate timing so as to result a second validity signal, and valid frequency error extractor for extracting the frequency error signal as a frequency control signal for controlling the oscillation frequency of the local oscillator when the frequency error signal has been proved to be valid by the first and the second validity signals.
摘要翻译：用于QPSK解调器的AFC电路，包括：通过将调制输入信号与来自正交相位本地振荡器的正交相关本地振荡频率信号相乘获得正交相关检测信号的电路，用于通过对检测信号进行采样将检测信号转换成相应的数字信号，具有比输入信号的符号率高两倍的频率的正交相关时钟，用于使用符号定时采样值检测正交相关数字信号之间的频率误差的频率误差检测器和转换后的数字信号中的符号中间定时采样值信号，第一有效性确定器，用于通过从符号定时之前和之后的采样值检测调制输入信号来确定频率误差信号是否有效以产生第一有效信号，第二有效性确定器用于确定无论是通过检测符号中间定时的绝对采样值来产生第一有效信号，以及用于提取频率误差信号的有效频率误差提取器作为用于控制振荡频率的频率控制信号，当频率误差信号已经被第一和第二有效信号证明是有效的时，本地振荡器。

3. 发明授权

US5771224A Orthogonal frequency division multiplexing transmission system and transmitter and receiver therefor 失效
标题翻译：正交频分复用传输系统及其发射机和接收机
公开(公告)号：US5771224A
公开(公告)日：1998-06-23
申请号：US619211
申请日：1996-03-21
申请人： Takashi Seki , Noboru Taga , Shigeru Okita , Tatsuya Ishikawa
发明人： Takashi Seki , Noboru Taga , Shigeru Okita , Tatsuya Ishikawa
IPC分类号： H04L27/18 , H04J11/00 , H04L5/02 , H04L27/26 , H04L27/34
CPC分类号： H04L27/2657 , H04L27/18 , H04L27/2613 , H04L27/2675 , H04L27/34 , H04L25/0232 , H04L25/03159 , H04L27/2662 , H04L5/0048
摘要： A transmission system is disclosed which permits the receiving end to demodulate multi-valued modulated symbols successfully under fading conditions and reduces the amount of transmitted reference data to improve data transmission efficiency. At the transmitting end, a multiplexing section, a modulating section, and a transmitting section are provided. In transmitting an OFDM transmission frame, null symbols and reference symbols are placed in the beginning portion of the frame and QPSK symbols are placed in an information symbol data region in the frame with equal spacings in time and frequency. At the receiving end, a receiving section, a demodulation section, an equalizing section, and a demultiplexing section are provided. An error detector detects amplitude and phase errors of each carrier from the reference symbols, and a variation detector detects variations in the amplitude and phase of a received signal from the QPSK symbols. The carrier amplitude and phase errors are corrected by a correction information producing section on the amplitude and phase variations of the received signal detected by the variation detector to produce correction information. The equalizing section equalizes the demodulated symbol data according to the correction information.
摘要翻译：公开了一种传输系统，其允许接收端在衰落条件下成功解调多值调制符号，并减少传输的参考数据量以提高数据传输效率。在发送端，提供复用部分，调制部分和发送部分。在发送OFDM传输帧时，将空符号和参考符号放置在帧的开始部分，并且将QPSK符号放置在帧中的时间和频率上等间隔的信息符号数据区域中。在接收端设置有接收部分，解调部分，均衡部分和解复用部分。误差检测器从参考符号检测每个载波的幅度和相位误差，并且变化检测器检测来自QPSK符号的接收信号的幅度和相位的变化。载波振幅和相位误差由校正信息产生部分对由变化检测器检测到的接收信号的幅度和相位变化进行校正，以产生校正信息。均衡部根据校正信息对解调符号数据进行均衡。

4. 发明授权

US5418815A Receiver adaptively operable for multiple signal transmission systems 失效
标题翻译：接收机适用于多个信号传输系统
公开(公告)号：US5418815A
公开(公告)日：1995-05-23
申请号：US76131
申请日：1993-06-14
申请人： Tatsuya Ishikawa , Noboru Taga
发明人： Tatsuya Ishikawa , Noboru Taga
IPC分类号： H03B28/00 , H03D1/22 , H03D3/00 , H03D3/24 , H03D5/00 , H03D7/16 , H04L27/00 , H04L27/38 , H04N5/44 , H04N5/455 , H04N5/46 , H04N9/00
CPC分类号： H04N5/46 , H03D3/007 , H03D3/24 , H03D5/00 , H03D7/166 , H04L27/0008 , H04L27/3827 , H04N21/42638 , H04N5/4401 , H04N5/455 , H03B28/00 , H03D1/2245 , H03D3/006 , H03D7/161 , H03D7/165
摘要： A receiver for selectively receiving high frequency signals from analog modulated signals and digital modulated signals. The receiver has an intermediate frequency signal circuit for selecting a desired channel of the high frequency signals and for frequency-converting the high frequency signal of the selected channel into an intermediate frequency signal, a demodulator for demodulating the intermediate frequency signal, which is adapted to be capable of demodulating modulated signals in a variety of modulation systems, the demodulator including at least a digital section, and a controller for controlling the demodulator to be able to discriminate between the analog modulated signals and the digital modulated signals, based on a demodulated signal output from the digital section of the demodulator and to be switched into a demodulation mode suited for modulation system of the selected channel of the high frequency signals.
摘要翻译：用于从模拟调制信号和数字调制信号中有选择地接收高频信号的接收机。接收机具有中频信号电路，用于选择高频信号的期望信道，并将所选信道的高频信号频率转换成中频信号，解调器用于解调中频信号，该解调器适于能够解调各种调制系统中的调制信号，解调器至少包括数字部分，以及控制器，用于控制解调器能够基于解调信号来区分模拟调制信号和数字调制信号从解调器的数字部分输出并切换到适合所选频道的高频信号的调制系统的解调模式。

5. 发明授权

US5440587A Demodulator for digitally modulated wave 失效
标题翻译：数字调制波解调器
公开(公告)号：US5440587A
公开(公告)日：1995-08-08
申请号：US272862
申请日：1994-07-08
申请人： Tatsuya Ishikawa , Noboru Taga
发明人： Tatsuya Ishikawa , Noboru Taga
IPC分类号： H04L27/00 , H04L27/233 , H03D3/22 , H04L27/14
CPC分类号： H04L27/2332 , H04L2027/003 , H04L2027/0032 , H04L2027/0057 , H04L2027/0081
摘要： A QPSK modulated wave is inputted to an in-phase detector and an orthogonal detector. The detected components are converted to substantially a base band, and each component is digital-converted by A/D converters. Each digital component is spectrum-shaped by digital LPFs. The outputs of digital LPFs are inputted to a complex multiplier and calculated by use of first and second reproduction carriers and expressed as first and second calculation outputs, and inputted to a phase detector. The phase detector obtains phase difference data between the phase expressed by the first and second calculation outputs and a predetermined phase and quadrant data of the phase. The phase difference data is used for a PLL. The phase difference data is is inputted to a frequency error detection circuit detecting a frequency error. The frequency error output is smoothed by a filter of an AFC loop, and used as a control signal controlling the oscillation frequency of the local oscillation unit. If the frequency error is large, the frequency error detection circuit controls the AFC loop to be in an operation state and the PLL loop and the PLL loop to be in a fixed state. If the frequency error is small, the frequency error detection circuit contains the control state of the AFC loop and switches the PLL loop to be the operation state.
摘要翻译： QPSK调制波被输入到同相检测器和正交检测器。检测到的分量被转换成基本的基带，并且每个分量由A / D转换器进行数字转换。每个数字组件都是数字LPF的频谱形式。数字LPF的输出被输入到复数乘法器，并通过使用第一和第二再现载波进行计算并表示为第一和第二计算输出，并输入到相位检测器。相位检测器获得由第一和第二计算输出表示的相位与相位的预定相位和象限数据之间的相位差数据。相位差数据用于PLL。相位差数据被输入到检测频率误差的频率误差检测电路。频率误差输出由AFC回路的滤波器平滑，并用作控制本振单元的振荡频率的控制信号。如果频率误差较大，则频率误差检测电路控制AFC回路处于工作状态，PLL环路和PLL环路处于固定状态。如果频率误差较小，则频率误差检测电路包含AFC环路的控制状态，并将PLL环路切换为运行状态。

6. 发明授权

US6081563A AFC circuit of digital demodulation device 失效
标题翻译： AFC电路数字解调装置
公开(公告)号：US6081563A
公开(公告)日：2000-06-27
申请号：US19368
申请日：1998-02-05
申请人： Noboru Taga , Takashi Seki
发明人： Noboru Taga , Takashi Seki
IPC分类号： H04L27/227 , H03J7/02 , H04L27/00 , H04L27/233 , H04L27/06
CPC分类号： H04L27/2332 , H04L2027/003 , H04L2027/0057
摘要： A phase detection circuit detects a phase of a phase detection signal output from a complex multiplication circuit. A frequency error detection circuit detects a frequency error of a phase-detected signal, with the first frequency error detection characteristic in which a first frequency domain is defined as a detection range. An average circuit converts a signal having the detected frequency error into a signal having a second frequency error detection characteristic in which a second frequency domain other than the first frequency domain is defined as a detection range. After the average circuit calculates an average of frequency error signals for each period of time, it converts an average signal into a signal having the original first frequency error detection characteristic and outputs it to an AFC loop filter.
摘要翻译：相位检测电路检测从复数乘法电路输出的相位检测信号的相位。频率误差检测电路利用将第一频域定义为检测范围的第一频率误差检测特性来检测相位检测信号的频率误差。平均电路将具有检测到的频率误差的信号转换为具有第二频率误差检测特性的信号，其中除了第一频域之外的第二频域被定义为检测范围。在平均电路计算每个时间段的频率误差信号的平均值之后，将平均信号转换成具有原始第一频率误差检测特性的信号，并将其输出到AFC环路滤波器。

7. 发明申请

US20100202547A1 OFDM RECEPTION APPARATUS 有权
标题翻译： OFDM接收设备
公开(公告)号：US20100202547A1
公开(公告)日：2010-08-12
申请号：US12701803
申请日：2010-02-08
申请人： Noboru Taga , Takashi Seki
发明人： Noboru Taga , Takashi Seki
IPC分类号： H04L27/28
CPC分类号： H04L27/2662 , H04L27/2657 , H04L27/2675
摘要： In an OFDM reception apparatus, a Fourier transform unit segments a time-domain signal in an OFDM signal in accordance with a segmenting window signal and converts the time-domain signal into a frequency-domain signal. A first signal extraction unit extracts pilot signals periodically arranged in a frequency direction and in a time direction from an output from the Fourier transform unit. A second signal extraction unit extracts differential reference signals from an output from the Fourier transform unit. A delay profile detection unit performs delay profile detection using the output from the second signal extraction unit, and performs delay profile detection on the output from the first signal extraction unit within a range limited on the basis of a result of the detection. A synchronous reproduction unit generates the segmenting window signal using an output from the delay profile detection unit.
摘要翻译：在OFDM接收装置中，傅立叶变换单元根据分割窗口信号对OFDM信号中的时域信号进行分段，并将时域信号变换为频域信号。第一信号提取单元从傅里叶变换单元的输出中提取频率方向和时间方向周期性排列的导频信号。第二信号提取单元从傅立叶变换单元的输出中提取差分参考信号。延迟分布检测单元使用来自第二信号提取单元的输出执行延迟分布检测，并且在基于检测结果限制的范围内对来自第一信号提取单元的输出进行延迟分布检测。同步再现单元使用延迟分布检测单元的输出产生分割窗口信号。

8. 发明授权

US5161003A Compatible television system with companding auxiliary signal 失效
标题翻译：具有辅助辅助信号的兼容电视系统
公开(公告)号：US5161003A
公开(公告)日：1992-11-03
申请号：US667297
申请日：1991-03-11
申请人： Seijiro Yasuki , Kiyoyuki Kawai , Noboru Taga
发明人： Seijiro Yasuki , Kiyoyuki Kawai , Noboru Taga
IPC分类号： H04N7/015 , H04N7/08 , H04N7/081 , H04N11/24
CPC分类号： H04N11/008 , H04N7/012 , H04N7/015 , Y10S348/904
摘要： A compatible television signal encoder for encoding a television signal having a first signal and a second signal. The decoder includes a divider for dividing the wide aspect television signal into a main signal having the first signal and low-frequency components of the second signal multiplexed in the horizontal overscan regions of the first signal and an auxilary signal, an interpolator for producing an interpolating scanning field signal using a first scanning field signal of the main signal output from the divider, a field switch for replacing a second scanning field signal of the main signal with the interpolating scanning field signal output from the interpolator and an adder for adding the auxiliary signal from the divider to the signal output from the field switch.

9. 发明授权

US08948333B2 Clock frequency error detecting device 有权
标题翻译：时钟频率误差检测装置
公开(公告)号：US08948333B2
公开(公告)日：2015-02-03
申请号：US13419570
申请日：2012-03-14
申请人： Noboru Taga , Tatsuhisa Furukawa
发明人： Noboru Taga , Tatsuhisa Furukawa
IPC分类号： H04L7/00 , H04L7/04
CPC分类号： H04L7/042 , H04J3/0611
摘要： A clock frequency error detecting device includes a system storage portion which stores a synchronization system based on at least one of several types of frame synchronization signals included in a received signal in which a frame synchronization signal in each frame includes a part obtained by shifting of a frame synchronization signal of another frame by a symbol by using a predetermined rule; a pattern matching portion which performs pattern matching between the received signal and the synchronization system; a symbol counter which outputs a symbol number; a timing detection portion which detects the frame synchronization signal of each frame based on a pattern matching processing result and to output the symbol number at the detection timing; and a frequency error detection portion which detects a change of the symbol number and to detect a clock frequency error of the symbol period based on the detection.
摘要翻译：时钟频率误差检测装置包括：系统存储部分，其基于包括在接收信号中的几种类型的帧同步信号中的至少一种存储同步系统，其中每帧中的帧同步信号包括通过移位获得的部分通过使用预定规则，通过符号的另一帧的帧同步信号; 模式匹配部，其执行所述接收信号与所述同步系统之间的模式匹配; 输出符号数的符号计数器; 定时检测部分，其基于模式匹配处理结果检测每帧的帧同步信号，并在检测定时输出符号数; 以及频率误差检测部分，其检测符号数量的变化并且基于该检测来检测符号周期的时钟频率误差。

10. 发明授权

US08284850B2 OFDM reception apparatus 有权
标题翻译： OFDM接收装置
公开(公告)号：US08284850B2
公开(公告)日：2012-10-09
申请号：US12701803
申请日：2010-02-08
申请人： Noboru Taga , Takashi Seki
发明人： Noboru Taga , Takashi Seki
IPC分类号： H04K1/10
CPC分类号： H04L27/2662 , H04L27/2657 , H04L27/2675
摘要： In an OFDM reception apparatus, a Fourier transform unit segments a time-domain signal in an OFDM signal in accordance with a segmenting window signal and converts the time-domain signal into a frequency-domain signal. A first signal extraction unit extracts pilot signals periodically arranged in a frequency direction and in a time direction from an output from the Fourier transform unit. A second signal extraction unit extracts differential reference signals from an output from the Fourier transform unit. A delay profile detection unit performs delay profile detection using the output from the second signal extraction unit, and performs delay profile detection on the output from the first signal extraction unit within a range limited on the basis of a result of the detection. A synchronous reproduction unit generates the segmenting window signal using an output from the delay profile detection unit.
摘要翻译：在OFDM接收装置中，傅立叶变换单元根据分割窗口信号对OFDM信号中的时域信号进行分段，并将时域信号变换为频域信号。第一信号提取单元从傅里叶变换单元的输出中提取频率方向和时间方向周期性排列的导频信号。第二信号提取单元从傅立叶变换单元的输出中提取差分参考信号。延迟分布检测单元使用来自第二信号提取单元的输出执行延迟分布检测，并且在基于检测结果限制的范围内对来自第一信号提取单元的输出进行延迟分布检测。同步再现单元使用延迟分布检测单元的输出产生分割窗口信号。

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