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1. 发明授权

US07806988B2 Method to address carbon incorporation in an interpoly oxide 有权
标题翻译：解决二氧化硅中碳掺入的方法
公开(公告)号：US07806988B2
公开(公告)日：2010-10-05
申请号：US10951997
申请日：2004-09-28
申请人： Niraj Rana , Kevin R. Shea
发明人： Niraj Rana , Kevin R. Shea
IPC分类号： B08B3/00 , B08B7/00
CPC分类号： H01L21/02063 , B08B3/08 , C23F1/32 , C23F4/00
摘要： A method of removing a mask and addressing interfacial carbon chemisbored in a semiconductor wafer starts with placing the semiconductor wafer into a dry strip chamber. The dry stripping process is performed to remove the mask on the semiconductor wafer. The semiconductor wafer is then subjected to a cleaning solution to perform a cleaning process to remove particles on the surface of the semiconductor wafer and to address the interfacial carbon. The cleaning solution being either water containing ozone (O3) and ammonia (NH3), or a solution of hot phosphoric acid (H3PO4).
摘要翻译：在半导体晶片中化学处理掩模和去除界面碳的方法开始于将半导体晶片放入干燥条形室中。执行干燥剥离处理以去除半导体晶片上的掩模。然后对半导体晶片进行清洁溶液以进行清洁处理以去除半导体晶片的表面上的颗粒并解决界面碳。清洁溶液是含臭氧（O3）和氨（NH3）的水，或热磷酸（H 3 PO 4）的溶液。

2. 发明授权

US07824505B2 Method to address carbon incorporation in an interpoly oxide 有权
标题翻译：解决二氧化硅中碳掺入的方法
公开(公告)号：US07824505B2
公开(公告)日：2010-11-02
申请号：US11493053
申请日：2006-07-26
申请人： Niraj Rana , Kevin R. Shea
发明人： Niraj Rana , Kevin R. Shea
IPC分类号： B08B3/00 , B08B7/00
CPC分类号： H01L21/02063 , B08B3/08 , C23F1/32 , C23F4/00
摘要： A method of removing a mask and addressing interfacial carbon chemisorbed in a semiconductor wafer starts with placing the semiconductor wafer into a dry strip chamber. The dry stripping process is performed to remove the mask on the semiconductor wafer. The semiconductor wafer is then subjected to a cleaning solution to perform a cleaning process to remove particles on the surface of the semiconductor wafer and to address the interfacial carbon. The cleaning solution being either water containing ozone (O3) and ammonia (NH3), or a solution of hot phosphoric acid (H3PO4).
摘要翻译：在半导体晶片中化学吸附的掩模和去除界面碳的方法首先将半导体晶片放入干燥条形室中。执行干燥剥离处理以去除半导体晶片上的掩模。然后对半导体晶片进行清洁溶液以进行清洁处理以去除半导体晶片的表面上的颗粒并解决界面碳。清洁溶液是含臭氧（O3）和氨（NH3）的水，或热磷酸（H 3 PO 4）的溶液。

3. 发明授权

US08124545B2 Methods of etching oxide, reducing roughness, and forming capacitor constructions 失效
标题翻译：蚀刻氧化物，减少粗糙度和形成电容器结构的方法
公开(公告)号：US08124545B2
公开(公告)日：2012-02-28
申请号：US12778043
申请日：2010-05-11
申请人： Niraj B. Rana , Kevin R. Shea , Janos Fucsko
发明人： Niraj B. Rana , Kevin R. Shea , Janos Fucsko
IPC分类号： H01L21/31
CPC分类号： H01L21/31111 , C11D7/265 , C11D11/0047 , H01L21/02063 , H01L21/31116 , H01L27/0629 , H01L28/40 , Y10S438/963
摘要： The invention includes methods in which one or more components of a carboxylic acid having an aqueous acidic dissociation constant of at least 1×10−6 are utilized during the etch of oxide (such as silicon dioxide or doped silicon dioxide). Two or more carboxylic acids can be utilized. Exemplary carboxylic acids include trichloroacetic acid, maleic acid, and citric acid.
摘要翻译：本发明包括在氧化物（例如二氧化硅或掺杂的二氧化硅）的蚀刻期间利用具有至少1×10-6的酸性解离常数的羧酸的一种或多种组分的方法。可以使用两种或更多种羧酸。示例性的羧酸包括三氯乙酸，马来酸和柠檬酸。

4. 发明授权

US08119537B2 Selective etching of oxides to metal nitrides and metal oxides 有权
标题翻译：选择性地将氧化物蚀刻到金属氮化物和金属氧化物上
公开(公告)号：US08119537B2
公开(公告)日：2012-02-21
申请号：US11155809
申请日：2005-06-17
申请人： Kevin R. Shea , Kevin J. Torek
发明人： Kevin R. Shea , Kevin J. Torek
IPC分类号： H01L21/302
CPC分类号： H01L21/76802 , H01L21/31111 , H01L21/31116 , H01L21/76838
摘要： A method is provided for selectively etching native oxides or other contaminants to metal nitrides and metal oxides during manufacture of a semiconductor device. The method utilizes a substantially non-aqueous etchant which includes a source of fluorine ions. In a preferred embodiment, the etchant comprises H2SO4 and HF. The etchant selectively etches native and doped oxides or other contaminants without excessively etching metal nitrides or metal oxides on the substrate or on adjacent exposed surfaces.
摘要翻译：提供了一种在制造半导体器件期间选择性地将天然氧化物或其它污染物刻蚀成金属氮化物和金属氧化物的方法。该方法利用包括氟离子源的基本非水性蚀刻剂。在优选的实施方案中，蚀刻剂包括H 2 SO 4和HF。蚀刻剂选择性地蚀刻天然的和掺杂的氧化物或其它污染物，而不会过度地蚀刻衬底上或邻近暴露的表面上的金属氮化物或金属氧化物。

5. 发明申请

US20110214266A1 Methods of Forming Capacitors 有权
标题翻译：形成电容器的方法
公开(公告)号：US20110214266A1
公开(公告)日：2011-09-08
申请号：US13109673
申请日：2011-05-17
申请人： Mark Kiehlbauch , Kevin R. Shea
发明人： Mark Kiehlbauch , Kevin R. Shea
IPC分类号： H01G7/00
CPC分类号： H01L28/91 , H01L27/10852 , H01L27/10894
摘要： A method of forming a capacitor includes providing material having an opening therein over a node location on a substrate. A shield is provided within and across the opening, with a void being received within the opening above the shield and a void being received within the opening below the shield. The shield is etched through within the opening. After the etching, a first capacitor electrode is formed within the opening in electrical connection with the node location. A capacitor dielectric and a second capacitor electrode are formed operatively adjacent the first capacitor electrode
摘要翻译：形成电容器的方法包括在衬底上的节点位置上提供其中具有开口的材料。在开口内和横过开口设置有屏蔽件，空隙被容纳在屏蔽件上方的开口内，并且在屏蔽件下面的开口内容纳有空隙。屏蔽层在开口内蚀刻。在蚀刻之后，在开口内形成与节点位置电连接的第一电容器电极。与第一电容器电极可操作地形成电容器电介质和第二电容器电极

6. 发明申请

US20100151653A1 Methods Of Forming A Plurality Of Capacitors 有权
标题翻译：形成多种电容器的方法
公开(公告)号：US20100151653A1
公开(公告)日：2010-06-17
申请号：US12710077
申请日：2010-02-22
申请人： Vishwanath Bhat , Kevin R. Shea , Farrell Good
发明人： Vishwanath Bhat , Kevin R. Shea , Farrell Good
IPC分类号： H01L21/02
CPC分类号： H01L27/10894 , H01L27/10852 , H01L28/91
摘要： A method of forming a plurality of capacitors includes an insulative material received over a capacitor array area and a circuitry area. The array area comprises a plurality of capacitor electrode openings within the insulative material received over individual capacitor storage node locations. The intervening area comprises a trench. Conductive material is formed within the openings and against a sidewall portion of the trench to less than completely fill the trench. Covering material is formed over an elevationally outer lateral interface of the conductive material within the trench and the insulative material of the circuitry area. The insulative material within the array area is etched with a liquid etching solution effective to expose outer sidewall portions of the conductive material within the array area and to expose the conductive material within the trench. The conductive material within the array area is incorporated into a plurality of capacitors.
摘要翻译：形成多个电容器的方法包括在电容器阵列区域和电路区域上接收的绝缘材料。阵列区域包括在单独的电容器存储节点位置处接收的绝缘材料内的多个电容器电极开口。中间区域包括沟槽。导电材料形成在开口内并抵靠沟槽的侧壁部分，以小于完全填充沟槽。覆盖材料形成在沟槽内的导电材料的正面外侧界面和电路区域的绝缘材料之间。用液体蚀刻溶液蚀刻阵列区域内的绝缘材料，该液体蚀刻溶液有效地暴露阵列区域内的导电材料的外侧壁部分并露出沟槽内的导电材料。阵列区域内的导电材料被并入多个电容器中。

7. 发明申请

US20100105186A1 Methods For Forming Semiconductor Constructions, And Methods For Selectively Etching Silicon Nitride Relative To Conductive Material 有权
标题翻译：用于形成半导体结构的方法以及相对于导电材料选择性蚀刻氮化硅的方法
公开(公告)号：US20100105186A1
公开(公告)日：2010-04-29
申请号：US12652955
申请日：2010-01-06
申请人： Kevin R. Shea , Thomas M. Graettinger
发明人： Kevin R. Shea , Thomas M. Graettinger
IPC分类号： H01L21/02
CPC分类号： H01L28/92 , H01L21/30625 , H01L21/31116 , H01L21/31144 , H01L21/32139 , H01L27/105 , H01L27/1052 , H01L27/108
摘要： The invention includes methods for selectively etching insulative material supports relative to conductive material. The invention can include methods for selectively etching silicon nitride relative to metal nitride. The metal nitride can be in the form of containers over a semiconductor substrate, with such containers having upwardly-extending openings with lateral widths of less than or equal to about 4000 angstroms; and the silicon nitride can be in the form of a layer extending between the containers. The selective etching can comprise exposure of at least some of the silicon nitride and the containers to Cl2 to remove the exposed silicon nitride, while not removing at least the majority of the metal nitride from the containers. In subsequent processing, the containers can be incorporated into capacitors.
摘要翻译：本发明包括相对于导电材料选择性地蚀刻绝缘材料支撑件的方法。本发明可以包括相对于金属氮化物选择性地蚀刻氮化硅的方法。金属氮化物可以是在半导体衬底上的容器的形式，其中这种容器具有向上延伸的开口，横向宽度小于或等于约4000埃; 并且氮化硅可以是在容器之间延伸的层的形式。选择性蚀刻可以包括将至少一些氮化硅和容器暴露于Cl2以去除暴露的氮化硅，同时不从容器中去除至少大部分的金属氮化物。在随后的处理中，容器可以并入电容器中。

8. 发明授权

US07682924B2 Methods of forming a plurality of capacitors 有权
标题翻译：形成多个电容器的方法
公开(公告)号：US07682924B2
公开(公告)日：2010-03-23
申请号：US11838070
申请日：2007-08-13
申请人： Vishwanath Bhat , Kevin R. Shea , Farrell Good
发明人： Vishwanath Bhat , Kevin R. Shea , Farrell Good
IPC分类号： H01L21/20
CPC分类号： H01L27/10894 , H01L27/10852 , H01L28/91
摘要： A method of forming a plurality of capacitors includes an insulative material received over a capacitor array area and a circuitry area. The array area comprises a plurality of capacitor electrode openings within the insulative material received over individual capacitor storage node locations. The intervening area comprises a trench. Conductive material is formed within the openings and against a sidewall portion of the trench to less than completely fill the trench. Covering material is formed over an elevationally outer lateral interface of the conductive material within the trench and the insulative material of the circuitry area. The insulative material within the array area is etched with a liquid etching solution effective to expose outer sidewall portions of the conductive material within the array area and to expose the conductive material within the trench. The conductive material within the array area is incorporated into a plurality of capacitors.
摘要翻译：形成多个电容器的方法包括在电容器阵列区域和电路区域上接收的绝缘材料。阵列区域包括在单独的电容器存储节点位置处接收的绝缘材料内的多个电容器电极开口。中间区域包括沟槽。导电材料形成在开口内并抵靠沟槽的侧壁部分，以小于完全填充沟槽。覆盖材料形成在沟槽内的导电材料的正面外侧界面和电路区域的绝缘材料之间。用液体蚀刻溶液蚀刻阵列区域内的绝缘材料，该液体蚀刻溶液有效地暴露阵列区域内的导电材料的外侧壁部分并露出沟槽内的导电材料。阵列区域内的导电材料被并入多个电容器中。

9. 发明授权

US07666797B2 Methods for forming semiconductor constructions, and methods for selectively etching silicon nitride relative to conductive material 有权
标题翻译：用于形成半导体结构的方法以及相对于导电材料选择性地蚀刻氮化硅的方法
公开(公告)号：US07666797B2
公开(公告)日：2010-02-23
申请号：US11506347
申请日：2006-08-17
申请人： Kevin R. Shea , Thomas M. Graettinger
发明人： Kevin R. Shea , Thomas M. Graettinger
IPC分类号： H01L21/302 , H01L21/318
CPC分类号： H01L28/92 , H01L21/30625 , H01L21/31116 , H01L21/31144 , H01L21/32139 , H01L27/105 , H01L27/1052 , H01L27/108
摘要： The invention includes methods for selectively etching insulative material supports relative to conductive material. The invention can include methods for selectively etching silicon nitride relative to metal nitride. The metal nitride can be in the form of containers over a semiconductor substrate, with such containers having upwardly-extending openings with lateral widths of less than or equal to about 4000 angstroms; and the silicon nitride can be in the form of a layer extending between the containers. The selective etching can comprise exposure of at least some of the silicon nitride and the containers to Cl2 to remove the exposed silicon nitride, while not removing at least the majority of the metal nitride from the containers. In subsequent processing, the containers can be incorporated into capacitors.
摘要翻译：本发明包括相对于导电材料选择性地蚀刻绝缘材料支撑件的方法。本发明可以包括相对于金属氮化物选择性地蚀刻氮化硅的方法。金属氮化物可以是在半导体衬底上的容器的形式，其中这种容器具有向上延伸的开口，横向宽度小于或等于约4000埃; 并且氮化硅可以是在容器之间延伸的层的形式。选择性蚀刻可以包括将至少一些氮化硅和容器暴露于Cl2以去除暴露的氮化硅，同时不从容器中去除至少大部分的金属氮化物。在随后的处理中，容器可以并入电容器中。

10. 发明授权

US07329576B2 Double-sided container capacitors using a sacrificial layer 有权
标题翻译：双面容器电容器采用牺牲层
公开(公告)号：US07329576B2
公开(公告)日：2008-02-12
申请号：US11021639
申请日：2004-12-22
申请人： Gurtej S. Sandhu , Kevin R. Shea , Chris W. Hill , Kevin J. Torek
发明人： Gurtej S. Sandhu , Kevin R. Shea , Chris W. Hill , Kevin J. Torek
IPC分类号： H01L21/8242
CPC分类号： H01L28/91 , H01L27/10852
摘要： Double-sided container capacitors are formed using sacrificial layers. A sacrificial layer is formed within a recess in a structural layer. A lower electrode is formed within the recess. The sacrificial layer is removed to create a space to allow access to the sides of the structural layer. The structural layer is removed, creating an isolated lower electrode. The lower electrode can be covered with a capacitor dielectric and upper electrode to form a double-sided container capacitor.
摘要翻译：使用牺牲层形成双面容器电容器。在结构层的凹部内形成牺牲层。下部电极形成在凹部内。去除牺牲层以产生允许接近结构层的侧面的空间。去除结构层，形成隔离的下电极。下电极可以用电容器电介质和上电极覆盖以形成双面容器电容器。

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