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1. 发明申请

US20080258198A1 STABILIZATION OF FLATBAND VOLTAGES AND THRESHOLD VOLTAGES IN HAFNIUM OXIDE BASED SILICON TRANSISTORS FOR CMOS 审中-公开
标题翻译：用于CMOS的基于氧化铝的硅晶体管中的平坦电压稳压和阈值电压稳定
公开(公告)号：US20080258198A1
公开(公告)日：2008-10-23
申请号：US12166690
申请日：2008-07-02
申请人： Nestor A. Bojarczuk , Michael P. Chudzik , Matthew W. Copel , Supratik Guha , Rajarao Jammy , Vijay Narayanan , Vamsi K. Paruchuri
发明人： Nestor A. Bojarczuk , Michael P. Chudzik , Matthew W. Copel , Supratik Guha , Rajarao Jammy , Vijay Narayanan , Vamsi K. Paruchuri
IPC分类号： H01L29/76
CPC分类号： H01L21/28167 , H01L21/28185 , H01L21/28194 , H01L29/4966 , H01L29/517
摘要： The present invention provides a metal stack structure that stabilizes the flatband voltage and threshold voltages of material stacks that include a Si-containing conductor and a Hf-based dielectric. This present invention stabilizes the flatband voltages and the threshold voltages by introducing a rare earth metal-containing layer into the material stack that introduces, via electronegativity differences, a shift in the threshold voltage to the desired voltage. Specifically, the present invention provides a metal stack comprising: a hafnium-based dielectric; a rare earth metal-containing layer located atop of, or within, said hafnium-based dielectric; an electrically conductive capping layer located above said hafnium-based dielectric; and a Si-containing conductor.
摘要翻译：本发明提供一种金属堆叠结构，其稳定包括含Si导体和Hf基电介质的材料堆叠的平带电压和阈值电压。本发明通过将含稀土金属的层引入材料堆中来稳定平带电压和阈值电压，其通过电负性差异将阈值电压的偏移引入期望的电压。具体地说，本发明提供了一种金属叠层，包括：铪基电介质; 位于所述铪基电介质的顶部或内部的含稀土金属的层; 位于所述铪基电介质上方的导电覆盖层; 和含Si导体。

2. 发明授权

US08518766B2 Method of forming switching device having a molybdenum oxynitride metal gate 有权
标题翻译：形成具有氮氧化钼金属栅极的开关器件的方法
公开(公告)号：US08518766B2
公开(公告)日：2013-08-27
申请号：US13536366
申请日：2012-06-28
申请人： Nestor A. Bojarczuk , Michael P. Chudzik , Matthew W. Copel , Supratik Guha , Richard A. Haight , Vijay Narayanan , Martin P. O'Boyle , Vamsi K. Paruchuri
发明人： Nestor A. Bojarczuk , Michael P. Chudzik , Matthew W. Copel , Supratik Guha , Richard A. Haight , Vijay Narayanan , Martin P. O'Boyle , Vamsi K. Paruchuri
IPC分类号： H01L21/336 , H01L21/8234 , H01L21/3205 , H01L21/4763 , H01L21/70
CPC分类号： H01L21/28088 , H01L29/4966 , H01L29/51
摘要： A field effect transistor (FET) includes a body region and a source region disposed at least partially in the body region. The FET also includes a drain region disposed at least partially in the body region and a molybdenum oxynitride (MoNO) gate. The FET also includes a dielectric having a high dielectric constant (k) disposed between the body region and the MoNO gate.
摘要翻译：场效应晶体管（FET）包括至少部分地设置在身体区域中的体区和源区。 FET还包括至少部分地设置在体区中的漏极区域和氮氧化钼（MoNO）栅极。 FET还包括具有高介电常数（k）的电介质，其布置在体区和MoNO门之间。

3. 发明申请

US20120270385A1 SWITCHING DEVICE HAVING A MOLYBDENUM OXYNITRIDE METAL GATE 有权
标题翻译：具有氧化亚铁金属栅的切换装置
公开(公告)号：US20120270385A1
公开(公告)日：2012-10-25
申请号：US13536366
申请日：2012-06-28
申请人： Nestor A. Bojarczuk , Michael P. Chudzik , Matthew W. Copel , Supratik Guha , Richard A. Haight , Vijay Narayanan , Martin P. O'Boyle , Vamsi K. Paruchuri
发明人： Nestor A. Bojarczuk , Michael P. Chudzik , Matthew W. Copel , Supratik Guha , Richard A. Haight , Vijay Narayanan , Martin P. O'Boyle , Vamsi K. Paruchuri
IPC分类号： H01L21/28
CPC分类号： H01L21/28088 , H01L29/4966 , H01L29/51
摘要： A field effect transistor (FET) includes a body region and a source region disposed at least partially in the body region. The FET also includes a drain region disposed at least partially in the body region and a molybdenum oxynitride (MoNO) gate. The FET also includes a dielectric having a high dielectric constant (k) disposed between the body region and the MoNO gate.
摘要翻译：场效应晶体管（FET）包括至少部分地设置在身体区域中的体区和源区。 FET还包括至少部分地设置在体区中的漏极区域和氮氧化钼（MoNO）栅极。 FET还包括具有高介电常数（k）的电介质，其布置在体区和MoNO门之间。

4. 发明申请

US20110042759A1 SWITCHING DEVICE HAVING A MOLYBDENUM OXYNITRIDE METAL GATE 审中-公开
标题翻译：具有氧化亚铁金属栅的切换装置
公开(公告)号：US20110042759A1
公开(公告)日：2011-02-24
申请号：US12545343
申请日：2009-08-21
申请人： Nestor A. Bojarczuk , Michael P. Chudzik , Matthew W. Copel , Supratik Guha , Richard A. Haight , Vijay Narayanan , Martin P. O'Boyle , Vamsi K. Paruchuri
发明人： Nestor A. Bojarczuk , Michael P. Chudzik , Matthew W. Copel , Supratik Guha , Richard A. Haight , Vijay Narayanan , Martin P. O'Boyle , Vamsi K. Paruchuri
IPC分类号： H01L29/792 , H01L21/336
CPC分类号： H01L21/28088 , H01L29/4966 , H01L29/51
摘要： A field effect transistor (FET) includes a body region and a source region disposed at least partially in the body region. The FET also includes a drain region disposed at least partially in the body region and a molybdenum oxynitride (MoNO) gate. The FET also includes a dielectric having a high dielectric constant (k) disposed between the body region and the MoNO gate.
摘要翻译：场效应晶体管（FET）包括至少部分地设置在身体区域中的体区和源区。 FET还包括至少部分地设置在体区中的漏极区域和氮氧化钼（MoNO）栅极。 FET还包括具有高介电常数（k）的电介质，其布置在体区和MoNO门之间。

5. 发明申请

US20140034118A1 THIN FILM SOLAR CELLS 有权
标题翻译：薄膜太阳能电池
公开(公告)号：US20140034118A1
公开(公告)日：2014-02-06
申请号：US13567407
申请日：2012-08-06
申请人： Nestor A. Bojarczuk , Keith E. Fogel , Supratik Guha , Byungha Shin
发明人： Nestor A. Bojarczuk , Keith E. Fogel , Supratik Guha , Byungha Shin
IPC分类号： H01L31/076
CPC分类号： H01L31/0326 , H01L31/022466 , H01L31/022475 , H01L31/022483 , H01L31/0392 , H01L31/03925 , H01L31/03926 , H01L31/072 , H01L31/073 , H01L31/1896 , Y02E10/50 , Y02E10/543 , Y02P70/521
摘要： Embodiments relate to a solar cell apparatus including a molybdenum (Mo) contact layer and an annealed absorber layer including zinc and sulfur directly adjacent to the Mo contact layer. The apparatus has no molybdenum disulfide (MoS2) layer located between the Mo contact layer and the annealed absorber layer. The apparatus further includes a buffer layer adjacent to the annealed absorber layer.
摘要翻译：实施例涉及包括钼（Mo）接触层和包含与Mo接触层直接相邻的锌和硫的退火吸收体层的太阳能电池装置。该装置在Mo接触层和退火的吸收层之间没有二硫化钼（MoS2）层。该装置还包括与退火的吸收层相邻的缓冲层。

6. 发明授权

US08987590B2 Thin film solar cells 有权
标题翻译：薄膜太阳能电池
公开(公告)号：US08987590B2
公开(公告)日：2015-03-24
申请号：US13564244
申请日：2012-08-01
申请人： Nestor A. Bojarczuk , Keith E. Fogel , Supratik Guha , Byungha Shin
发明人： Nestor A. Bojarczuk , Keith E. Fogel , Supratik Guha , Byungha Shin
IPC分类号： H01L31/00 , H01L31/0224 , H01L31/032 , H01L31/0392 , H01L31/073
CPC分类号： H01L31/0326 , H01L31/022466 , H01L31/022475 , H01L31/022483 , H01L31/0392 , H01L31/03925 , H01L31/03926 , H01L31/072 , H01L31/073 , H01L31/1896 , Y02E10/50 , Y02E10/543 , Y02P70/521
摘要： Embodiments relate to a method including forming a layer of copper zinc tin sulfide (CZTS) on a first layer of molybdenum (Mo) and annealing the CZTS layer and the first Mo layer to form a layer of molybdenum disulfide (MoS2) between the layer of CZTS and the first layer of Mo. The method includes forming a back contact on a first surface of the CZTS layer opposite the first Mo layer and separating the first Mo layer and the MoS2 layer from the CZTS layer to expose a second surface of the CZTS layer opposite the first surface. The method further includes forming a buffer layer on the second surface of the CZTS layer.
摘要翻译：实施例涉及一种方法，包括在第一钼层（Mo）上形成一层铜硫化锌（CZTS），并对CZTS层和第一Mo层进行退火，以形成一层二硫化钼（MoS2） CZTS和第一层Mo。该方法包括在与第一Mo层相对的CZTS层的第一表面上形成背接触，并将第一Mo层和MoS2层与CZTS层分离以暴露CZTS的第二表面层与第一表面相对。该方法还包括在CZTS层的第二表面上形成缓冲层。

7. 发明申请

US20120100663A1 Fabrication of CuZnSn(S,Se) Thin Film Solar Cell with Valve Controlled S and Se 审中-公开
标题翻译：具有阀控S和Se的CuZnSn（S，Se）薄膜太阳能电池的制造
公开(公告)号：US20120100663A1
公开(公告)日：2012-04-26
申请号：US12911915
申请日：2010-10-26
申请人： Nestor A. Bojarczuk , Supratik Guha , Byungha Shin , Kejia Wang
发明人： Nestor A. Bojarczuk , Supratik Guha , Byungha Shin , Kejia Wang
IPC分类号： H01L21/76
CPC分类号： H01L31/0326 , H01L31/072 , Y02E10/50
摘要： Techniques for fabricating thin film solar cells are provided. In one aspect, a method of fabricating a solar cell includes the following steps. A molybdenum (Mo)-coated substrate is provided. Absorber layer constituent components, two of which are sulfur (S) and selenium (Se), are deposited on the Mo-coated substrate. The S and Se are deposited on the Mo-coated substrate using thermal evaporation in a vapor chamber. Controlled amounts of the S and Se are introduced into the vapor chamber to regulate a ratio of the S and Se provided for deposition. The constituent components are annealed to form an absorber layer on the Mo-coated substrate. A buffer layer is formed on the absorber layer. A transparent conductive electrode is formed on the buffer layer.
摘要翻译：提供制造薄膜太阳能电池的技术。一方面，制造太阳能电池的方法包括以下步骤。提供了钼（Mo）涂覆的基材。其中两个是硫（S）和硒（Se）的吸收剂层组成成分沉积在Mo涂覆的基底上。使用蒸发室中的热蒸发将S和Se沉积在Mo涂覆的基底上。将S和Se的控制量引入蒸气室以调节用于沉积的S和Se的比例。将这些构成组分退火以在Mo涂覆的基底上形成吸收层。在吸收层上形成缓冲层。在缓冲层上形成透明导电电极。

8. 发明授权

US06210479B1 Product and process for forming a semiconductor structure on a host substrate 失效
标题翻译：用于在主机基板上形成半导体结构的产品和工艺
公开(公告)号：US06210479B1
公开(公告)日：2001-04-03
申请号：US09259128
申请日：1999-02-26
申请人： Nestor A. Bojarczuk , Supratik Guha , Arunava Gupta
发明人： Nestor A. Bojarczuk , Supratik Guha , Arunava Gupta
IPC分类号： C30B2502
CPC分类号： H01L21/2007 , H01L21/76251 , H01L33/007 , H01L33/0079 , Y10S148/093 , Y10S148/094
摘要： A process for cheaply fabricating a substantially single crystal or a polycrystalline semiconductor structure on a host substrate. The process begins by depositing a layer of wide band gap nitride material 10, such as gallium nitride, aluminum nitride and/or indium nitride, on a sapphire substrate 11. The semiconductor structure 14 is then grown on the nitride layer. Next, the host substrate 15 is attached with a bonding agent to an exposed surface area of the semiconductor structure 14. The sapphire substrate is lifted off by irradiation in which nitrogen is dissociated from the nitride layer.
摘要翻译：一种用于在主机基板上廉价制造基本单晶或多晶半导体结构的方法。该过程开始于在蓝宝石衬底11上沉积一层宽带隙氮化物材料10，例如氮化镓，氮化铝和/或氮化铟。然后在氮化物层上生长半导体结构14。接下来，将主体基板15用粘合剂附着到半导体结构体14的露出表面区域。通过氮离子从氮化物层离解的照射而剥离蓝宝石衬底。

9. 发明授权

US08680393B2 Thin film solar cells 有权
标题翻译：薄膜太阳能电池
公开(公告)号：US08680393B2
公开(公告)日：2014-03-25
申请号：US13567407
申请日：2012-08-06
申请人： Nestor A. Bojarczuk , Keith E. Fogel , Supratik Guha , Byungha Shin
发明人： Nestor A. Bojarczuk , Keith E. Fogel , Supratik Guha , Byungha Shin
IPC分类号： H01L31/00
CPC分类号： H01L31/0326 , H01L31/022466 , H01L31/022475 , H01L31/022483 , H01L31/0392 , H01L31/03925 , H01L31/03926 , H01L31/072 , H01L31/073 , H01L31/1896 , Y02E10/50 , Y02E10/543 , Y02P70/521
摘要： Embodiments relate to a solar cell apparatus including a molybdenum (Mo) contact layer and an annealed absorber layer including zinc and sulfur directly adjacent to the Mo contact layer. The apparatus has no molybdenum disulfide (MoS2) layer located between the Mo contact layer and the annealed absorber layer. The apparatus further includes a buffer layer adjacent to the annealed absorber layer.
摘要翻译：实施例涉及包括钼（Mo）接触层和包含与Mo接触层直接相邻的锌和硫的退火吸收体层的太阳能电池装置。该装置在Mo接触层和退火的吸收层之间没有二硫化钼（MoS2）层。该装置还包括与退火的吸收层相邻的缓冲层。

10. 发明申请

US20120097234A1 Using Diffusion Barrier Layer for CuZnSn(S,Se) Thin Film Solar Cell 审中-公开
标题翻译：使用CuZnSn（S，Se）薄膜太阳能电池的扩散阻挡层
公开(公告)号：US20120097234A1
公开(公告)日：2012-04-26
申请号：US12911877
申请日：2010-10-26
申请人： Nestor A. Bojarczuk , Supratik Guha , Byungha Shin , Kejia Wang
发明人： Nestor A. Bojarczuk , Supratik Guha , Byungha Shin , Kejia Wang
IPC分类号： H01L31/0224
CPC分类号： H01L31/0326 , H01L31/022483 , H01L31/1864 , Y02E10/50 , Y02P70/521
摘要： Techniques for fabricating thin film solar cells, such as CuZnSn(S,Se) (CZTSSe) solar cells are provided. In one aspect, a method of fabricating a solar cell is provided that includes the following steps. A substrate is provided. The substrate is coated with a molybdenum (Mo) layer. A stress-relief layer is deposited on the Mo layer. The stress-relief layer is coated with a diffusion barrier. Absorber layer constituent components are deposited on the diffusion barrier, wherein the constituent components comprise one or more of sulfur (S) and selenium (Se). The constituent components are annealed to form an absorber layer, wherein the stress-relief layer relieves thermal stress imposed on the absorber layer, and wherein the diffusion barrier blocks diffusion of the one or more of S and Se into the Mo layer. A buffer layer is formed on the absorber layer. A transparent conductive electrode is formed on the buffer layer.
摘要翻译：提供了诸如CuZnSn（S，Se）（CZTSSe）（CZTSSe）太阳能电池制造薄膜太阳能电池的技术。一方面，提供一种制造太阳能电池的方法，其包括以下步骤。提供基板。衬底被涂覆有钼（Mo）层。应力消除层沉积在Mo层上。应力消除层涂覆有扩散阻挡层。吸收剂层组成成分沉积在扩散阻挡层上，其中构成组分包含硫（S）和硒（Se）中的一种或多种。所述构成部件进行退火以形成吸收层，其中所述应力消除层减轻施加在所述吸收体层上的热应力，并且其中所述扩散阻挡层将所述S和Se中的一种或多种的扩散阻挡在所述Mo层中。在吸收层上形成缓冲层。在缓冲层上形成透明导电电极。

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