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1. 发明申请

US20110125935A1 DIRECT MEMORY DOWNLOAD IN A VOICE DATA AND RF INTEGRATED CIRCUIT AND METHOD FOR USE THEREWITH 有权
标题翻译：语音数据和RF集成电路中的直接存储器下载及其使用方法
公开(公告)号：US20110125935A1
公开(公告)日：2011-05-26
申请号：US13015955
申请日：2011-01-28
申请人： Nelson R. Sollenberger , Weidong Li
发明人： Nelson R. Sollenberger , Weidong Li
IPC分类号： G06F13/28 , H04W4/18 , G06F12/00
CPC分类号： H04M1/253 , H04L67/06 , H04M1/72522 , H04M2250/02 , H04M2250/06 , H04W28/14
摘要： A voice data and RF integrated circuit (IC) includes an RF transceiver module that produces received data based on a received RF signal and that produces a transmitted RF signal based on transmit data. A memory module includes a first read only memory (ROM) segment for storing a first plurality of operational instructions, and a first random access memory (RAM) segment for storing a second plurality of operational instructions. A first processing module executes the plurality of operational instructions that include baseband processing to generate input data from the received data, and to produce the transmit data from input data. A first memory interface provides direct downloading of the second plurality of operational instructions from the external memory to the first RAM segment.
摘要翻译：语音数据和RF集成电路（IC）包括RF收发器模块，其基于接收的RF信号产生接收的数据，并且基于发送数据产生发送的RF信号。存储器模块包括用于存储第一多个操作指令的第一只读存储器（ROM）段和用于存储第二多个操作指令的第一随机存取存储器（RAM）段。第一处理模块执行包括基带处理的多个操作指令，以从接收到的数据生成输入数据，并从输入数据产生发送数据。第一存储器接口提供将第二多个操作指令从外部存储器直接下载到第一RAM段。

2. 发明授权

US08249575B2 Direct memory download in a voice data and RF integrated circuit and method for use therewith 有权
标题翻译：在语音数据和RF集成电路中直接存储下载和与其一起使用的方法
公开(公告)号：US08249575B2
公开(公告)日：2012-08-21
申请号：US13015955
申请日：2011-01-28
申请人： Nelson R. Sollenberger , Weidong Li
发明人： Nelson R. Sollenberger , Weidong Li
IPC分类号： H04M1/00 , G06F13/28
CPC分类号： H04M1/253 , H04L67/06 , H04M1/72522 , H04M2250/02 , H04M2250/06 , H04W28/14
摘要： A voice data and RF integrated circuit (IC) includes an RF transceiver module that produces received data based on a received RF signal and that produces a transmitted RF signal based on transmit data. A memory module includes a first read only memory (ROM) segment for storing a first plurality of operational instructions, and a first random access memory (RAM) segment for storing a second plurality of operational instructions. A first processing module executes the plurality of operational instructions that include baseband processing to generate input data from the received data, and to produce the transmit data from input data. A first memory interface provides direct downloading of the second plurality of operational instructions from the external memory to the first RAM segment.
摘要翻译：语音数据和RF集成电路（IC）包括RF收发器模块，其基于接收的RF信号产生接收的数据，并且基于发送数据产生发送的RF信号。存储器模块包括用于存储第一多个操作指令的第一只读存储器（ROM）段和用于存储第二多个操作指令的第一随机存取存储器（RAM）段。第一处理模块执行包括基带处理的多个操作指令，以从接收到的数据生成输入数据，并从输入数据产生发送数据。第一存储器接口提供将第二多个操作指令从外部存储器直接下载到第一RAM段。

3. 发明申请

US20080146186A1 On-chip baseband-to-RF interface and applications thereof 有权
标题翻译：片上基带到RF接口及其应用
公开(公告)号：US20080146186A1
公开(公告)日：2008-06-19
申请号：US11641915
申请日：2006-12-19
申请人： Ahmadreza (Reza) Rofougaran , Maryam Rofougaran , Vafa James Rakshani , Claude G. Hayek , Frederic Christian Marc Hayem , Hooman Darabi , Nelson R. Sollenberger , Weidong Li
发明人： Ahmadreza (Reza) Rofougaran , Maryam Rofougaran , Vafa James Rakshani , Claude G. Hayek , Frederic Christian Marc Hayem , Hooman Darabi , Nelson R. Sollenberger , Weidong Li
IPC分类号： H04B1/28
CPC分类号： H04B1/3833 , H04B1/406 , H04W4/18
摘要： An on-chip baseband-to-RF interface includes a receive/transmit section, a control section, and a clock section. The receive/transmit section, when in a receive mode, provides the stream of inbound symbols from the RF circuit to the baseband processing module and, when in a transmit mode, provides the stream of outbound symbols from the baseband processing module to the RF circuit. The control section provides a control communication path between the baseband processing module and the RF circuit. The clock section provides a clock communication path between the baseband processing module and the RF circuit.
摘要翻译：片上基带到RF接口包括接收/发送部分，控制部分和时钟部分。接收/发送部分处于接收模式时，将来自RF电路的入站符号流提供给基带处理模块，并且当处于发送模式时，将来自基带处理模块的出站符号流提供给RF电路。控制部分提供基带处理模块和RF电路之间的控制通信路径。时钟部分提供基带处理模块和RF电路之间的时钟通信路径。

4. 发明授权

US07917132B2 Direct memory download in a voice data and RF integrated circuit and method for use therewith 有权
标题翻译：在语音数据和RF集成电路中直接存储下载和与其一起使用的方法
公开(公告)号：US07917132B2
公开(公告)日：2011-03-29
申请号：US11706461
申请日：2007-02-15
申请人： Nelson R. Sollenberger , Weidong Li
发明人： Nelson R. Sollenberger , Weidong Li
IPC分类号： H04M1/00
CPC分类号： H04M1/253 , H04L67/06 , H04M1/72522 , H04M2250/02 , H04M2250/06 , H04W28/14
摘要： A voice data and RF integrated circuit (IC) includes an RF transceiver module that produces received data based on a received RF signal and that produces a transmitted RF signal based on transmit data. A memory module includes a first read only memory (ROM) segment for storing a first plurality of operational instructions, and a first random access memory (RAM) segment for storing a second plurality of operational instructions. A first processing module executes the plurality of operational instructions that include baseband processing to generate input data from the received data, and to produce the transmit data from input data. A first memory interface provides direct downloading of the second plurality of operational instructions from the external memory to the first RAM segment.
摘要翻译：语音数据和RF集成电路（IC）包括RF收发器模块，其基于接收的RF信号产生接收的数据，并且基于发送数据产生发送的RF信号。存储器模块包括用于存储第一多个操作指令的第一只读存储器（ROM）段和用于存储第二多个操作指令的第一随机存取存储器（RAM）段。第一处理模块执行包括基带处理的多个操作指令，以从接收到的数据生成输入数据，并从输入数据产生发送数据。第一存储器接口提供将第二多个操作指令从外部存储器直接下载到第一RAM段。

5. 发明申请

US20080146266A1 Direct memory download in a voice data and RF integrated circuit and method for use therewith 有权
标题翻译：在语音数据和RF集成电路中直接存储下载和与其一起使用的方法
公开(公告)号：US20080146266A1
公开(公告)日：2008-06-19
申请号：US11706461
申请日：2007-02-15
申请人： Nelson R. Sollenberger , Weidong Li
发明人： Nelson R. Sollenberger , Weidong Li
IPC分类号： H04M1/00
CPC分类号： H04M1/253 , H04L67/06 , H04M1/72522 , H04M2250/02 , H04M2250/06 , H04W28/14
摘要： A voice data and RF integrated circuit (IC) includes an RF transceiver module that produces received data based on a received RF signal and that produces a transmitted RF signal based on transmit data. A memory module includes a first read only memory (ROM) segment for storing a first plurality of operational instructions, and a first random access memory (RAM) segment for storing a second plurality of operational instructions. A first processing module executes the plurality of operational instructions that include baseband processing to generate input data from the received data, and to produce the transmit data from input data. A first memory interface provides direct downloading of the second plurality of operational instructions from the external memory to the first RAM segment.
摘要翻译：语音数据和RF集成电路（IC）包括RF收发器模块，其基于接收的RF信号产生接收的数据，并且基于发送数据产生发送的RF信号。存储器模块包括用于存储第一多个操作指令的第一只读存储器（ROM）段和用于存储第二多个操作指令的第一随机存取存储器（RAM）段。第一处理模块执行包括基带处理的多个操作指令，以从接收到的数据生成输入数据，并从输入数据产生发送数据。第一存储器接口提供将第二多个操作指令从外部存储器直接下载到第一RAM段。

6. 发明授权

US07596356B2 On-chip baseband-to-RF interface and applications thereof 有权
标题翻译：片上基带到RF接口及其应用
公开(公告)号：US07596356B2
公开(公告)日：2009-09-29
申请号：US11641915
申请日：2006-12-19
申请人： Ahmadreza (Reza) Rofougaran , Maryam Rofougaran , Vafa James Rakshani , Claude G. Hayek , Frederic Christian Marc Hayem , Hooman Darabi , Nelson R. Sollenberger , Weidong Li
发明人： Ahmadreza (Reza) Rofougaran , Maryam Rofougaran , Vafa James Rakshani , Claude G. Hayek , Frederic Christian Marc Hayem , Hooman Darabi , Nelson R. Sollenberger , Weidong Li
IPC分类号： H04B1/40
CPC分类号： H04B1/3833 , H04B1/406 , H04W4/18
摘要： An on-chip baseband-to-RF interface includes a receive/transmit section, a control section, and a clock section. The receive/transmit section, when in a receive mode, provides the stream of inbound symbols from the RF circuit to the baseband processing module and, when in a transmit mode, provides the stream of outbound symbols from the baseband processing module to the RF circuit. The control section provides a control communication path between the baseband processing module and the RF circuit. The clock section provides a clock communication path between the baseband processing module and the RF circuit.
摘要翻译：片上基带到RF接口包括接收/发送部分，控制部分和时钟部分。接收/发送部分处于接收模式时，将来自RF电路的入站符号流提供给基带处理模块，并且当处于发送模式时，将来自基带处理模块的出站符号流提供给RF电路。控制部分提供基带处理模块和RF电路之间的控制通信路径。时钟部分提供基带处理模块和RF电路之间的时钟通信路径。

7. 发明授权

US09746576B2 Wettability estimation using magnetic resonance 有权
公开(公告)号：US09746576B2
公开(公告)日：2017-08-29
申请号：US14287834
申请日：2014-05-27
申请人： Segun A. Jebutu , Weidong Li
发明人： Segun A. Jebutu , Weidong Li
IPC分类号： G01V3/00 , G01V3/32 , E21B49/00
CPC分类号： G01V3/32 , E21B49/00
摘要： A method of estimating a wettability characteristic of a formation includes: disposing a magnetic resonance (MR) measurement apparatus in a borehole; generating a low gradient static magnetic field and an oscillating magnetic field in a region of the formation; detecting a MR signal generated in the region; calculating relaxation parameters for at least one fluid in the region; and estimating the wettability characteristic of the region based on the relaxation parameters.

8. 发明申请

US20130189831A1 SILICON/GERMANIUM NANOPARTICLE INKS AND METHODS OF FORMING INKS WITH DESIRED PRINTING PROPERTIES 审中-公开
标题翻译：硅/锗纳米油墨和形成具有所需印刷性能的墨水的方法
公开(公告)号：US20130189831A1
公开(公告)日：2013-07-25
申请号：US13353645
申请日：2012-01-19
申请人： Weidong Li , Gina Elizabeth Pengra-Leung , Uma Srinivasan , Shivkumar Chiruvolu , Masaya Soeda , Guojon Liu
发明人： Weidong Li , Gina Elizabeth Pengra-Leung , Uma Srinivasan , Shivkumar Chiruvolu , Masaya Soeda , Guojon Liu
IPC分类号： H01L21/20 , H01B1/04 , H01B1/02 , B82Y40/00 , B82Y30/00
CPC分类号： H01L21/02381 , B82Y30/00 , H01L21/02488 , H01L21/02532 , H01L21/02601 , H01L21/02628
摘要： Improved silicon/germanium nanoparticle inks are described that have silicon/germanium nanoparticles well distributed within a stable dispersion. In particular the inks are formulated with a centrifugation step to remove contaminants as well as less well dispersed portions of the dispersion. A sonication step can be used after the centrifugation, which is observed to result in a synergistic improvement to the quality of some of the inks. The silicon/germanium ink properties can be engineered for particular deposition applications, such as spin coating or screen printing. Appropriate processing methods are described to provide flexibility for ink designs without surface modifying the silicon/germanium nanoparticles. The silicon/germanium nanoparticles are well suited for forming semiconductor components, such as components for thin film transistors or solar cell contacts.
摘要翻译：描述了改进的硅/锗纳米颗粒油墨，其具有良好分布在稳定分散体内的硅/锗纳米颗粒。特别地，油墨通过离心步骤配制以除去分散体中的污染物以及较不良好分散的部分。在离心之后可以使用超声处理步骤，这被观察到导致对一些油墨的质量的协同改进。可以为特定的沉积应用（例如旋涂或丝网印刷）设计硅/锗油墨性质。描述适当的处理方法以提供油墨设计的灵活性，而不对硅/锗纳米颗粒进行表面改性。硅/锗纳米颗粒非常适合于形成诸如用于薄膜晶体管或太阳能电池触点的部件的半导体部件。

9. 发明申请

US20120283323A1 Treating Learning Deficits with Inhibitors of HMG CoA Reductase 审中-公开
标题翻译：用HMG CoA还原酶抑制剂治疗学习缺陷
公开(公告)号：US20120283323A1
公开(公告)日：2012-11-08
申请号：US13517773
申请日：2012-06-14
申请人： Alcino Silva , Yijun Cui , Weidong Li , Steven A. Kushner
发明人： Alcino Silva , Yijun Cui , Weidong Li , Steven A. Kushner
IPC分类号： A61K31/366 , A61P25/00
CPC分类号： A61K31/366
摘要： The disclosure provides methods of treating cognitive disorders by administering a HMG CoA reductase inhibitor. Cognitive deficits treatable with the inhibitor compound include those associated with Angelman Syndrome, Neurofibromatosis-1, certain forms of X-linked mental retardation, tuberous sclerosis, Down Syndrome, autism, and attention deficit/hyperactivity disorder.
摘要翻译：本公开提供了通过施用HMG CoA还原酶抑制剂治疗认知障碍的方法。用抑制剂化合物治疗的认知缺陷包括与Angelman综合征，神经纤维瘤病1，某些形式的X连锁智力迟钝，结节性硬化症，唐氏综合征，孤独症和注意力缺陷/多动障碍相关的缺陷。

10. 发明申请

US20090067479A1 Processing Received Digital Data Signals based on a Received Digital Data Format 失效
标题翻译：基于收到的数字数据格式处理接收到的数字数据信号
公开(公告)号：US20090067479A1
公开(公告)日：2009-03-12
申请号：US12267393
申请日：2008-11-07
申请人： Weidong Li
发明人： Weidong Li
IPC分类号： H04B1/38 , H04L27/06
CPC分类号： H04B1/406
摘要： An integrated circuit radio receiver includes radio frequency (“RF”) front end circuitry for receiving and transmitting digital data received through a wireless interface. A baseband processor is operable to process the digital data received through the wireless interface. A plurality of digital filtering logic is included wherein each digital filtering logic includes a level of digital filtering based upon a received digital data signal format. The integrated circuit radio receiver includes logic that is operable to select between each digital filtering logic of the plurality of digital filtering logic based upon the received digital data signal format to process the digital data received through the wireless interface with the selected level of digital filtering.
摘要翻译：集成电路无线电接收机包括用于接收和发送通过无线接口接收的数字数据的射频（“RF”）前端电路。基带处理器可操作以处理通过无线接口接收的数字数据。包括多个数字滤波逻辑，其中每个数字滤波逻辑包括基于所接收的数字数据信号格式的数字滤波电平。集成电路无线电接收机包括逻辑，其可操作以基于所接收的数字数据信号格式在多个数字滤波逻辑的每个数字滤波逻辑之间进行选择，以处理通过无线接口接收的数字数据与所选择的数字滤波电平。

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