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1. 发明专利

JP2011210750A Field effect transistor, method of manufacturing field effect transistor, and electronic device 审中-公开
标题翻译：场效应晶体管，制造场效应晶体管的方法和电子器件
公开(公告)号：JP2011210750A
公开(公告)日：2011-10-20
申请号：JP2010073878
申请日：2010-03-26
申请人： Nec Corp , 日本電気株式会社
发明人： INOUE TAKASHI , ANDO YUJI , NAKAYAMA TATSUO , OTA KAZUKI , OKAMOTO YASUHIRO , ENDO KAZUTOMI
IPC分类号： H01L21/338 , H01L29/778 , H01L29/78 , H01L29/812
摘要： PROBLEM TO BE SOLVED: To provide a field effect transistor which attains a high threshold voltage and low ON resistance, and in which parallel conduction is suppressed.SOLUTION: The field effect transistor has a buffer layer 602 of group III nitride, a channel layer 603, a barrier layer 605 and a cap layer 606 which are laminated in this order on a substrate 601. An upper surface of each semiconductor layer is a group III atom surface perpendicular to a (0001) crystal axis, the buffer layer 602 is lattice-relaxed, and the barrier layer 605 has tensile strain and the channel layer 603 and cap layer 606 have compressive strain, or the channel layer 603 is lattice-relaxed and the cap layer 606 has tensile strain. The cap layer 606, a gate insulating film 607 and a gate electrode 608 are laminated in this order in a part of a region on the barrier layer 605, and a source electrode 609 and a drain electrode 610 are formed in the other region.
摘要翻译：要解决的问题：提供达到高阈值电压和低导通电阻的场效应晶体管，并且其中平行导通被抑制。解决方案：场效应晶体管具有III族氮化物的缓冲层602，沟道层603 ，阻挡层605和覆盖层606依次层叠在基板601上。每个半导体层的上表面是垂直于（0001）晶轴的III族原子表面，缓冲层602是晶格 - 并且阻挡层605具有拉伸应变，并且沟道层603和覆盖层606具有压缩应变，或者沟道层603是晶格弛豫的并且覆盖层606具有拉伸应变。盖层606，栅极绝缘膜607和栅电极608依次层叠在阻挡层605的一部分区域中，在另一区域形成源电极609和漏电极610。

2. 发明专利

JP2005183551A Semiconductor device, field effect transistor, and method for manufacturing same 审中-公开
标题翻译：半导体器件，场效应晶体管及其制造方法
公开(公告)号：JP2005183551A
公开(公告)日：2005-07-07
申请号：JP2003420001
申请日：2003-12-17
申请人： Nec Corp , 日本電気株式会社
发明人： OTA KAZUKI , KAWANAKA MASAFUMI
IPC分类号： H01L29/812 , H01L21/338 , H01L29/778
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device wherein gate leakage current reduction and element voltage resistance improvement are achieved without an increase in parasitic resistance.
SOLUTION: A buffer layer 102, a channel layer 103, an electron supply layer 104, a barrier layer 105, and a cap layer 106 are successively laminated on a substrate 101; and a gate electrode 108 is formed on the cap layer 106. The electron supply layer 104 is constituted of AlGaN, and is lower than the buffer layer 102 in a-axis lattice constant and lower than the channel layer 103 in electron affinity. The barrier layer 105 is constituted of AlN, and is lower than the electron supply layer 104 in electron affinity. The cap layer 106 roughly matches the buffer 102 in a-axis lattice constant, and is constituted of GaN wherein the AlN mixed crystal ratio is lower than in the barrier layer 105. The barrier layer 105 is formed by wet etching.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供一种在不增加寄生电阻的情况下实现栅极泄漏电流降低和元件电压电阻改善的半导体器件。解决方案：缓冲层102，沟道层103，电子供给层104，势垒层105和覆盖层106依次层压在基板101上; 并且栅极电极108形成在盖层106上。电子供给层104由AlGaN构成，并且比电子亲和性的a轴晶格常数低于沟道层103的缓冲层102低。阻挡层105由AlN构成，并且以电子亲和力低于电子供给层104。盖层106大致与缓冲器102匹配为a轴晶格常数，并且由AlN混合晶体比低于阻挡层105的GaN构成。阻挡层105通过湿蚀刻形成。版权所有（C）2005，JPO＆NCIPI

3. 发明专利

JP2008141040A Field effect transistor and method of manufacturing the same 有权
标题翻译：场效应晶体管及其制造方法
公开(公告)号：JP2008141040A
公开(公告)日：2008-06-19
申请号：JP2006326785
申请日：2006-12-04
申请人： Nec Corp , 日本電気株式会社
发明人： OTA KAZUKI
IPC分类号： H01L21/338 , H01L21/28 , H01L29/778 , H01L29/78 , H01L29/812
摘要： PROBLEM TO BE SOLVED: To provide an enhancement (normally-off) type field effect transistor using a nitride semiconductor which has a structure to obtain a low ON resistance, and to provide a method of manufacturing the same. SOLUTION: A contact layer 105 which consists of AlGaN whose Al composition is equal or larger than that of an AlGaN electron supply layer 104, is doped with n-type impurities at 2×10 19 cm -3 or more and is thick in the range of 2 to 10 nm is provided on an AlGaN electron supply layer 104. The transistor has: a first recess 110 formed by removing the contact layer 105 by etching in a part between a source electrode 106 and a drain electrode 107; and a second recess 112 formed by thinning the electron supply layer 104 in a part inside the first recess. A gate insulating film 113 and a T-type gate electrode 108 are put inside of the second recess while leaving no space, and an ohmic auxiliary electrode 114 is formed on the contact layer 105 adjacent to the T-type gate electrode 108 to self-align by using a step formed by the insulating film 109 under an umbrella of the T-type gate electrode 108. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供具有获得低导通电阻的结构的氮化物半导体的增强（常关）型场效应晶体管，并提供其制造方法。解决方案：由Al组分等于或大于AlGaN电子供应层104的AlGaN构成的接触层105掺杂有2×10 14 SPC的n型杂质在AlGaN电子供给层104上设置有在2〜10nm范围内的厚度 -3 以上的厚度。晶体管具有：通过蚀刻去除接触层105而形成的第一凹部110 源电极106和漏电极107之间的部分; 以及通过在第一凹部内的部分中使电子供给层104变薄而形成的第二凹部112。栅极绝缘膜113和T型栅电极108放置在第二凹槽的内部而不留空间，并且在与T型栅电极108相邻的接触层105上形成欧姆辅助电极114，通过使用在T型栅极108的伞下由绝缘膜109形成的台阶对准。版权所有（C）2008，JPO＆INPIT

4. 发明专利

JP2007123304A Field effect transistor 有权
标题翻译：场效应晶体管
公开(公告)号：JP2007123304A
公开(公告)日：2007-05-17
申请号：JP2005309350
申请日：2005-10-25
申请人： Nec Corp , 日本電気株式会社
发明人： OTA KAZUKI , MIYAMOTO HIRONOBU , MATSUNAGA TAKAHARU , ANDO YUJI , INOUE TAKASHI , KURODA NAOTAKA , OKAMOTO YASUHIRO , NAKAYAMA TATSUO , WAKEJIMA AKIO , TANOMURA MASAHIRO , MURASE YASUHIRO
IPC分类号： H01L27/095 , H01L21/338 , H01L29/812
摘要： PROBLEM TO BE SOLVED: To provide a field effect transistor (FET) having an interdigital electrode structure in which uniformity of operation is enhanced by reducing temperature distribution in the direction parallel with a gate electrode and between different unit field effect transistors, and excellent high frequency characteristics and reliability are attained.
SOLUTION: The field effect transistor (FET) includes a plurality of gate electrodes arranged in parallel in one region on a substrate, a conductive active region provided in the one region, and a nonconductive region provided at the central portion in the extending direction of the gate electrode in the active region. The ratio occupied by the nonconductive region in the extending direction of the gate electrode to each gate electrode is larger at the central portion than at the end portion in the arranging direction of the gate electrode.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：解决的问题：提供一种具有叉指式电极结构的场效应晶体管（FET），通过减小与栅极电极和不同单位场效应晶体管之间的平行方向的温度分布，提高了工作均匀性，以及实现了优异的高频特性和可靠性。解决方案：场效应晶体管（FET）包括在基板上的一个区域中并联布置的多个栅极电极，设置在该区域中的导电有源区域和设置在延伸部分的中心部分处的非导电区域在活性区域中的栅电极的方向。在栅极电极的排列方向上的端部处，中心部分处的栅电极延伸方向上的非导电区域所占的比例大于栅电极的排列方向。版权所有（C）2007，JPO＆INPIT

5. 发明专利

JP2011210752A Semiconductor device, electronic device, method of manufacturing semiconductor device, and method of operating semiconductor device 有权
标题翻译：半导体器件，电子器件，制造半导体器件的方法和操作半导体器件的方法
公开(公告)号：JP2011210752A
公开(公告)日：2011-10-20
申请号：JP2010073900
申请日：2010-03-26
申请人： Nec Corp , 日本電気株式会社
发明人： OTA KAZUKI , ANDO YUJI , INOUE TAKASHI , OKAMOTO YASUHIRO , NAKAYAMA TATSUO , ENDO KAZUTOMI
IPC分类号： H01L29/06 , H01L21/329 , H01L21/338 , H01L29/41 , H01L29/47 , H01L29/778 , H01L29/78 , H01L29/812 , H01L29/861 , H01L29/872
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device that relaxes electric field concentration to ensure a high breakdown voltage.SOLUTION: The semiconductor device is constituted so that on a semiconductor layer, first field plates FA are arranged on a first insulating film mutually at intervals between a first electrode 102 and a second electrode 103, and second field plates FB are arranged on a second insulating film mutually at intervals from above the first electrode 102 to above the second electrode 103, wherein FBs at first electrode- and second electrode-side ends each overlap with the first electrode or second electrode and an FA adjoining it, one-side FAs or FBs other than the FBs at the first electrode- and second electrode-side ends overlap with a plurality of the other-side FAs or FBs adjoining in a direction perpendicular to a direction from the first electrode to the second electrode, and the other-side FAs or FBs other than the FBs at the first electrode- and second electrode-side ends overlap with one of two FAs or FBs adjoining in the direction from the first electrode to the second electrode.
摘要翻译：要解决的问题：提供一种放宽电场浓度以确保高的击穿电压的半导体器件。解决方案：半导体器件被构造成使得在半导体层上，第一场板FA以间隔相互间隔布置在第一绝缘膜上第一电极102和第二电极103之间的第二电极和第二电极侧的第二电极侧的第二电极侧的第二电极和第二电极103之间的间隔设置在第二绝缘膜上，与第一电极或第二电极以及与其相邻的FA结束，与第一电极侧和第二电极侧端部的FB以外的一侧的FA或FB相邻，与邻接的多个另一侧的FAAs或FB重叠在垂直于从第一电极到第二电极的方向的方向上，以及在第一电极处的除FB之外的另一侧的FA或FB 电极侧端部与从第一电极到第二电极的方向相邻的两个FAAs或FB中的一个重叠。

6. 发明专利

JP2011210751A Group iii nitride semiconductor element, method of manufacturing group iii nitride semiconductor element, and electronic device 审中-公开
标题翻译： III族氮化物半导体元件，制造III族氮化物半导体元件的方法和电子器件
公开(公告)号：JP2011210751A
公开(公告)日：2011-10-20
申请号：JP2010073891
申请日：2010-03-26
申请人： Nec Corp , 日本電気株式会社
发明人： INOUE TAKASHI , NAKAYAMA TATSUO , OTA KAZUKI , ENDO KAZUTOMI , OKAMOTO YASUHIRO , ANDO YUJI
IPC分类号： H01L21/338 , H01L29/417 , H01L29/778 , H01L29/812
摘要： PROBLEM TO BE SOLVED: To provide a group III nitride semiconductor element that has low access resistance and ON resistance, a method of manufacturing the group III nitride semiconductor element, and an electronic device.SOLUTION: In the group III nitride semiconductor, a barrier layer 902 is formed having a heterojunction over a channel layer 901; a part of an upper part of the channel layer 901 and the barrier 902 above thereof are removed to form a recess; an n-type conductive layer region 904 is formed at a part of the channel layer 901 and barrier layer 902; the n-type conductive layer region 904 includes a surface of the recess, and has a depth Tof the n-type conductive layer region 904 of ≥15 nm in terms of measured value from each part of a surface of the n-type conductive layer region 904 in a direction perpendicular to the surface; and ohmic electrodes 906 and 907 are in ohmic contact with the n-type conductive layer region through the surface of the recess.
摘要翻译：要解决的问题：提供具有低访问阻抗和导通电阻的III族氮化物半导体元件，制造III族氮化物半导体元件的方法和电子器件。解决方案：在III族氮化物半导体中，阻挡层 902形成在沟道层901上具有异质结; 去除沟道层901的上部的一部分和其上方的势垒902以形成凹部; 在沟道层901和阻挡层902的一部分上形成n型导电层区域904; n型导电层区域904包括凹部的表面，并且从n型导电层的表面的每个部分的测量值来看，具有≥15nm的n型导电层区域904的深度Tof 区域904在垂直于表面的方向上; 并且欧姆电极906和907通过凹槽的表面与n型导电层区域欧姆接触。

7. 发明专利

JP2011151155A Field effect transistor, electronic device, and field effect transistor manufacturing method and using method 有权
标题翻译：场效应晶体管，电子器件和场效应晶体管的制造方法和使用方法
公开(公告)号：JP2011151155A
公开(公告)日：2011-08-04
申请号：JP2010010539
申请日：2010-01-20
申请人： Nec Corp , 日本電気株式会社
发明人： NAKAYAMA TATSUO , ANDO YUJI , OKAMOTO YASUHIRO , INOUE TAKASHI , OTA KAZUKI , ENDO KAZUTOMI
IPC分类号： H01L21/338 , H01L21/28 , H01L21/822 , H01L21/8232 , H01L21/8234 , H01L27/04 , H01L27/06 , H01L27/088 , H01L27/095 , H01L29/41 , H01L29/778 , H01L29/78 , H01L29/786 , H01L29/812
摘要： PROBLEM TO BE SOLVED: To provide a field effect transistor not broken regardless of application of overvoltage and overcurrent without over-increasing the chip area. SOLUTION: In the field effect transistor, a gate electrode 110, a drain electrode 109, a source electrode 108, and a protection diode (a protection diode electrode) 111 are disposed on a semiconductor layer. The drain electrode 109 is formed to surround a part or the entire of the surrounding of the protection diode 111, or a plurality of drain electrodes 109 are provided and formed such that the protection diode 111 is disposed between at least a pair of drain electrodes of the plurality of drain electrodes 109. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：提供不损坏过电压和过电流而不会过度增加芯片面积的场效应晶体管不破坏。解决方案：在场效应晶体管中，在半导体层上设置栅电极110，漏电极109，源电极108和保护二极管（保护二极管电极）111。漏电极109形成为围绕保护二极管111的一部分或全部环绕，或者设置并形成多个漏极109，使得保护二极管111设置在至少一对漏电极多个漏电极109.版权所有（C）2011，JPO＆INPIT

8. 发明专利

JP2011003808A Field effect transistor and method of manufacturing the same 有权
标题翻译：场效应晶体管及其制造方法
公开(公告)号：JP2011003808A
公开(公告)日：2011-01-06
申请号：JP2009147029
申请日：2009-06-19
申请人： Nec Corp , 日本電気株式会社
发明人： INOUE TAKASHI , NAKAYAMA TATSUO , ANDO YUJI , OTA KAZUKI , OKAMOTO YASUHIRO
IPC分类号： H01L29/812 , H01L21/28 , H01L21/338 , H01L29/778
CPC分类号： H01L29/7781 , H01L29/1066 , H01L29/2003 , H01L29/205 , H01L29/513 , H01L29/66462 , H01L29/7783
摘要： PROBLEM TO BE SOLVED: To provide a field effect transistor which indicates a normally-off characteristic and is operable at a high voltage.SOLUTION: This field effect transistor 10 comprises a nitride semiconductor multilayered body 15 having nitrogen polarity, a gate electrode 16, a source electrode 17 and a drain electrode 18. The nitride semiconductor multilayered body 15 is a multilayered body in which an electron supply layer 12, an electron traveling layer 13 and a barrier layer 14 are epitaxially laminated on a substrate 11 in this order. The gate electrode 16 is disposed on the barrier layer 14 and the nitride semiconductor multilayered body 15 other than a lower part of the gate electrode 16 has a recessed structure. The source electrode 17 and the drain electrode 18 are disposed on a bottom surface of the recessed structure, and a hetero-junction 19 is formed at an interface between the electron supply layer 12 and the electron traveling layer 13.
摘要翻译：要解决的问题：提供一种表示常关特性并可在高电压下工作的场效应晶体管。解决方案：该场效应晶体管10包括具有氮极性的氮化物半导体多层体15，栅电极16，源电极17和漏电极18.氮化物半导体多层体15是依次将电子供给层12，电子传播层13和势垒层14外延层叠在基板11上的多层体。栅电极16设置在阻挡层14上，并且栅极电极16的下部以外的氮化物半导体多层体15具有凹陷结构。源电极17和漏电极18设置在凹陷结构的底表面上，并且在电子供给层12和电子传播层13之间的界面处形成异质结19。

9. 发明专利

JP2009049288A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2009049288A
公开(公告)日：2009-03-05
申请号：JP2007215895
申请日：2007-08-22
申请人： Nec Corp , 日本電気株式会社
发明人： OKAMOTO YASUHIRO , OTA KAZUKI , MIYAMOTO HIRONOBU , ANDO YUJI , NAKAYAMA TATSUO
IPC分类号： H01L21/338 , H01L21/28 , H01L29/06 , H01L29/41 , H01L29/417 , H01L29/423 , H01L29/49 , H01L29/778 , H01L29/78 , H01L29/812
摘要： PROBLEM TO BE SOLVED: To provide structure capable of easily providing an enhancement type HJFET in manufacturing the HJFET, and of reducing channel resistance in its enhancement operation, in a semiconductor device formed of a group-III nitride semiconductor, and having a heterojunction. SOLUTION: A gate part is formed to contact a barrier layer. A composition of InAlGaN constituting an InAlGaN barrier layer formed on a channel layer is selected to prevent generation of a secondary electron gas on a heterojunction interfacial surface between the barrier layer and the channel layer even in a state without forming the gate in a part immediately under the gate. An InAlGaN cap layer is formed as an upper layer of the InAlGaN barrier layer excluding an area immediately under the gate. The InAlGaN cap layer is formed of InAlGaN of a composition lattice-matching with a buffer layer, and generating secondary electrons on the interfacial surface between the barrier layer and the channel layer by spontaneous polarization. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：为了提供在由III族氮化物半导体形成的半导体器件中能够容易地在制造HJFET中提供增强型HJFET并且在其增强操作中降低沟道电阻的结构，并且具有异质结。解决方案：形成栅极部分以接触阻挡层。选择构成在沟道层上形成的InAlGaN阻挡层的InAlGaN的组成，以防止在阻挡层和沟道层之间的异质界面表面上产生二次电子气体，即使在不立即形成栅极的状态下大门。形成InAlGaN保护层作为InAlGaN势垒层的上层，除了紧邻栅极的区域。 InAlGaN帽层由与缓冲层晶格匹配的组成的InAlGaN形成，并且通过自发极化在阻挡层和沟道层之间的界面上产生二次电子。版权所有（C）2009，JPO＆INPIT

10. 发明专利

JP2007059508A Electrode of n-type nitride semiconductor and method of manufacturing same 有权
标题翻译： N型氮化物半导体的电极及其制造方法
公开(公告)号：JP2007059508A
公开(公告)日：2007-03-08
申请号：JP2005240859
申请日：2005-08-23
申请人： Nec Corp , 日本電気株式会社
发明人： OTA KAZUKI
IPC分类号： H01L21/28 , H01L21/338 , H01L29/417 , H01L29/778 , H01L29/812 , H01L33/32 , H01L33/40 , H01S5/042 , H01S5/323
摘要： PROBLEM TO BE SOLVED: To provide an n-type ohmic electrode having excellent reliability to heat treatment in a manufacturing process, and to use conditions under which large current flows, and having low contact resistance in an n-type ohmic electrode formed on the surface of a nitride semiconductor. SOLUTION: Electrode structures 305, 306 are an ohmic electrode formed on the surface of an n-type or non-doped nitride semiconductor, which contains at least one or more of metals among Ti, Ta, Nb, Cr, V, Sn, In, Zr, and Si in a first region in contact with the surface of the nitride semiconductor, and further contains Mg in a second region formed on the first region. The first region may contain Mg additionally to the constitution. Further, a third region containing Au may be provided on the second region. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种在制造工艺中具有优异的热处理可靠性的n型欧姆电极，并且使用形成大量电流的条件，并且在形成的n型欧姆电极中具有低接触电阻在氮化物半导体的表面上。解决方案：电极结构305,306是在n型或非掺杂氮化物半导体的表面上形成的欧姆电极，其包含Ti，Ta，Nb，Cr，V中的至少一种或多种金属，在与氮化物半导体的表面接触的第一区域中的Sn，In，Zr和Si，并且在形成在第一区域上的第二区域中还含有Mg。第一个区域除了构成之外还可能含有Mg。此外，可以在第二区域上设置包含Au的第三区域。版权所有（C）2007，JPO＆INPIT

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