专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20180285733A1 TECHNOLOGIES FOR SCALING MULTILAYERED ARTIFICIAL NEURAL NETWORK TRAINING ALGORITHMS 审中-公开
公开(公告)号：US20180285733A1
公开(公告)日：2018-10-04
申请号：US15476998
申请日：2017-04-01
申请人： Naveen K. Mellempudi , Srinivas Sridharan , Dheevatsa Mudigere , Dipankar Das
发明人： Naveen K. Mellempudi , Srinivas Sridharan , Dheevatsa Mudigere , Dipankar Das
IPC分类号： G06N3/08 , G06N3/04 , G06N3/063
摘要： Technologies for artificial neural network training include a computing node with a host fabric interface that sends a message that includes one or more artificial neural network training algorithm values to another computing node in response to receipt of a request to send the message. Prior to sending the message, the host fabric interface may receive a request to quantize the message and quantize the message based on a quantization level included in the request to generate a quantized message. The quantization message includes one or more quantized values such that each quantized value has a lower precision than a corresponding artificial neural network training algorithm value. The host fabric interface then transmits the quantized message, which includes metadata indicative of the quantization level, to another computing node in response to quantization of the message for artificial neural network training. Other embodiments are described and claimed.

2. 发明申请

US20130318322A1 Memory Management Scheme and Apparatus 审中-公开
标题翻译：内存管理方案和设备
公开(公告)号：US20130318322A1
公开(公告)日：2013-11-28
申请号：US13481903
申请日：2012-05-28
申请人： Varun Shetty , Dipankar Das , Debjit Roy Choudhury , Ashank Reddy
发明人： Varun Shetty , Dipankar Das , Debjit Roy Choudhury , Ashank Reddy
IPC分类号： G06F12/06
CPC分类号： G06F3/0644 , G06F3/061 , G06F3/0631 , G06F3/0665 , G06F3/0689
摘要： A memory management apparatus includes a first controller adapted to receive an input data sequence including one or more data frames and operative: to separate each of the data frames into a payload data portion and a header portion; to store the payload data portion in at least one available memory location in a physical storage space; and to store in a logical storage space the header portion along with at least one associated index indicating where in the physical storage space the corresponding payload data portion resides. The apparatus further includes a second controller operative, as a function of a data read request, to access the physical storage space using the header portion and associated index from the logical storage space to retrieve the corresponding payload data portion and to combine the header portion with the payload data portion to generate a response to the data read request.
摘要翻译：存储器管理装置包括：第一控制器，适于接收包括一个或多个数据帧的输入数据序列，并且可操作：将每个数据帧分成有效载荷数据部分和报头部分; 将所述有效载荷数据部分存储在物理存储空间中的至少一个可用存储器位置中; 并且在逻辑存储空间中存储头部部分以及至少一个相关联的索引，其指示物理存储空间中对应的有效载荷数据部分驻留在哪里。该装置还包括作为数据读取请求的功能的第二控制器，使用头部部分和来自逻辑存储空间的关联索引来访问物理存储空间，以检索对应的有效载荷数据部分，并将头部部分与有效载荷数据部分以产生对数据读取请求的响应。

3. 发明申请

US20130002842A1 Systems and Methods for Motion and Distance Measurement in Gastrointestinal Endoscopy 审中-公开
标题翻译：胃肠内窥镜检查中运动和距离测量的系统与方法
公开(公告)号：US20130002842A1
公开(公告)日：2013-01-03
申请号：US13457305
申请日：2012-04-26
申请人： Dipankar Das , Marcus O. Filipovich , Jason J. Corso , Gregory D. Hager
发明人： Dipankar Das , Marcus O. Filipovich , Jason J. Corso , Gregory D. Hager
IPC分类号： H04N7/18
CPC分类号： H04N7/18 , G06T7/0012 , G06T2207/10016 , G06T2207/10024 , G06T2207/10068 , G06T2207/30028 , G06T2207/30092
摘要： Systems and methods for extracting and measuring motion from images capture during capsule endoscopy in accordance with embodiments of the invention are disclosed. In one embodiment of the invention, an endoscope system configured to generate a spatial index of images captured along a passageway includes a processor and a camera configured to capture a plurality of images as the camera moves along a passageway, wherein the processor is configured to compare sets of at least two images from the plurality of images, determine motion of the camera along the passageway using the sets of at least two images, determine the distance the camera traveled along the passageway at the point at which an image in each of the sets of at least two images was captured, and generate a spatial index for the plurality of images by associating distances traveled along the passageway with the images.
摘要翻译：公开了根据本发明的实施例的用于在胶囊内窥镜检查期间从图像捕获提取和测量运动的系统和方法。在本发明的一个实施例中，被配置为产生沿着通道捕获的图像的空间索引的内窥镜系统包括处理器和照相机，所述处理器和照相机配置成当所述照相机沿着通道移动时捕获多个图像，其中所述处理器被配置为比较确定来自多个图像的至少两个图像的集合，使用至少两个图像的集合来确定相机沿着通道的运动，确定相机在每个集合中的图像的点处沿着通道行进的距离捕获至少两个图像，并且通过将沿着通道行进的距离与图像相关联来生成多个图像的空间索引。

4. 发明授权

US09430677B2 Memory management systems and methods for embedded systems 有权
标题翻译：嵌入式系统的内存管理系统和方法
公开(公告)号：US09430677B2
公开(公告)日：2016-08-30
申请号：US13545472
申请日：2012-07-10
申请人： Dipankar Das
发明人： Dipankar Das
IPC分类号： G06F9/455 , G06F21/78 , G06F21/52 , G06F11/14
CPC分类号： G06F21/78 , G06F11/14 , G06F11/1479 , G06F21/52 , G06F2212/2022
摘要： Methods and systems are provided for managing static memory associated with software of an embedded system. The method includes performing one or more steps on one or more processors. The steps include selectively assigning memory objects to static memory segments based on access of the memory object by the software; managing data of the memory segments based on the assigning; and selectively restoring the data of the memory segments based on the managing.
摘要翻译：提供了用于管理与嵌入式系统的软件相关联的静态存储器的方法和系统。该方法包括在一个或多个处理器上执行一个或多个步骤。步骤包括基于软件对存储器对象的访问来将存储器对象选择性地分配给静态存储器段; 基于分配来管理存储器段的数据; 以及基于所述管理选择性地恢复所述存储器段的数据。

5. 发明授权

US08464102B2 Methods and systems for diagnosing hardware and software faults using time-stamped events 有权
标题翻译：使用时间戳事件诊断硬件和软件故障的方法和系统
公开(公告)号：US08464102B2
公开(公告)日：2013-06-11
申请号：US12977405
申请日：2010-12-23
申请人： Purnendu Sinha , Dipankar Das
发明人： Purnendu Sinha , Dipankar Das
IPC分类号： G06F11/00
CPC分类号： G06F11/079 , G06F11/0715 , H04L41/064 , H04L63/1416
摘要： A transportation vehicle including a high-resolution clock, an electronic network including two or more tasks, including first and second tasks, and a memory including instructions causing a processor to classify faults in the electronic network using the clock. The steps include receiving a first fault code generated at the first task, receiving a second fault trouble code generated at the second task of the electronic system in response to a second fault, and identifying an execution cycle offset associated with the first and second tasks using an execution schedule, and considering whether the first cycle is separated from the second cycle by the execution cycle offset identified by the schedule. The instructions also cause the processor to identify causal relationships for a plurality of faults via a pair-wise repetition of the above-described analysis for at least one combination of tasks other than the first and second tasks.
摘要翻译：包括高分辨率时钟，包括第一和第二任务的两个或多个任务的电子网络的运输车辆，以及包括使处理器使用时钟对电子网络中的故障进行分类的指令的存储器。这些步骤包括接收在第一任务产生的第一故障代码，接收响应于第二故障在电子系统的第二任务处产生的第二故障故障码，以及使用以下步骤识别与第一和第二任务相关联的执行周期偏移执行时间表，并且考虑第一周期是否与第二周期分离由调度所标识的执行周期偏移。所述指令还使得所述处理器经由对所述第一和第二任务以外的任务的至少一个组合的上述分析的成对重复来识别多个故障的因果关系。

6. 发明申请

US20130124917A1 RECOVERING FROM STACK CORRUPTION FAULTS IN EMBEDDED SOFTWARE SYSTEMS 有权
标题翻译：在嵌入式软件系统中从堆栈破坏故障中恢复
公开(公告)号：US20130124917A1
公开(公告)日：2013-05-16
申请号：US13297822
申请日：2011-11-16
申请人： Dipankar Das
发明人： Dipankar Das
IPC分类号： G06F11/14 , G06F12/14
CPC分类号： G06F11/1479 , G06F11/1438
摘要： A method and system for recovering from stack-overflow or stack-underflow faults without restarting software or hardware. At every task switch operation in an application program, a portion of the memory stack is copied to a backup location, so that portion of the stack can be restored if it is subsequently corrupted by a stack-overflow or stack-underflow fault during the execution of the next task. State variable data is similarly copied to a backup location, so that it can be used to restore or estimate the output of the next task if that task experiences a fault. Techniques are disclosed for selecting which state variable data and which portion of the memory stack to copy to backup, and for detecting a stack-overflow or stack-underflow fault and restoring state variable and memory data in the event of such a fault.
摘要翻译：一种从堆栈溢出或堆叠下溢故障中恢复而不重新启动软件或硬件的方法和系统。在应用程序中的每个任务切换操作中，存储器堆栈的一部分被复制到备份位置，使得如果在执行期间其堆栈溢出或堆栈下溢故障随后被破坏堆栈的那部分，则该堆栈的一部分可被恢复的下一个任务。状态变量数据类似地复制到备份位置，以便如果该任务遇到故障，则可以将其用于还原或估计下一个任务的输出。公开了用于选择哪些状态变量数据和存储器堆栈的哪个部分复制到备份以及用于在发生这种故障的情况下检测堆栈溢出或堆栈下溢故障以及恢复状态变量和存储器数据的技术。

7. 发明申请

US20110246831A1 METHOD AND APPARATUS FOR OPERATIONAL-LEVEL FUNCTIONAL AND DEGRADATION FAULT ANALYSIS 失效
标题翻译：操作级功能和降解故障分析的方法和装置
公开(公告)号：US20110246831A1
公开(公告)日：2011-10-06
申请号：US12753166
申请日：2010-04-02
申请人： Dipankar Das , Partha P. Chakrabarti , Purnendu Sinha
发明人： Dipankar Das , Partha P. Chakrabarti , Purnendu Sinha
IPC分类号： G06F11/07
CPC分类号： G06F17/504 , G06F2217/70
摘要： An apparatus and method are provided for analyzing fault tolerance of a system, and performing “what if?” analysis for various fault-tolerant system design options. The fault tolerance analysis approach handles logical failures and quality faults emanating from loss of precision in signal values. The method can detect quality faults, which can allow systems to be built which are resilient to precision losses. Two analysis steps are provided, one static and another simulation-based, which are used in tandem to check the fault tolerance of an automotive or other system. While a simulation-based method checks fault-resilience under specific test cases and fault-scenarios, the static analysis method quickly checks all test cases and fault-scenarios. The static analysis method makes approximations while performing the analysis, and any fault detected is reproduced using the simulation-based method. All analysis operations are performed on operations-level behavioral models of the applications, thereby reducing the cost of analysis.
摘要翻译：提供了一种用于分析系统的容错性并对各种容错系统设计选项执行“如果？”分析的装置和方法。容错分析方法处理信号值精度损失所产生的逻辑故障和质量故障。该方法可以检测质量故障，这可以允许建立能够抵御精度损失的系统。提供了两个分析步骤，一个静态和另一个基于模拟，它们一起用于检查汽车或其他系统的容错。虽然基于仿真的方法会检查特定测试用例和故障场景下的故障恢复能力，静态分析方法可快速检查所有测试用例和故障场景。静态分析方法在执行分析时进行近似，并且使用基于模拟的方法再现所检测到的任何故障。所有分析操作都在应用程序的操作级行为模型上执行，从而降低了分析成本。

8. 发明申请

US20110137975A1 SECURE PROFILING METHOD PROVIDING PRIVACY IN SOCIAL NETWORKING SYSTEMS 审中-公开
标题翻译：在社会网络系统中提供隐私的安全配置方法
公开(公告)号：US20110137975A1
公开(公告)日：2011-06-09
申请号：US12631671
申请日：2009-12-04
申请人： Dipankar Das , Len L. Mizrah
发明人： Dipankar Das , Len L. Mizrah
IPC分类号： G06Q30/00 , G06F3/01 , G06F15/16 , G06Q10/00
CPC分类号： G06F21/6254 , G06Q10/10 , G06Q30/02 , G06Q30/0269
摘要： The present invention includes devices and methods for enabling private and secure data collection by profile servers relating to users that are associated with a profiling user in a social networking system. Particular aspects of the present invention are described in the claims, specification and drawings.
摘要翻译：本发明包括用于通过与在社交网络系统中与分析用户相关联的用户的简档服务器进行私人和安全数据收集的装置和方法。在权利要求书，说明书和附图中描述了本发明的特定方面。

9. 发明授权

US08930036B2 Reconfigurable interface-based electrical architecture 有权
标题翻译：可重构的基于界面的电气架构
公开(公告)号：US08930036B2
公开(公告)日：2015-01-06
申请号：US13086037
申请日：2011-04-13
申请人： Dipankar Das , Vinod Kumar Agrawal , Seetharaman Rajappan
发明人： Dipankar Das , Vinod Kumar Agrawal , Seetharaman Rajappan
IPC分类号： G06F1/30 , G06F1/26 , G05B19/042 , G06F13/00
CPC分类号： G06F15/025 , G05B19/042 , G06F13/00 , G06F13/42 , H04L12/40032 , H04L12/40195 , H04L41/0668 , H04L41/0695
摘要： An electrical network architecture including a reconfigurable interface layer, along with a corresponding reconfiguration methodology. The interface layer is comprised of reconfigurable interface devices which allow a plurality of sensors and actuators to communicate with a plurality of control units. Each sensor or actuator is connected to multiple interface devices, which in turn are connected to a bus. The control units are also connected to the bus. In the event of an interface device failure, other interface devices can be reconfigured to maintain communication between sensors, actuators and control units. In the event of a control unit failure, the interface devices can be reconfigured to route sensor and actuator message traffic to a different control unit which can handle the functions of the failed control unit. The overall number of control units can also be reduced, as each control unit has flexible access to many sensors and actuators.
摘要翻译：包括可重配置接口层的电网架构，以及相应的重新配置方法。接口层由可重配置接口设备组成，允许多个传感器和致动器与多个控制单元通信。每个传感器或执行器连接到多个接口设备，这些接口设备又连接到总线。控制单元也连接到总线。在接口设备故障的情况下，可以重新配置其他接口设备，以保持传感器，执行器和控制单元之间的通信。在控制单元故障的情况下，可以重新配置接口设备以将传感器和执行器消息业务路由到不同的控制单元，该控制单元可以处理故障控制单元的功能。控制单元的总数也可以减少，因为每个控制单元可以灵活地访问许多传感器和执行器。

10. 发明授权

US08806282B2 Data integrity field (DIF) implementation with error detection and intelligent recovery mechanism 有权
标题翻译：数据完整性字段（DIF）实现带有错误检测和智能恢复机制
公开(公告)号：US08806282B2
公开(公告)日：2014-08-12
申请号：US13398509
申请日：2012-02-16
申请人： Varun Shetty , Debjit Roy Choudhury , Dipankar Das , Ashank Reddy
发明人： Varun Shetty , Debjit Roy Choudhury , Dipankar Das , Ashank Reddy
IPC分类号： G06F11/273
CPC分类号： G06F11/008 , G06F11/1076 , G06F2211/1088
摘要： An apparatus for providing a data integrity field implementation in a data processing system includes a controller operative to interface between a host device and a destination device in the data processing system for transferring at least one data block therebetween. The data processing system further includes an error detection module associated with the controller. The error detection module is operative to determine a probability of an error occurrence based at least in part on a measured current error rate for the data processing system. The controller is operative to implement an error correction methodology which is selectively adaptable as a function of the probability of an error occurrence.
摘要翻译：一种用于在数据处理系统中提供数据完整性字段实现的装置包括控制器，其操作用于在数据处理系统中的主机设备和目的设备之间进行接口，用于在其间传送至少一个数据块。数据处理系统还包括与控制器相关联的错误检测模块。错误检测模块至少部分地基于数据处理系统的测量的当前错误率来确定错误发生的概率。该控制器用于实现一种误差校正方法，其可以根据发生错误的概率选择性地适应。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式