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    • 2. 发明公开
    • ANALOG DIGITAL CONVERTER, A/D CONVERSION STAGE, METHOD FOR GENERATING DIGITAL SIGNAL CORRESPONDING TO ANALOG SIGNAL, AND METHOD FOR GENERATING SIGNAL INDICATING CONVERSION ERROR IN THE A/D CONVERSION STAGE
    • 模拟数字转换器,A / D变换器级,制造方法ONE模拟信号相应的数字信号和方法用于制造转换错误IN A / D变换器级指示信号
    • EP2043267A1
    • 2009-04-01
    • EP07744951.0
    • 2007-06-08
    • National University Corporation Shizuoka University
    • KAWAHITO, Shoji
    • H03M1/14H03M1/74
    • H03M1/144H03M1/0695H03M1/146
    • A conversion operation B is performed with respect to a sample value R in an A/D conversion stage 101 to generate a conversion result D3, and a sampling operation A is performed with respect to this conversion result D3 in an A/D conversion stage 103. The conversion operation B is performed with respect to a sample value in an A/D conversion stage 105 to generate a conversion result D4, and the sampling operation A is performed with respect to the conversion result D4 in an A/D conversion stage 107. The conversion operation B is performed with respect to a sample value in an A/D conversion stage 107 to generate a conversion result D5, and the sampling operation A is performed with respect to this conversion result D5 in an A/D conversion stage 101. The conversion operation B is performed with respect to a sample value in the A/D conversion stage 103 to generate a conversion result D6, and the sampling operation A is performed with respect to the conversion result D6 in the A/D conversion stage 105.
    • A转换操作执行B相对于一个取样值R中进行A / D转换级101,以产生转换结果D3,和一个采样中操作的执行相对于该转换结果D3中进行A / D转换级103 该转换操作执行B相对于一个采样值到A / D转换级105,以产生转换结果D4,并且采样中操作的执行相对于所述转换结果D4到A / D转换级107 该转换操作执行B相对于一个采样值到A / D转换级107,以产生转换结果D5,并且采样中操作的执行相对于该转换结果D5到A / D转换级101 该转换操作执行B相对于一个采样值在A / D转换级103,以产生转换结果D6,并且采样中操作的执行相对于在A / D conversi转换结果D6 舞台上的第105
    • 6. 发明公开
    • SEMICONDUCTOR ELEMENT AND SOLID-STATE IMAGE PICKUP DEVICE
    • 半导体元件和固态图像拾取装置
    • EP2487714A1
    • 2012-08-15
    • EP10822102.9
    • 2010-10-07
    • National University Corporation Shizuoka University
    • KAWAHITO, ShojiYASUTOMI, Keita
    • H01L27/146H04N5/374
    • H01L27/14609H01L27/14612H01L27/14689H04N5/3597
    • A semiconductor element encompasses a base-body region (21) of p-type; a charge-generation buried region (23) of a n-type, being buried in a part of an upper portion of the base-body region (21) so as to implement a photodiode (D1) together with the base-body region (21), configured to create a first potential valley (PW1) in the base-body region (21); an accumulation region (24) of n-type, being buried in a part of the upper portion of the base-body region (21), separately from the charge-generation buried region (23), configured to create a second potential valley (PW2) deeper than the first potential valley (PW1); a transfer-gate insulation film (33) provided on a surface of the base-body region (21) between the charge-generation buried region (23) and the accumulation region (24); a transfer-gate electrode (31) provided on the transfer-gate insulation film (33), configured to control a potential of a transfer channel formed in the base-body region (21) between the charge-generation buried region (23) and the accumulation region (24); and a recessed-potential creation means configured to create a stair-like-shaped potential barrier for electronic shuttering. It is possible to achieve the perfect transfer of charges and it is possible to store a sufficient number of the accumulation charges.
    • 半导体元件包含p型的基体区域(21) 掩埋在基体区域(21)的上部的一部分中的n型电荷产生掩埋区域(23),以便与基体区域(21)一起实现光电二极管(D1) (21),被配置为在所述基体区域(21)中形成第一电势谷(PW1); 与电荷产生掩埋区域(23)分离地埋入在基体区域(21)的上部的一部分中的n型积累区域(24),其被配置为产生第二电势谷( PW2)比第一电位谷(PW1)更深; 设置在电荷产生掩埋区域(23)和积聚区域(24)之间的基体区域(21)的表面上的转移栅极绝缘膜(33); 设置在所述传输栅极绝缘膜33上的传输栅极电极31,用于控制形成在所述电荷产生掩埋区域23与所述电荷产生掩埋区域23之间的所述基体区域21中的传输沟道的电势; 积聚区域(24); 以及凹入电位产生装置,其被配置为产生用于电子快门的阶梯状势垒。 可以实现收费的完美转移,并且可以存储足够数量的累积费用。
    • 9. 发明公开
    • CHARGE MODULATION ELEMENT AND SOLID-STATE IMAGING DEVICE
    • FESTKÖRPERBILDAUFNAHMEVORRICHTUNG的LADUNGSMODULATIONSELEMENT
    • EP3104191A1
    • 2016-12-14
    • EP15746421.5
    • 2015-02-06
    • National University Corporation Shizuoka University
    • KAWAHITO, ShojiYASUTOMI, KeitaHAN, Sangman
    • G01S7/486H01L27/146H04N5/374
    • H04N5/378G01S7/4863G01S17/89H01L27/1446H01L27/1461H01L27/14623H01L27/14643H04N5/374
    • Provided are a charge-modulation element easily enabling an electric field to be uniform over a long distance of a charge transport path and avoiding problems caused by interface defects, and a solid-state imaging device. The charge-modulation element includes a first charge-accumulation region (61), a second charge-accumulation region (62), a third charge-accumulation region (63), and a fourth charge-accumulation region (64), provided symmetric with respect to a center position of a light-receiving area, and a first field-control electrode pair (41a, 41b), a second field-control electrode pair (42a, 42b), a third field-control electrode pair (43a, 43b), and a fourth field-control electrode pair (44a, 44b), arranged on both sides of respective charge transport paths, for changing depletion potentials of the charge transport paths, which extend from the center position of the light-receiving area to the first charge-accumulation region (61), the second charge-accumulation region (62), the third charge-accumulation region (63), and the fourth charge-accumulation region (64).
    • 提供了容易使电场在电荷输送路径的长距离上均匀并且避免由界面缺陷引起的问题的电荷调制元件和固态成像装置。 电荷调制元件包括与第一电荷累积区域(61),第二电荷累积区域(62),第三电荷累积区域(63)和第四电荷累积区域(64) 相对于受光区域的中心位置,以及第一场控制电极对(41a,41b),第二场控制电极对(42a,42b),第三场控制电极对(43a,43b) )和设置在各个电荷传送路径的两侧的第四场控制电极对(44a,44b),用于改变从光接收区域的中心位置延伸到电荷传输路径的耗尽电位 第一电荷累积区域(61),第二电荷累积区域(62),第三电荷累积区域(63)和第四电荷累积区域(64)。