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1. 发明授权

US5767004A Method for forming a low impurity diffusion polysilicon layer 失效
标题翻译：形成低杂质扩散多晶硅层的方法
公开(公告)号：US5767004A
公开(公告)日：1998-06-16
申请号：US635992
申请日：1996-04-22
申请人： Narayanan Balasubramanian , Ching Win Kong , Chuck Jang
发明人： Narayanan Balasubramanian , Ching Win Kong , Chuck Jang
IPC分类号： H01L21/28 , H01L21/3205 , H01L29/49
CPC分类号： H01L21/28061 , H01L21/32055 , H01L29/4925 , H01L29/4933
摘要： A method for forming within an integrated circuit a low impurity diffusion polysilicon layer. Formed upon a semiconductor substrate is an amorphous silicon layer. Formed also upon the semiconductor substrate and contacting the amorphous silicon layer is a polysilicon layer. The amorphous silicon layer and the polysilicon layer are then simultaneously annealed to form a low impurity diffusion polysilicon layer. The low impurity diffusion polysilicon layer is a polysilicon multi-layer with grain boundary mis-matched polycrystalline properties. Optionally, a metal silicide layer may be formed upon the amorphous silicon layer and the polysilicon layer either prior to or subsequent to annealing the amorphous silicon layer and the polysilicon layer. The metal silicide layer and low impurity diffusion polysilicon layer may then be patterned to form a polycide gate electrode.
摘要翻译：一种在集成电路内形成低杂质扩散多晶硅层的方法。形成在半导体衬底上的是非晶硅层。形成在半导体衬底上并与非晶硅层接触的是多晶硅层。然后，非晶硅层和多晶硅层同时退火以形成低杂质扩散多晶硅层。低杂质扩散多晶硅层是具有晶界不匹配多晶性质的多晶硅多层。可选地，在非晶硅层和多晶硅层退火之前或之后，可以在非晶硅层和多晶硅层上形成金属硅化物层。然后可以对金属硅化物层和低杂质扩散多晶硅层进行构图以形成多晶硅栅极电极。

2. 发明申请

US20060017092A1 Method for simultaneously fabricating ONO-type memory cell, and gate dielectrics for associated high voltage write transistors and gate dielectrics for low voltage logic transistors by using ISSG 有权
标题翻译：用于同时制造ONO型存储单元的方法以及用于低压逻辑晶体管的相关高电压写入晶体管和栅极电介质的栅极电介质通过使用ISSG
公开(公告)号：US20060017092A1
公开(公告)日：2006-01-26
申请号：US10898273
申请日：2004-07-23
申请人： Zhong Dong , Chuck Jang , Ching-Hwa Chen , Chia-Shun Hsiao
发明人： Zhong Dong , Chuck Jang , Ching-Hwa Chen , Chia-Shun Hsiao
IPC分类号： H01L21/8242 , H01L21/336
CPC分类号： H01L27/11526 , H01L21/28273 , H01L27/105 , H01L27/11546 , H01L29/42324
摘要： Conventional fabrication of top oxide in an ONO-type memory cell stack usually produces Bird's Beak. Certain materials in the stack such as silicon nitrides are relatively difficult to oxidize. As a result oxidation does not proceed uniformly along the multi-layered height of the ONO-type stack. The present disclosure shows how radical-based fabrication of top-oxide of an ONO stack (i.e. by ISSG method) can help to reduce formation of Bird's Beak. More specifically, it is indicated that short-lived oxidizing agents (e.g., atomic oxygen) are able to better oxidize difficult to oxidize materials such as silicon nitride and the it is indicated that the short-lived oxidizing agents alternatively or additionally do not diffuse deeply through already oxidized layers of the ONO stack such as the lower silicon oxide layer. As a result, a more uniform top oxide dielectric can be fabricated with more uniform breakdown voltages along its height. Additionally, adjacent low and high voltage transistors may benefit from simultaneous formation of their gate dielectrics with use of the radical-based oxidizing method.
摘要翻译： ONO型记忆体堆叠中的顶层氧化物的常规制造通常产生Bird's Beak。叠层中的某些材料如氮化硅相对难以氧化。因此，氧化不会沿着ONO型堆叠的多层高度均匀地进行。本公开显示了如何基于根基的ONO堆叠的顶部氧化物的制造（即通过ISSG方法）可以帮助减少Bird's Beak的形成。更具体地，表明短寿命氧化剂（例如原子氧）能够更好地氧化难以氧化的材料，例如氮化硅，并且表明短寿命氧化剂交替地或另外不会扩散深通过已经氧化的ONO堆叠层，例如较低的氧化硅层。结果，可以制造更均匀的顶部氧化物电介质，沿其高度具有更均匀的击穿电压。此外，相邻的低压和高压晶体管可以受益于使用基于自由基的氧化方法同时形成其栅极电介质。

3. 发明申请

US20050227437A1 Method of forming ONO-type sidewall with reduced bird's beak 有权
标题翻译：用鸟喙形成ONO型侧壁的方法
公开(公告)号：US20050227437A1
公开(公告)日：2005-10-13
申请号：US10821100
申请日：2004-04-07
申请人： Zhong Dong , Chuck Jang , Ching-Hwa Chen , Chunchieh Huang , Jin-Ho Kim , Vei-Han Chan , Chung Leung , Chia-Shun Hsiao , George Kovall , Steven Yang
发明人： Zhong Dong , Chuck Jang , Ching-Hwa Chen , Chunchieh Huang , Jin-Ho Kim , Vei-Han Chan , Chung Leung , Chia-Shun Hsiao , George Kovall , Steven Yang
IPC分类号： H01L21/28 , H01L21/336 , H01L29/423 , H01L29/51 , H01L29/788
CPC分类号： H01L21/28273 , H01L29/42328 , H01L29/513 , H01L29/7881
摘要： Conventional fabrication of sidewall oxide around an ONO-type memory cell stack usually produces Bird's Beak because prior to the fabrication, there is an exposed sidewall of the ONO-type memory cell stack that exposes side parts of a plurality of material layers respectively composed of different materials. Certain materials in the stack such as silicon nitrides are more difficult to oxidize than other materials in the stack such polysilicon. As a result oxidation does not proceed uniformly along the multi-layered height of the sidewall. The present disclosure shows how radical-based fabrication of sidewall dielectric can help to reduce the Bird's Beak formation. More specifically, it is indicated that short-lived oxidizing agents (e.g., atomic oxygen) are able to better oxidize difficult to oxidize materials such as silicon nitride and the it is indicated that the short-lived oxidizing agents alternatively or additionally do not diffuse as deeply through already oxidized layers of the sidewall such as silicon oxide layers. As a result, a more uniform sidewall dielectric can be fabricated with more uniform breakdown voltages along it height.
摘要翻译：通常在ONO型存储单元堆叠周围制造侧壁氧化物通常产生鸟喙，因为在制造之前，存在ONO型存储单元堆叠的暴露的侧壁，其暴露分别由不同的多个材料层组成的多个材料层的侧面部分材料堆叠中的某些材料如氮化硅比堆叠中的其它材料更难以氧化，这样的多晶硅。结果，氧化不沿着侧壁的多层高度均匀地进行。本公开显示了基于侧壁电介质的基于基础的制造有助于减少鸟喙形成。更具体地，表明短寿命氧化剂（例如原子氧）能够更好地氧化难以氧化的材料如氮化硅，并且表明短寿命氧化剂交替地或另外不扩散为深深地通过侧壁的已氧化层，例如氧化硅层。结果，可以制造更均匀的侧壁电介质，沿其高度具有更均匀的击穿电压。

4. 发明授权

US06924542B2 Trench isolation without grooving 有权
公开(公告)号：US06924542B2
公开(公告)日：2005-08-02
申请号：US10901948
申请日：2004-07-29
申请人： Hua Ji , Dong Jun Kim , Jin-Ho Kim , Chuck Jang
发明人： Hua Ji , Dong Jun Kim , Jin-Ho Kim , Chuck Jang
IPC分类号： H01L21/762 , H01L29/00 , H01L21/8238
CPC分类号： H01L21/76229
摘要： A method and structure to form shallow trench isolation regions without trench oxide grooving is provided. In particular, a method includes a two-step oxide process in which an oxide liner lines the inside surface of a trench and the trench is filled with a bulk oxide layer, preferably using a high density plasma chemical vapor deposition (HDP-CVD) process. The oxide liner and the bulk oxide layer are formed to have similar etch rates. Thus, when etching the oxide liner and the bulk oxide layer between stack structures, a common dielectric top surface is formed that is substantially planar and without grooves.

5. 发明授权

US07071127B2 Methods for improving quality of semiconductor oxide composition formed from halogen-containing precursor 失效
标题翻译：用于提高由含卤素前体形成的半导体氧化物组合物质量的方法
公开(公告)号：US07071127B2
公开(公告)日：2006-07-04
申请号：US10442759
申请日：2003-05-20
申请人： Zhong Dong , Chuck Jang , Chia-Shun Hsiao
发明人： Zhong Dong , Chuck Jang , Chia-Shun Hsiao
IPC分类号： H01L21/469
CPC分类号： H01L21/02164 , H01L21/02211 , H01L21/02271 , H01L21/02337 , H01L21/28158 , H01L21/3105 , H01L21/31612
摘要： A method and apparatus are disclosed for reducing the concentration of chlorine and/or other bound contaminants within a semiconductor oxide composition that is formed by chemical vapor deposition (CVD) using a semiconductor-element-providing reactant such as dichlorosilane (DCS) and an oxygen-providing reactant such as N2O. In one embodiment, a DCS-HTO film is annealed by heating N2O gas to a temperature in the range of about 825° C. to about 950° C. so as to trigger exothermic decomposition of the N2O gas and flowing the heated gas across the DCS-HTO film so that disassociated atomic oxygen radicals within the heated N2O gas can transfer disassociating energy to chlorine atoms bound within the DCS-HTO film and so that the atomic oxygen radicals can fill oxygen vacancies within the semiconductor-oxide matrix of DCS-HTO film. An improved ONO structure may be formed with the annealed DCS-HTO film for use in floating gate or other memory applications.
摘要翻译：公开了一种方法和装置，用于降低通过化学气相沉积（CVD）形成的半导体氧化物组合物中的氯和/或其它结合的污染物的浓度，所述半导体氧化物组合物使用提供半导体元素的反应物如二氯硅烷（DCS）和氧提供反应物如N 2 O。在一个实施方案中，通过将N 2 O 2气体加热至约825℃至约950℃的温度来退火DCS-HTO膜，以引发放热分解 N 2 O气体并使加热的气体流过DCS-HTO膜，使得加热的N 2 O气体内的解离的原子氧自由基能够将分解能量转移到结合的氯原子上在DCS-HTO膜内，使得原子氧自由基可以填充DCS-HTO膜的半导体氧化物基质内的氧空位。可以用退火的DCS-HTO膜形成改进的ONO结构，用于浮动栅极或其他存储器应用中。

6. 发明授权

US06849897B2 Transistor including SiON buffer layer 有权
标题翻译：晶体管包括SiON缓冲层
公开(公告)号：US06849897B2
公开(公告)日：2005-02-01
申请号：US10423162
申请日：2003-04-24
申请人： Zhong Dong , Chuck Jang
发明人： Zhong Dong , Chuck Jang
IPC分类号： H01L21/28 , H01L21/314 , H01L21/336 , H01L29/51 , H01L29/78
CPC分类号： H01L29/788 , H01L21/28273 , H01L21/3144 , H01L21/3145 , H01L29/511 , H01L29/66825
摘要： A thin buffer layer of SiON is formed on the top surface of the floating gate, in order to protect the polysilicon surface from attack by atomic chlorine produced during the formation of the high temperature oxide of the ONO stack. The buffer layer can also be formed on other dielectric surfaces which are otherwise subject to adverse conditions in subsequent processing, such as the nitride layer in the ONO dielectric stack.
摘要翻译：在浮栅的顶表面上形成有薄的缓冲层SiON，以便保护多晶硅表面免受在ONO堆叠的高温氧化物形成过程中产生的原子氯的侵蚀。缓冲层也可以形成在其它电介质表面上，否则在后续处理中会受到不利条件的影响，例如ONO电介质叠层中的氮化物层。

7. 发明授权

US07297597B2 Method for simultaneously fabricating ONO-type memory cell, and gate dielectrics for associated high voltage write transistors and gate dielectrics for low voltage logic transistors by using ISSG 有权
标题翻译：用于同时制造ONO型存储单元的方法以及用于低压逻辑晶体管的相关高电压写入晶体管和栅极电介质的栅极电介质通过使用ISSG
公开(公告)号：US07297597B2
公开(公告)日：2007-11-20
申请号：US10898273
申请日：2004-07-23
申请人： Zhong Dong , Chuck Jang , Ching-Hwa Chen , Chia-Shun Hsiao
发明人： Zhong Dong , Chuck Jang , Ching-Hwa Chen , Chia-Shun Hsiao
IPC分类号： H01L21/336
CPC分类号： H01L27/11526 , H01L21/28273 , H01L27/105 , H01L27/11546 , H01L29/42324
摘要： Conventional fabrication of top oxide in an ONO-type memory cell stack usually produces Bird's Beak. Certain materials in the stack such as silicon nitrides are relatively difficult to oxidize. As a result oxidation does not proceed uniformly along the multi-layered height of the ONO-type stack. The present disclosure shows how radical-based fabrication of top-oxide of an ONO stack (i.e. by ISSG method) can help to reduce formation of Bird's Beak. More specifically, it is indicated that short-lived oxidizing agents (e.g., atomic oxygen) are able to better oxidize difficult to oxidize materials such as silicon nitride and the it is indicated that the short-lived oxidizing agents alternatively or additionally do not diffuse deeply through already oxidized layers of the ONO stack such as the lower silicon oxide layer. As a result, a more uniform top oxide dielectric can be fabricated with more uniform breakdown voltages along its height. Additionally, adjacent low and high voltage transistors may benefit from simultaneous formation of their gate dielectrics with use of the radical-based oxidizing method.
摘要翻译： ONO型记忆体堆叠中的顶层氧化物的常规制造通常产生Bird's Beak。叠层中的某些材料如氮化硅相对难以氧化。因此，氧化不会沿着ONO型堆叠的多层高度均匀地进行。本公开显示了如何基于根基的ONO堆叠的顶部氧化物的制造（即通过ISSG方法）可以帮助减少Bird's Beak的形成。更具体地，表明短寿命氧化剂（例如原子氧）能够更好地氧化难以氧化的材料，例如氮化硅，并且表明短寿命氧化剂交替地或另外不会扩散深通过已经氧化的ONO堆叠层，例如较低的氧化硅层。结果，可以制造更均匀的顶部氧化物电介质，沿其高度具有更均匀的击穿电压。此外，相邻的低压和高压晶体管可以受益于使用基于自由基的氧化方法同时形成其栅极电介质。

8. 发明授权

US07229880B2 Precision creation of inter-gates insulator 有权
标题翻译：精密创建栅极间绝缘体
公开(公告)号：US07229880B2
公开(公告)日：2007-06-12
申请号：US10718008
申请日：2003-11-19
申请人： Zhong Dong , Chuck Jang , Chunchieh Huang
发明人： Zhong Dong , Chuck Jang , Chunchieh Huang
IPC分类号： H01L21/336
CPC分类号： H01L29/511 , H01L21/28273
摘要： An ONO-type inter-poly insulator is formed by depositing intrinsic silicon on an oxidation stop layer. In one embodiment, the oxidation stop layer is a nitridated top surface of a lower, and conductively-doped, polysilicon layer. In one embodiment, atomic layer deposition (ALD) is used to precisely control the thickness of the deposited, intrinsic silicon. Heat and an oxidizing atmosphere are used to convert the deposited, intrinsic silicon into thermally-grown, silicon dioxide. The oxidation stop layer impedes deeper oxidation. A silicon nitride layer and an additional silicon oxide layer are further deposited to complete the ONO structure before an upper, and conductively-doped, polysilicon layer is formed. In one embodiment, the lower and upper polysilicon layers are patterned to respectively define a floating gate (FG) and a control gate (CG) of an electrically re-programmable memory cell. In an alternative embodiment, after the middle, silicon nitride of the ONO structure is defined, another layer of intrinsic silicon is deposited, by way of for example, ALD. Heat and an oxidizing atmosphere are used to convert the second deposited, intrinsic silicon into thermally-grown, silicon dioxide. An ONO structure with two thermally-grown, and spaced apart, silicon oxide layers is thereby provided.
摘要翻译：通过在氧化停止层上沉积本征硅来形成ONO型多晶硅绝缘体。在一个实施方案中，氧化停止层是较低且导电掺杂的多晶硅层的氮化顶表面。在一个实施例中，原子层沉积（ALD）用于精确控制沉积的本征硅的厚度。使用热和氧化气氛将沉积的本征硅转化成热生长的二氧化硅。氧化停止层阻碍更深的氧化。在形成上部和导电掺杂的多晶硅层之前，进一步沉积氮化硅层和另外的氧化硅层以完成ONO结构。在一个实施例中，下部和上部多晶硅层被图案化以分别限定电可重新编程的存储器单元的浮动栅极（FG）和控制栅极（CG）。在替代实施例中，在中间形成ONO结构的氮化硅之后，通过例如ALD沉积另一层本征硅。使用热和氧化气氛将第二沉积的本征硅转化成热生长的二氧化硅。由此提供具有两个热生长和间隔开的氧化硅层的ONO结构。

9. 发明申请

US20060211270A1 Methods for improving quality of high temperature oxide (HTO) formed from halogen-containing precursor and products thereof and apparatus therefor 有权
标题翻译：用于提高由含卤素前体及其产物形成的高温氧化物（HTO）的质量的方法及其设备
公开(公告)号：US20060211270A1
公开(公告)日：2006-09-21
申请号：US11431087
申请日：2006-05-04
申请人： Zhong Dong , Chuck Jang , Chia-Shun Hsiao
发明人： Zhong Dong , Chuck Jang , Chia-Shun Hsiao
IPC分类号： H01L21/31
CPC分类号： H01L21/02164 , H01L21/02211 , H01L21/02271 , H01L21/02337 , H01L21/28158 , H01L21/3105 , H01L21/31612
摘要： A method and apparatus are disclosed for reducing the concentration of chlorine and/or other bound contaminants within a semiconductor oxide composition that is formed by chemical vapor deposition (CVD) using a semiconductor-element-providing reactant such as dichlorosilane (DCS) and an oxygen-providing reactant such as N2O. In one embodiment, a DCS-HTO film is annealed by heating N2O gas to a temperature in the range of about 825° C. to about 950 ° C. so as to trigger exothermic decomposition of the N2O gas and flowing the heated gas across the DCS-HTO film so that disassociated atomic oxygen radicals within the heated N2O gas can transfer disassociating energy to chlorine atoms bound within the DCS-HTO film and so that the atomic oxygen radicals can fill oxygen vacancies within the semiconductor-oxide matrix of DCS-HTO film. An improved ONO structure may be formed with the annealed DCS-HTO film for use in floating gate or other memory applications.
摘要翻译：公开了一种方法和装置，用于降低通过化学气相沉积（CVD）形成的半导体氧化物组合物中的氯和/或其它结合的污染物的浓度，所述半导体氧化物组合物使用提供半导体元素的反应物如二氯硅烷（DCS）和氧提供反应物如N 2 O。在一个实施方案中，通过将N 2 O 2气体加热至约825℃至约950℃的温度来退火DCS-HTO膜，以引发放热分解 N 2 O气体并使加热的气体流过DCS-HTO膜，使得加热的N 2 O气体内的解离的原子氧自由基能够将分解能量转移到结合的氯原子上在DCS-HTO膜内，使得原子氧自由基可以填充DCS-HTO膜的半导体氧化物基质内的氧空位。可以用退火的DCS-HTO膜形成改进的ONO结构，用于浮动栅极或其他存储器应用中。

10. 发明申请

US20050051864A1 CONTROL OF AIR GAP POSITION IN A DIELECTRIC LAYER 有权
标题翻译：电介质层空气位置的控制
公开(公告)号：US20050051864A1
公开(公告)日：2005-03-10
申请号：US10655706
申请日：2003-09-05
申请人： Tai-Peng Lee , Ching-Yueh Hu , Chuck Jang
发明人： Tai-Peng Lee , Ching-Yueh Hu , Chuck Jang
IPC分类号： H01L21/768 , H01L23/522 , H01L29/00
CPC分类号： H01L23/5222 , H01L21/7682 , H01L2924/0002 , Y10T428/3154 , H01L2924/00
摘要： A method for controlling the position of air gaps in intermetal dielectric layers between conductive lines and a structure formed using such a method. A first dielectric layer is deposited over at least two features and a substrate and an air gap is formed between the at least two features and above the feature height. The first dielectric layer is etched between the at least two features to open the air gap. Then a second dielectric layer is deposited over the etched first dielectric layer to form an air gap between the at least two features and completely below the feature height.
摘要翻译：一种用于控制导电线之间的金属间电介质层中的气隙的位置和使用这种方法形成的结构的方法。在至少两个特征和基底上沉积第一介电层，并且在所述至少两个特征之间并且高于特征高度形成气隙。第一介电层在至少两个特征之间被蚀刻以打开气隙。然后，在蚀刻的第一介电层上沉积第二电介质层，以在至少两个特征之间形成气隙并完全低于特征高度。

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