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    • 1. 发明授权
    • Fail-over storage system
    • 故障转移存储系统
    • US07447933B2
    • 2008-11-04
    • US11316463
    • 2005-12-21
    • Naoto MatsunamiKouji SonodaManabu KitamuraTakashi OedaYutaka Takata
    • Naoto MatsunamiKouji SonodaManabu KitamuraTakashi OedaYutaka Takata
    • G06F11/00
    • G06F11/2092G06F11/0727G06F11/0766G06F11/2025G06F11/2033G06F11/2043G06F11/2069
    • A storage system 1 including multiple slots for loading a block I/O interface controller, a file I/O interface controller, and any other kinds of interface controllers that are combined freely. The storage system 1 includes a management table that manages fail-over-enabled devices by grouping those devices in accordance with the interface type and the domain to which each device belongs; an information table that directs a fail-over procedure; and fail-over controlling means that takes over the processing of a failed interface controller belonging to a fail-over-enabled group. The fail-over system offers several modalities for monitoring failures, selecting takeover controllers and restoring functionality. Storage system 1 solves conventional problems by providing a system that can mount a plurality of file systems, and that resists multiple failures detected in a fail-over server.
    • 包括用于加载块I / O接口控制器的多个槽的存储系统1,文件I / O接口控制器和可以自由组合的任何其他类型的接口控制器。 存储系统1包括管理表,其通过根据每个设备所属的接口类型和域对这些设备进行分组来管理故障转移使能设备; 指导故障切换过程的信息表; 故障切换控制手段接管属于故障转移组的故障接口控制器的处理。 故障转移系统提供了几种监控故障模式,选择接管控制器和恢复功能。 存储系统1通过提供可以安装多个文件系统并且抵御在故障切换服务器中检测到的多个故障的系统来解决常规问题。
    • 4. 发明授权
    • Method for intraprocessor communication
    • 处理器间通信方法
    • US5659777A
    • 1997-08-19
    • US126088
    • 1993-09-23
    • Masaaki IwasakiHiroyuki ChibaNaoki UtsunomiyaKouji SonodaSatoshi YoshizawaMasahiko Yamauchi
    • Masaaki IwasakiHiroyuki ChibaNaoki UtsunomiyaKouji SonodaSatoshi YoshizawaMasahiko Yamauchi
    • G06F13/00G06F9/46G06F13/38G06F15/17
    • G06F9/544G06F15/17
    • In a computer system in which nodes are connected to each other via a network, transmission and reception buffers of sender and receiver processes are prepared as resident areas in a main storage. A node of a receiver side notifies, prior to initiation of a communication, a physical address of a data reception area of the node to a node on a sender side. In the node on the sender side, the reported physical address is added to transmission data to transfer a resultant item. On the receiver side, reception data is written in a location of the main storage at the physical address. In the receiver node, the double buffering is employed to prevent an overwriting operation of another node onto the data reception area. The respective nodes achieve partial synchronization with adjacent nodes in chain, thereby automatically establishing synchronization between all nodes. A node on a receiver side notifies prior to initiation of a communication an identifier of a data reception area to a node on a sender side such that the sender node transmits data with the identifier added thereto. In the receiver node, the identifier added to the received data is compared with an identifier added to a data reception area thereof. If mismatching results, interruption is caused in a processor of the receiver node.
    • 在通过网络将节点彼此连接的计算机系统中,将发送者和接收者进程的发送和接收缓冲区准备为主存储器中的驻留区域。 接收方的节点在发起通信之前将节点的数据接收区域的物理地址通知给发送方侧的节点。 在发送方的节点中,报告的物理地址被添加到传输数据中以传送结果。 在接收机侧,接收数据被写入主存储器的物理地址的位置。 在接收机节点中,采用双缓冲来防止另一个节点在数据接收区域上的重写操作。 相应的节点实现与链中相邻节点的部分同步,从而自动建立所有节点之间的同步。 接收机侧的节点在发起通信之前将数据接收区域的标识符通知发送方侧的节点,使得发送方节点发送附加了标识符的数据。 在接收机节点中,将添加到接收数据的标识符与添加到其数据接收区域的标识符进行比较。 如果不匹配结果,则在接收器节点的处理器中引起中断。
    • 5. 发明授权
    • Method for interprocessor communication
    • 处理器间通信方法
    • US5867656A
    • 1999-02-02
    • US759890
    • 1996-12-03
    • Masaaki IwasakiHiroyuki ChibaNaoki UtsunomiyaKouji SonodaSatoshi YoshizawaMasahiko Yamauchi
    • Masaaki IwasakiHiroyuki ChibaNaoki UtsunomiyaKouji SonodaSatoshi YoshizawaMasahiko Yamauchi
    • G06F13/00G06F9/46G06F13/38G06F15/17
    • G06F9/544G06F15/17
    • In a computer system in which nodes are connected to each other via a network, transmission and reception buffers of sender and receiver processes are prepared as resident areas in a main storage. A node of a receiver side notifies, prior to initiation of a communication, a physical address of a data reception area of the node to a node on a sender side. In the node on the sender side, the reported physical address is added to transmission data to transfer a resultant item. On the receiver side, reception data is written in a location of the main storage at the physical address. In the receiver node, the double buffering is employed to prevent an overwriting operation of another node onto the data reception area. The respective nodes achieve partial synchronization with adjacent nodes in chain, thereby automatically establishing synchronization between all nodes. A node on a receiver side notifies prior to initiation of a communication an identifier of a data reception area to a node on a sender side such that the sender node transmits data with the identifier added thereto. In the receiver node, the identifier added to the received data is compared with an identifier added to a data reception area thereof. If mismatching results, interruption is caused in a processor of the receiver node.
    • 在通过网络将节点彼此连接的计算机系统中,将发送者和接收者进程的发送和接收缓冲区准备为主存储器中的驻留区域。 接收方的节点在发起通信之前将节点的数据接收区域的物理地址通知给发送方侧的节点。 在发送方的节点中,报告的物理地址被添加到传输数据中以传送结果。 在接收机侧,接收数据被写入主存储器的物理地址的位置。 在接收机节点中,采用双缓冲来防止另一个节点在数据接收区域上的重写操作。 相应的节点实现与链中相邻节点的部分同步,从而自动建立所有节点之间的同步。 接收机侧的节点在发起通信之前将数据接收区域的标识符通知发送方侧的节点,使得发送方节点发送附加了标识符的数据。 在接收机节点中,将添加到接收数据的标识符与添加到其数据接收区域的标识符进行比较。 如果不匹配结果,则在接收器节点的处理器中引起中断。