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1. 发明授权

US06746897B2 Fabrication process of semiconductor package and semiconductor package 失效
公开(公告)号：US06746897B2
公开(公告)日：2004-06-08
申请号：US10008616
申请日：2001-10-23
申请人： Naoki Fukutomi , Yoshiaki Tsubomatsu , Fumio Inoue , Toshio Yamazaki , Hirohito Ohhata , Shinsuke Hagiwara , Noriyuki Taguchi , Hiroshi Nomura
发明人： Naoki Fukutomi , Yoshiaki Tsubomatsu , Fumio Inoue , Toshio Yamazaki , Hirohito Ohhata , Shinsuke Hagiwara , Noriyuki Taguchi , Hiroshi Nomura
IPC分类号： H01L2144
CPC分类号： H01L21/568 , H01L21/4803 , H01L21/56 , H01L21/561 , H01L23/3121 , H01L23/3128 , H01L23/49811 , H01L23/49816 , H01L23/4985 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/83 , H01L24/97 , H01L2221/68377 , H01L2224/16237 , H01L2224/2919 , H01L2224/32057 , H01L2224/32225 , H01L2224/32245 , H01L2224/32503 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48228 , H01L2224/48247 , H01L2224/73204 , H01L2224/73265 , H01L2224/83001 , H01L2224/83102 , H01L2224/8319 , H01L2224/83385 , H01L2224/8381 , H01L2224/8385 , H01L2224/85001 , H01L2224/92125 , H01L2224/97 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01019 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/01327 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , H01L2924/07811 , H01L2924/12042 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H01L2924/15183 , H01L2924/15184 , H01L2924/15311 , H01L2924/181 , H01L2924/203 , H01L2924/351 , H05K3/20 , H01L2224/85 , H01L2924/00014 , H01L2224/83 , H01L2224/92247 , H01L2924/00 , H01L2924/00012 , H01L2924/00015 , H01L2924/0002
摘要： A semiconductor package substrate is provided, which can meet the move toward high integration of semiconductors. A nickel layer is plated on an electroplated copper foil to form a wiring pattern. An LSI chip is mounted on the copper foil, and terminals of the LSI chip and the wiring pattern are connected by wire bonding, followed by sealing with a semiconductor-sealing epoxy resin. Only the copper foil is dissolved away with an alkali etchant to expose nickel. With a nickel stripper having low copper-dissolving power, the nickel layer is removed to expose the wiring pattern. A solder resist is coated, and a pattern is formed in such a way that connecting terminal portions are exposed. Solder balls are placed at the exposed portions of the wiring pattern and are then fused. The wiring pattern is connected to an external printed board via the solder balls.

2. 发明授权

US06365432B1 Fabrication process of semiconductor package and semiconductor package 失效
公开(公告)号：US06365432B1
公开(公告)日：2002-04-02
申请号：US09487682
申请日：2000-01-19
申请人： Naoki Fukutomi , Yoshiaki Tsubomatsu , Fumio Inoue , Toshio Yamazaki , Hirohito Ohhata , Shinsuke Hagiwara , Noriyuki Taguchi , Hiroshi Nomura
发明人： Naoki Fukutomi , Yoshiaki Tsubomatsu , Fumio Inoue , Toshio Yamazaki , Hirohito Ohhata , Shinsuke Hagiwara , Noriyuki Taguchi , Hiroshi Nomura
IPC分类号： H01L2144
CPC分类号： H01L21/568 , H01L21/4803 , H01L21/56 , H01L21/561 , H01L23/3121 , H01L23/3128 , H01L23/49811 , H01L23/49816 , H01L23/4985 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/83 , H01L24/97 , H01L2221/68377 , H01L2224/16237 , H01L2224/2919 , H01L2224/32057 , H01L2224/32225 , H01L2224/32245 , H01L2224/32503 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48228 , H01L2224/48247 , H01L2224/73204 , H01L2224/73265 , H01L2224/83001 , H01L2224/83102 , H01L2224/8319 , H01L2224/83385 , H01L2224/8381 , H01L2224/8385 , H01L2224/85001 , H01L2224/92125 , H01L2224/97 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01019 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/01327 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , H01L2924/07811 , H01L2924/12042 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H01L2924/15183 , H01L2924/15184 , H01L2924/15311 , H01L2924/181 , H01L2924/203 , H01L2924/351 , H05K3/20 , H01L2224/85 , H01L2924/00014 , H01L2224/83 , H01L2224/92247 , H01L2924/00 , H01L2924/00012 , H01L2924/00015 , H01L2924/0002
摘要： A semiconductor package substrate is provided, which can meet the move toward high integration of semiconductors. A nickel layer is plated on an electroplated copper foil to form a wiring pattern. An LSI chip is mounted on the copper foil, and terminals of the LSI chip and the wiring pattern are connected by wire bonding, followed by sealing with a semiconductor-sealing epoxy resin. Only the copper foil is dissolved away with an alkali etchant to expose nickel. With a nickel stripper having low copper-dissolving power, the nickel layer is removed to expose the wiring pattern. A solder resist is coated, and a pattern is formed in such a way that connecting terminal portions are exposed. Solder balls are placed at the exposed portions of the wiring pattern and are then fused. The wiring pattern is connected to an external printed board via the solder balls.

3. 发明授权

US5976912A Fabrication process of semiconductor package and semiconductor package 失效
标题翻译：半导体封装和半导体封装的制造工艺
公开(公告)号：US5976912A
公开(公告)日：1999-11-02
申请号：US716362
申请日：1996-09-18
申请人： Naoki Fukutomi , Yoshiaki Tsubomatsu , Fumio Inoue , Toshio Yamazaki , Hirohito Ohhata , Shinsuke Hagiwara , Noriyuki Taguchi , Hiroshi Nomura
发明人： Naoki Fukutomi , Yoshiaki Tsubomatsu , Fumio Inoue , Toshio Yamazaki , Hirohito Ohhata , Shinsuke Hagiwara , Noriyuki Taguchi , Hiroshi Nomura
IPC分类号： H01L21/48 , H01L21/56 , H01L21/58 , H01L21/68 , H01L23/31 , H01L23/498 , H05K3/20 , H01L23/28
CPC分类号： H01L21/568 , H01L21/4803 , H01L21/56 , H01L21/561 , H01L23/3121 , H01L23/3128 , H01L23/49811 , H01L23/49816 , H01L23/4985 , H01L24/32 , H01L24/83 , H01L24/97 , H01L2221/68377 , H01L2224/16237 , H01L2224/2919 , H01L2224/32057 , H01L2224/32225 , H01L2224/32245 , H01L2224/32503 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48228 , H01L2224/48247 , H01L2224/73204 , H01L2224/73265 , H01L2224/83001 , H01L2224/83102 , H01L2224/8319 , H01L2224/83385 , H01L2224/8381 , H01L2224/8385 , H01L2224/85001 , H01L2224/92125 , H01L2224/97 , H01L24/45 , H01L24/48 , H01L24/73 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01019 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/01327 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , H01L2924/07811 , H01L2924/12042 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H01L2924/15183 , H01L2924/15184 , H01L2924/15311 , H01L2924/181 , H01L2924/203 , H01L2924/351 , H05K3/20
摘要： A semiconductor package substrate is provided, which can meet the move toward high integration of semiconductors. A nickel layer is plated on an electroplated copper foil to form a wiring pattern. An LSI chip is mounted on the copper foil, and terminals of the LSI chip and the wiring pattern are connected by wire bonding, followed by sealing with a semiconductor-sealing epoxy resin. Only the copper foil is dissolved away with an alkali etchant to expose nickel. With a nickel stripper having low copper-dissolving power, the nickel layer is removed to expose the wiring pattern. A solder resist is coated, and a pattern is formed in such a way that connecting terminal portions are exposed. Solder balls are placed at the exposed portions of the wiring pattern and are then fused. The wiring pattern is connected to an external printed board via the solder balls.
摘要翻译： PCT No.PCT / JP95 / 00492 Sec。 371日期1996年9月18日 102（e）1996年9月18日PCT PCT 1995年3月17日PCT公布。公开号WO95 / 26047 日期1995年9月28日提供了半导体封装基板，可以满足半导体高集成化的趋势。将镍层电镀在电镀铜箔上以形成布线图案。将LSI芯片安装在铜箔上，通过引线接合连接LSI芯片和布线图案的端子，然后用半导体密封环氧树脂密封。只有铜箔用碱蚀刻剂溶解掉才能暴露镍。对于具有低铜溶力的镍剥离器，去除镍层以露出布线图案。涂覆阻焊剂，并且以使连接端子部分露出的方式形成图案。将焊球放置在布线图案的露出部分，然后熔合。布线图案通过焊球与外部印刷电路板连接。

4. 发明授权

US07187072B2 Fabrication process of semiconductor package and semiconductor package 失效
标题翻译：半导体封装和半导体封装的制造工艺
公开(公告)号：US07187072B2
公开(公告)日：2007-03-06
申请号：US10705706
申请日：2003-11-10
申请人： Naoki Fukutomi , Yoshiaki Tsubomatsu , Fumio Inoue , Toshio Yamazaki , Hirohito Ohhata , Shinsuke Hagiwara , Noriyuki Taguchi , Hiroshi Nomura
发明人： Naoki Fukutomi , Yoshiaki Tsubomatsu , Fumio Inoue , Toshio Yamazaki , Hirohito Ohhata , Shinsuke Hagiwara , Noriyuki Taguchi , Hiroshi Nomura
IPC分类号： H01L21/00
CPC分类号： H01L21/568 , H01L21/4803 , H01L21/56 , H01L21/561 , H01L23/3121 , H01L23/3128 , H01L23/49811 , H01L23/49816 , H01L23/4985 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/83 , H01L24/97 , H01L2221/68377 , H01L2224/16237 , H01L2224/2919 , H01L2224/32057 , H01L2224/32225 , H01L2224/32245 , H01L2224/32503 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48228 , H01L2224/48247 , H01L2224/73204 , H01L2224/73265 , H01L2224/83001 , H01L2224/83102 , H01L2224/8319 , H01L2224/83385 , H01L2224/8381 , H01L2224/8385 , H01L2224/85001 , H01L2224/92125 , H01L2224/97 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01019 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/01327 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , H01L2924/07811 , H01L2924/12042 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H01L2924/15183 , H01L2924/15184 , H01L2924/15311 , H01L2924/181 , H01L2924/203 , H01L2924/351 , H05K3/20 , H01L2224/85 , H01L2924/00014 , H01L2224/83 , H01L2224/92247 , H01L2924/00 , H01L2924/00012 , H01L2924/00015 , H01L2924/0002
摘要： A semiconductor package substrate is provided, which can meet the move toward high integration of semiconductors. A nickel layer is plated on an electroplated copper foil to form a wiring pattern. An LSI chip is mounted on the copper foil, and terminals of the LSI chip and the wiring pattern are connected by wire bonding, followed by sealing with a semiconductor-sealing epoxy resin. Only the copper foil is dissolved away with an alkali etchant to expose nickel. With a nickel stripper having low copper-dissolving power, the nickel layer is removed to expose the wiring pattern. A solder resist is coated, and a pattern is formed in such a way that connecting terminal portions are exposed. Solder balls are placed at the exposed portions of the wiring pattern and are then fused. The wiring pattern is connected to an external printed board via the solder balls.
摘要翻译：提供了半导体封装基板，可以满足向半导体集成度高的趋势。将镍层电镀在电镀铜箔上以形成布线图案。将LSI芯片安装在铜箔上，通过引线接合连接LSI芯片和布线图案的端子，然后用半导体密封环氧树脂密封。只有铜箔用碱蚀刻剂溶解掉才能暴露镍。对于具有低铜溶力的镍剥离器，去除镍层以露出布线图案。涂覆阻焊剂，并且以使连接端子部分露出的方式形成图案。将焊球放置在布线图案的露出部分，然后熔合。布线图案通过焊球与外部印刷电路板连接。

5. 发明授权

US06236108B1 Substrate for holding a chip of semi-conductor package, semi-conductor package, and fabrication process of semi-conductor package 失效
标题翻译：用于保持半导体封装芯片，半导体封装和半导体封装的制造工艺的衬底
公开(公告)号：US06236108B1
公开(公告)日：2001-05-22
申请号：US09541041
申请日：2000-03-31
申请人： Yoshiki Sota , Koji Miyata , Toshio Yamazaki , Fumio Inoue , Hidehiro Nakamura , Yoshiaki Tsubomatsu , Yasuhiko Awano , Shigeki Ichimura , Masami Yusa , Yorio Iwasaki
发明人： Yoshiki Sota , Koji Miyata , Toshio Yamazaki , Fumio Inoue , Hidehiro Nakamura , Yoshiaki Tsubomatsu , Yasuhiko Awano , Shigeki Ichimura , Masami Yusa , Yorio Iwasaki
IPC分类号： H01L23495
CPC分类号： H01L23/4985 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/97 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/73265 , H01L2224/83192 , H01L2224/97 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/07802 , H01L2924/12042 , H01L2924/15183 , H01L2924/15311 , H01L2924/181 , H01L2224/83 , H01L2224/85 , H01L2224/92247 , H01L2924/00 , H01L2924/00012 , H01L2924/00015 , H01L2224/05599
摘要： A semiconductor packaging chip-supporting substrate of the present invention comprises an insulating supporting substrate, wiring provided on the substrate, and an insulating film provided on the wiring. The wiring each have i) an inner connection that connects to a semiconductor chip electrode and ii) a semiconductor chip-mounting region. An opening is also provided in the insulating supporting substrate at its part where each of the wiring is formed on the insulating supporting substrate, which is the part where an outer connection conducting to the inner connection is provided. The insulating film is formed at the part on which the semiconductor chip is mounted, covering the semiconductor chip-mounting region of the wiring.
摘要翻译：本发明的半导体封装芯片支撑基板包括绝缘支撑基板，设置在基板上的布线和设置在布线上的绝缘膜。布线各自具有i）连接到半导体芯片电极的内部连接，以及ii）半导体芯片安装区域。在绝缘支撑基板的一部分上还设置有开口，其中每个布线形成在绝缘支撑基板上，绝缘支撑基板是设置有内部连接的外部连接的部分。绝缘膜形成在安装有半导体芯片的部分，覆盖布线的半导体芯片安装区域。

6. 发明授权

US6064111A Substrate for holding a chip of semi-conductor package, semi-conductor package, and fabrication process of semi-conductor package 失效
标题翻译：用于保持半导体封装芯片，半导体封装和半导体封装的制造工艺的衬底
公开(公告)号：US6064111A
公开(公告)日：2000-05-16
申请号：US903996
申请日：1997-07-31
申请人： Yoshiki Sota , Koji Miyata , Toshio Yamazaki , Fumio Inoue , Hidehiro Nakamura , Yoshiaki Tsubomatsu , Yasuhiko Awano , Shigeki Ichimura , Masami Yusa , Yorio Iwasaki
发明人： Yoshiki Sota , Koji Miyata , Toshio Yamazaki , Fumio Inoue , Hidehiro Nakamura , Yoshiaki Tsubomatsu , Yasuhiko Awano , Shigeki Ichimura , Masami Yusa , Yorio Iwasaki
IPC分类号： H01L23/02 , H01L23/498 , H01L23/495 , H01L21/44
CPC分类号： H01L23/4985 , H01L24/97 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/73265 , H01L2224/83192 , H01L2224/97 , H01L24/45 , H01L24/48 , H01L24/73 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/07802 , H01L2924/12042 , H01L2924/15183 , H01L2924/15311 , H01L2924/181
摘要： A semiconductor packaging chip-supporting substrate of the present invention comprises an insulating supporting substrate, wiring provided on the substrate, and an insulating film provided on the wiring. The wiring each have i) an inner connection that connects to a semiconductor chip electrode and ii) a semiconductor chip-mounting region. An opening is also provided in the insulating supporting a substrate at its part where each of the wiring is formed on the insulating supporting substrate, which is the part where an outer connection conducting to the inner connection is provided. The insulating film is formed at the part on which the semiconductor chip is mounted, covering the semiconductor chip-mounting region of the wiring.
摘要翻译：本发明的半导体封装芯片支撑基板包括绝缘支撑基板，设置在基板上的布线和设置在布线上的绝缘膜。布线各自具有i）连接到半导体芯片电极的内部连接，以及ii）半导体芯片安装区域。在绝缘支撑基板上的绝缘性支撑基板上形成有各自的配线的绝缘物的绝缘体上设置开口部，绝缘性支撑基板是设置有内部连接部的外部连接部的部分。绝缘膜形成在安装有半导体芯片的部分，覆盖布线的半导体芯片安装区域。

7. 发明授权

US06223429B1 Method of production of semiconductor device 失效
标题翻译：半导体器件的生产方法
公开(公告)号：US06223429B1
公开(公告)日：2001-05-01
申请号：US08981509
申请日：1998-07-30
申请人： Aizou Kaneda , Masaaki Yasuda , Itsuo Watanabe , Tomohisa Ohta , Fumio Inoue , Yoshiaki Tsubomatsu , Toshio Yamazaki , Hiroto Ohata , Kenzo Takemura , Akira Nagai , Osamu Watanabe , Naoyuki Shiozawa , Kazuyoshi Kojima , Toshiaki Tanaka , Kazunori Yamamoto
发明人： Aizou Kaneda , Masaaki Yasuda , Itsuo Watanabe , Tomohisa Ohta , Fumio Inoue , Yoshiaki Tsubomatsu , Toshio Yamazaki , Hiroto Ohata , Kenzo Takemura , Akira Nagai , Osamu Watanabe , Naoyuki Shiozawa , Kazuyoshi Kojima , Toshiaki Tanaka , Kazunori Yamamoto
IPC分类号： H05K330
CPC分类号： H01L24/83 , H01L23/3121 , H01L23/49816 , H01L23/49883 , H01L24/29 , H01L24/32 , H01L24/97 , H01L25/18 , H01L2224/16225 , H01L2224/29111 , H01L2224/2919 , H01L2224/2929 , H01L2224/29299 , H01L2224/29339 , H01L2224/29344 , H01L2224/29347 , H01L2224/29355 , H01L2224/29384 , H01L2224/29444 , H01L2224/29469 , H01L2224/32225 , H01L2224/45144 , H01L2224/73204 , H01L2224/73253 , H01L2224/81192 , H01L2224/8319 , H01L2224/838 , H01L2224/83951 , H01L2224/97 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01018 , H01L2924/01019 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01058 , H01L2924/01074 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/0132 , H01L2924/01322 , H01L2924/014 , H01L2924/0665 , H01L2924/0781 , H01L2924/07811 , H01L2924/14 , H01L2924/15311 , H01L2924/1579 , H01L2924/181 , H01L2924/19041 , Y10T29/4913 , Y10T29/49144 , Y10T29/49155 , H01L2924/00 , H01L2224/13111 , H01L2924/00014
摘要： To provide a highly reliable semiconductor device structure that enables cost reduction in the production of packages, inclusive of the cost for chips, and may cause less changes in connection resistance even under conditions of a long-term environmental resistance test. In a semiconductor device comprising a semiconductor chip face-down bonded to a wiring board, it has a structure wherein projecting metal portions are provided at the opposing wiring board terminals without forming bumps on bonding pads of the chip, the whole chip surface is bonded with an organic, anisotropic conductive adhesive material, and the whole or at least an edge of the back of the chip is covered with a sealing material.
摘要翻译：为了提供高可靠性的半导体器件结构，其能够降低封装的生产成本，包括芯片的成本，并且即使在长期耐环境测试的条件下也可能导致连接电阻的变化较小。在包括面向下接合到布线板的半导体芯片，其结构是在相对的布线板端子处设置突出的金属部分，而不在芯片的焊盘上形成凸块，整个芯片表面用有机的各向异性导电粘合剂材料，并且芯片的背面的整个或至少一个边缘被密封材料覆盖。

8. 发明授权

US09075043B2 Sample analyzer, sample information processing apparatus, and sample analysis method 有权
标题翻译：样品分析仪，样品信息处理设备和样品分析方法
公开(公告)号：US09075043B2
公开(公告)日：2015-07-07
申请号：US14035541
申请日：2013-09-24
申请人： Toru Mizumoto , Fumio Inoue
发明人： Toru Mizumoto , Fumio Inoue
IPC分类号： G01N33/493 , G01N35/00 , G01N33/50
CPC分类号： G01N33/50 , G01N33/493 , G01N35/00603 , G01N35/00613 , G06F19/00 , G16H10/40
摘要： A sample analyzer includes: a first measurement part which performs measurement on a sample for a first measurement item; a second measurement part which performs a measurement on the sample for a second measurement item; an output section; and a controller configured to control the output section to output, when a time difference between a measurement on a sample performed by the first measurement part and a measurement on the sample performed by the second measurement part exceeds a predetermined time period, information based on an excess of the time difference.
摘要翻译：样品分析器包括：对第一测量项目的样品进行测量的第一测量部件; 对第二测量项目的样本进行测量的第二测量部件; 输出部分; 以及控制器，其被配置为当所述第一测量部件执行的样本的测量与由所述第二测量部件执行的样本的测量之间的时间差超过预定时间段时，控制所述输出部分输出信息，所述信息基于超时的时差。

9. 发明申请

US20080010819A1 CONNECTION BOARD, AND MULTI-LAYER WIRING BOARD, SUBSTRATE FOR SEMICONDUCTOR PACKAGE AND SEMICONDUCTOR PACKAGE USING CONNECTION BOARD, AND MANUFACTURING METHOD THEREOF 有权
标题翻译：连接板和多层接线板，用于半导体封装的基板和使用连接板的半导体封装及其制造方法
公开(公告)号：US20080010819A1
公开(公告)日：2008-01-17
申请号：US11775294
申请日：2007-07-10
申请人： Hidehiro NAKAMURA , Akishi Nakaso , Shigeharu Arike , Fumio Inoue , Tetsuya Enomoto , Norio Moriike , Kousuke Hiroki
发明人： Hidehiro NAKAMURA , Akishi Nakaso , Shigeharu Arike , Fumio Inoue , Tetsuya Enomoto , Norio Moriike , Kousuke Hiroki
IPC分类号： H05K3/30
CPC分类号： H05K3/4617 , H01L21/4857 , H01L21/486 , H01L23/3128 , H01L23/49822 , H01L23/49827 , H01L24/45 , H01L24/48 , H01L24/73 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/92247 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/01327 , H01L2924/15183 , H01L2924/15311 , H01L2924/181 , H05K3/0097 , H05K3/06 , H05K3/244 , H05K3/4038 , H05K3/4623 , H05K3/4632 , H05K3/4647 , H05K2201/0141 , H05K2201/0195 , H05K2201/0355 , H05K2201/0361 , H05K2201/096 , H05K2201/10378 , H05K2203/0152 , H05K2203/0156 , H05K2203/0384 , H05K2203/0733 , H05K2203/1536 , Y10T29/49126 , Y10T29/4913 , Y10T29/49147 , Y10T29/49165 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： The present invention provides a connection board that is formed by an insulating resin composition layer made of one layer or two or more layers and a connection conductor that is formed so as to pass through the insulating resin composition layer in its thickness direction at a position where a conductor circuit is connected, and a multi-layer wiring board, a substrate for semiconductor package and a semiconductor package using the connection board, and methods for manufacturing them.
摘要翻译：本发明提供一种由一层或两层以上的绝缘树脂组合物层形成的连接板，以及形成为在其绝缘树脂组合物层的厚度方向上形成的连接导体，连接导体电路，并且使用多层布线板，半导体封装用基板和使用该连接基板的半导体封装，以及其制造方法。

10. 发明授权

US07043860B2 Symbol illuminator of game machine 失效
标题翻译：游戏机的符号照明器
公开(公告)号：US07043860B2
公开(公告)日：2006-05-16
申请号：US10436106
申请日：2003-05-13
申请人： Fumio Inoue
发明人： Fumio Inoue
IPC分类号： A63F5/04
CPC分类号： G09F13/16
摘要： A symbol illuminator of game machines includes a wheel member having symbols at an outer circumferential surface thereof; a casing for the wheel member attached a printed circuit board having a plurality of illuminants; and a reflective frame member having enclosure walls expanding outwardly to a forward direction from a central part thereof, having a plurality of windows into which the illuminants are set, the illuminants being arranged so as to project inside a center part of the reflective frame member; and a projection part, having a reflective face, reflecting the light emitted by the illuminants toward at least the symbol from the inner side of the wheel member so that it can irradiate a reflex of a reflective frame member equally without spots to the symbol of wheel member and can reduce the number of the parts.
摘要翻译：游戏机的符号照明器包括在其外周面具有符号的车轮构件; 用于车轮构件的壳体，其附接有具有多个发光体的印刷电路板; 以及反射框架构件，其具有从其中心部朝向前方向向外扩展的外壳壁，具有设置有所述发光体的多个窗口，所述发光体被布置成在所述反射框架构件的中心部分内突出; 以及具有反射面的突出部，其将由所述发光体发射的光朝向所述轮构件的内侧的至少符号反射，使得其可以将反射框架构件的反射相等地照射到轮的符号上会员可以减少零件数量。

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