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1. 发明申请

US20090314537A1 CONDUCTIVE CONNECTING PIN AND PACKAGE SUBSTRATE 有权
标题翻译：导电连接引脚和封装基板
公开(公告)号：US20090314537A1
公开(公告)日：2009-12-24
申请号：US12546950
申请日：2009-08-25
申请人： Naohiro HIROSE , Hitoshi ITO , Yoshiyuki IWATA , Masanori KAWADE , Hajime YAZU
发明人： Naohiro HIROSE , Hitoshi ITO , Yoshiyuki IWATA , Masanori KAWADE , Hajime YAZU
IPC分类号： H05K1/11
CPC分类号： H01L23/49811 , H01L2224/05001 , H01L2224/05572 , H01L2224/1134 , H01L2224/13099 , H01L2924/00013 , H01L2924/01019 , H01L2924/01322 , H01L2924/15312 , H05K1/111 , H05K1/112 , H05K3/28 , H05K3/321 , H05K3/3421 , H05K3/384 , H05K3/4602 , H05K2201/09381 , H05K2201/09472 , H05K2201/09509 , H05K2201/096 , H05K2201/0979 , H05K2201/10318 , Y10T428/239
摘要： A package substrate including an outermost interlayer resin insulating layer, a pad structure formed on the outermost interlayer resin insulating layer, a conductive connecting pin for establishing an electrical connection with another substrate, the conductive connecting pin being secured to the pad structure via a solder, and via holes formed through the outermost interlayer resin insulating layer and for electrically connecting the pad structure to one or more conductive circuits formed below the outermost interlayer resin insulating layer, the via holes being positioned directly below the pad structure.
摘要翻译：包括最外层间树脂绝缘层，形成在最外层间树脂绝缘层上的焊盘结构的封装基板，用于与另一基板建立电连接的导电连接引脚，所述导电连接引脚通过焊料固定在焊盘结构上，以及通过最外层间树脂绝缘层形成的通孔，并且将焊盘结构电连接到在最外层间树脂绝缘层下形成的一个或多个导电电路，通孔位于焊盘结构的正下方。

2. 发明申请

US20090154131A1 CONDUCTIVE CONNECTING PIN AND PACKAGE SUBSTRATE 有权
标题翻译：导电连接引脚和封装基板
公开(公告)号：US20090154131A1
公开(公告)日：2009-06-18
申请号：US12359663
申请日：2009-01-26
申请人： Naohiro HIROSE , Hitoshi ITO , Yoshiyuki IWATA , Masanori KAWADE , Hajime YAZU
发明人： Naohiro HIROSE , Hitoshi ITO , Yoshiyuki IWATA , Masanori KAWADE , Hajime YAZU
IPC分类号： H01R12/00
CPC分类号： H01L23/49811 , H01L2224/05001 , H01L2224/05572 , H01L2224/1134 , H01L2224/13099 , H01L2924/00013 , H01L2924/01019 , H01L2924/01322 , H01L2924/15312 , H05K1/111 , H05K1/112 , H05K3/28 , H05K3/321 , H05K3/3421 , H05K3/384 , H05K3/4602 , H05K2201/09381 , H05K2201/09472 , H05K2201/09509 , H05K2201/096 , H05K2201/0979 , H05K2201/10318 , Y10T428/239
摘要： A package substrate 310 incorporating a substrate provided with a conductor layer 5, a conductive connecting pin 100 arranged to establish the electrical connection with a mother board and secured to the surface of the substrate, wherein a pad 16 for securing the conductive connecting pin is provided for the package substrate 310. The pad 16 is covered with an organic resin insulating layer 15 having an opening 18 through which the pad 16 is partially exposed to the outside. The conductive connecting pin 100 is secured to the pad exposed to the outside through the opening with a conductive adhesive agent 17 so that solution of the conductive connecting pin 100 from the substrate occurring, for example when mounting is performed is prevented.
摘要翻译：一种包含衬底的封装衬底310，该衬底设置有导体层5，导电连接销100被布置成与母板建立电连接并固定到衬底的表面，其中提供用于固定导电连接销的衬垫16 用于封装衬底310.衬垫16被具有开口18的有机树脂绝缘层15覆盖，衬垫16通过该开口部分地暴露于外部。导电连接销100通过导电粘合剂17通过开口固定到暴露于外部的焊盘，从而防止例如当执行安装时发生例如导电连接销100从基板的溶液。

3. 发明申请

US20070193679A1 Printed wiring board manufacturing method 有权
标题翻译：印刷电路板制造方法
公开(公告)号：US20070193679A1
公开(公告)日：2007-08-23
申请号：US11567344
申请日：2006-12-06
申请人： Yoshiyuki IWATA
发明人： Yoshiyuki IWATA
IPC分类号： B32B38/10 , B32B38/04 , B32B37/12
CPC分类号： B32B38/10 , B32B2310/0843 , B32B2457/08 , H05K1/115 , H05K3/20 , H05K3/4602 , H05K3/4682 , H05K2201/09527 , H05K2201/09563 , H05K2201/096 , H05K2203/0554 , H05K2203/1536 , Y10T29/49165 , Y10T156/1056 , Y10T156/1057
摘要： The present invention intends to provide a novel printed wiring board manufacturing method by which printed wiring boards can be manufactured with efficiency. A method of manufacturing a printed wiring board (FIG. 1B) according to the present invention includes a step for preparing two sets of copper clad laminates (FIG. 2A), a step for bonding the copper clad laminates (FIG. 2B), steps for forming lands on both surfaces of a bonded laminate (FIGS. 2C to 2E), steps for forming respective resin layers on both surfaces of the bonded laminate and forming via hole openings to form respective via holes (FIGS. 2F to 2L), a step for forming a resin layer and forming a via hole opening to form a via hole (FIG. 2M), a step for separating the bonded laminate from each other (FIG. 2N) and steps for forming via hole openings from the bonded surface of the separated laminate to form via holes (FIGS. 20 to 2T). Via holes (33-1, 33-2) formed on the resin layer and a via hole (42) formed on the laminate are opened in the opposite directions.
摘要翻译：本发明旨在提供一种能够有效地制造印刷电路板的新颖的印刷线路板制造方法。根据本发明的制造印刷电路板（图1B）的方法包括制备两组铜包覆层压板的步骤（图2A），用于粘合覆铜层压板的步骤（图2B ），用于在接合层压体的两个表面上形成焊盘的步骤（图2C-2E），在接合层叠体的两个表面上形成各个树脂层并形成通孔开口以形成相应的通孔的步骤（图2 F-2L），用于形成树脂层并形成通孔开口以形成通孔的步骤（图2M），分离粘合层压体的步骤（图2N）和步骤从分离的层压体的接合表面形成通孔开口以形成通孔（图20至图2T）。形成在树脂层上的通孔（33-1,33-2）和形成在层叠体上的通孔（42）沿相反方向打开。

4. 发明申请

US20130177714A1 METHOD FOR MANUFACTURING PRINTED WIRING BOARD 有权
标题翻译：制造印刷电路板的方法
公开(公告)号：US20130177714A1
公开(公告)日：2013-07-11
申请号：US13536056
申请日：2012-06-28
申请人： Yoshiyuki IWATA , Masaru HORI , Hajime SAKAMOTO
发明人： Yoshiyuki IWATA , Masaru HORI , Hajime SAKAMOTO
IPC分类号： H05K3/02
CPC分类号： H05K3/027 , H05K3/0035 , H05K3/0055 , H05K3/421 , H05K2203/095
摘要： A method for manufacturing a printed wiring board includes forming an interlayer insulation layer on a conductive circuit, applying laser to a portion of the interlayer insulation layer such that an opening reaching to the conductive circuit is formed for a via conductor, subjecting the opening to a plasma treatment using a processing gas which includes a reactive gas including a fluorovinyl ether gas having a double bond of two carbon atoms and a fluoroalkyl ether group, forming an upper conductive circuit on the interlayer insulation layer, and forming a via conductor in the opening such that the via conductor connects the conductive circuit and the upper conductive circuit.
摘要翻译：一种制造印刷电路板的方法，包括在导电电路上形成层间绝缘层，向层间绝缘层的一部分施加激光，使通孔导体形成达到导电电路的开口，使开口处于使用包括包含具有两个碳原子的双键的氟乙烯基醚气体和氟烷基醚基团的反应性气体的处理气体进行等离子体处理，在层间绝缘层上形成上导电电路，以及在开口中形成通孔导体通孔导体连接导电电路和上导电电路。

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