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1. 发明申请

US20050073893A1 Memory bit line leakage repair 有权
公开(公告)号：US20050073893A1
公开(公告)日：2005-04-07
申请号：US10403101
申请日：2003-03-28
申请人： Nan Chen , Cheng Zhong , Mehdi Sani
发明人： Nan Chen , Cheng Zhong , Mehdi Sani
IPC分类号： G11C7/00 , G11C29/00 , G11C29/50
CPC分类号： G11C29/50 , G11C11/41 , G11C29/83 , G11C29/832 , G11C2029/5006
摘要： Techniques for replacing and eliminating paths causing channel leakage current. In one embodiment, one or more precharge enable transistors and a precharge enable signal are added to a circuit configuration. The precharge enable transistors are designed to remain on and simply pass a signal in a properly functioning path. When a leakage path is identified, such as during IDDQ testing, the precharge enable signal is set to turn off the precharge enable transistors. When the precharge enable transistors are off, the leakage path is disrupted, and the leakage current stopped. The path may be replaced with a redundant path.

2. 发明申请

US20100226191A1 Leakage Reduction in Memory Devices 有权
标题翻译：内存设备中的泄漏减少
公开(公告)号：US20100226191A1
公开(公告)日：2010-09-09
申请号：US12397142
申请日：2009-03-03
申请人： Changho Jung , Nan Chen , Cheng Zhong , Zhiqin Chen
发明人： Changho Jung , Nan Chen , Cheng Zhong , Zhiqin Chen
IPC分类号： G11C7/00 , G11C5/14
CPC分类号： G11C7/00 , G11C7/22 , G11C8/08 , G11C11/4094 , G11C11/413 , G11C2207/2227 , H03K19/0016
摘要： A memory device includes a core array that includes memory cells. The memory device also includes a headswitch coupled to the core array and a positive supply voltage. The headswitch reduces leakage current from the core array by disconnecting the core array from the positive supply voltage. Additionally, head switches are added for pre-charge devices to further reduce leakage current.
摘要翻译：存储器件包括包括存储器单元的核心阵列。存储器件还包括耦合到芯阵列的头灯和正电源电压。磁头开关通过将磁芯阵列与正电源电压断开来减少来自磁芯阵列的漏电流。另外，增加头开关用于预充电器件，以进一步减少泄漏电流。

3. 发明申请

US20100046276A1 Systems and Methods for Handling Negative Bias Temperature Instability Stress in Memory Bitcells 审中-公开
标题翻译：处理负偏压的系统和方法存储器位单元中的温度不稳定性应力
公开(公告)号：US20100046276A1
公开(公告)日：2010-02-25
申请号：US12194342
申请日：2008-08-19
申请人： Nan Chen , Cheng Zhong , Ritu Chaba
发明人： Nan Chen , Cheng Zhong , Ritu Chaba
IPC分类号： G11C11/00 , G11C5/14 , G11C7/00
CPC分类号： G11C7/1006 , G11C7/04 , G11C7/20 , G11C7/22 , G11C11/413
摘要： A system and method reduce stress caused by NBTI effects by determining if a trigger event has occurred and if so inverting all input data values to the memory and all output data values from the memory during a period of time defined by the determined trigger event. In one embodiment, the trigger event is an alternate memory power-up.
摘要翻译：系统和方法通过确定触发事件是否已经发生，并且如果在所确定的触发事件所定义的时间段期间将所有输入数据值反转到存储器和所有输出数据值，从而减少由NBTI效应引起的应力。在一个实施例中，触发事件是备用存储器加电。

4. 发明授权

US08780658B2 Leakage reduction in memory devices 有权
标题翻译：内存设备中的泄漏减少
公开(公告)号：US08780658B2
公开(公告)日：2014-07-15
申请号：US12397142
申请日：2009-03-03
申请人： Chang Ho Jung , Nan Chen , Cheng Zhong , Zhiqin Chen
发明人： Chang Ho Jung , Nan Chen , Cheng Zhong , Zhiqin Chen
IPC分类号： G11C7/00 , G11C5/14 , G11C11/4094 , G11C7/22 , H03K19/00
CPC分类号： G11C7/00 , G11C7/22 , G11C8/08 , G11C11/4094 , G11C11/413 , G11C2207/2227 , H03K19/0016
摘要： A memory device includes a core array that includes memory cells. The memory device also includes a headswitch coupled to the core array and a positive supply voltage. The headswitch reduces leakage current from the core array by disconnecting the core array from the positive supply voltage. Additionally, head switches are added for pre-charge devices to further reduce leakage current.
摘要翻译：存储器件包括包括存储器单元的核心阵列。存储器件还包括耦合到芯阵列的头灯和正电源电压。磁头开关通过将磁芯阵列与正电源电压断开来减少来自磁芯阵列的漏电流。另外，增加头开关用于预充电器件，以进一步减少泄漏电流。

5. 发明授权

US07092307B2 Leakage current reduction for CMOS memory circuits 有权
标题翻译： CMOS存储器电路的泄漏电流降低
公开(公告)号：US07092307B2
公开(公告)日：2006-08-15
申请号：US10641883
申请日：2003-08-14
申请人： Nan Chen , Cheng Zhong , Mehdi Hamidi Sani
发明人： Nan Chen , Cheng Zhong , Mehdi Hamidi Sani
IPC分类号： G11C5/14
CPC分类号： G11C11/4074 , G11C11/413 , G11C2207/2227
摘要： A CMOS integrated circuit (e.g., an SRAM or a DRAM) is partitioned into a core block, a peripheral block, and a retention block. The core block includes circuits (e.g., memory cells) that are powered on at all times and is coupled directly to power supply and circuit ground. The peripheral block includes circuits that may be powered on or off and are coupled to the power supply via a head switch and/or to circuit ground via a foot switch. The switches and the core block may be implemented with high threshold voltage (high-Vt) FET devices to reduce leakage current. The peripheral block may be implemented with low-Vt FET devices for high-speed operation. The retention block includes circuits (e.g., pull-up devices) that maintain signal lines (e.g., word lines) at a predetermined level so that the internal states of the core block are retained when the peripheral block is powered off.
摘要翻译： CMOS集成电路（例如，SRAM或DRAM）被划分为核心块，外围块和保留块。核心块包括始终上电并直接耦合到电源和电路接地的电路（例如，存储器单元）。外围块包括可以通电或断开并且经由头开关耦合到电源和/或经由脚踏开关电路接地的电路。开关和核心块可以用高阈值电压（高Vt）FET器件来实现，以减少泄漏电流。外围块可以用用于高速操作的低Vt FET器件来实现。保持块包括将信号线（例如，字线）保持在预定水平的电路（例如，上拉装置），使得当外围块被断电时，芯块的内部状态被保持。

6. 发明授权

US06950359B2 Memory bit line leakage repair 有权
标题翻译：内存位线泄漏维修
公开(公告)号：US06950359B2
公开(公告)日：2005-09-27
申请号：US10403101
申请日：2003-03-28
申请人： Nan Chen , Cheng Zhong , Mehdi Hamidi Sani
发明人： Nan Chen , Cheng Zhong , Mehdi Hamidi Sani
IPC分类号： G11C7/00 , G11C29/00 , G11C29/50
CPC分类号： G11C29/50 , G11C11/41 , G11C29/83 , G11C29/832 , G11C2029/5006
摘要： Techniques for replacing and eliminating paths causing channel leakage current. In one embodiment, one or more precharge enable transistors and a precharge enable signal are added to a circuit configuration. The precharge enable transistors are designed to remain on and simply pass a signal in a properly functioning path. When a leakage path is identified, such as during IDDQ testing, the precharge enable signal is set to turn off the precharge enable transistors. When the precharge enable transistors are off, the leakage path is disrupted, and the leakage current stopped. The path may be replaced with a redundant path.
摘要翻译：用于替代和消除引起通道泄漏电流的路径的技术。在一个实施例中，将一个或多个预充电使能晶体管和预充电使能信号加到电路配置中。预充电使能晶体管被设计为保持在正常功能的路径上并简单地传递信号。当识别泄漏路径时，例如在IDDQ测试期间，预充电使能信号被设置为关闭预充电使能晶体管。当预充电使能晶体管截止时，泄漏路径被破坏，并且泄漏电流停止。可以用冗余路径替换路径。

7. 发明申请

US20220418166A1 Reverse-Return Parallel Loop Thermal Management System for an Electronic Device 有权
公开(公告)号：US20220418166A1
公开(公告)日：2022-12-29
申请号：US17360003
申请日：2021-06-28
申请人： Nan Chen , He Zhao , Yunshui Chen
发明人： Nan Chen , He Zhao , Yunshui Chen
IPC分类号： H05K7/20
摘要： A reverse-return parallel loop system is provided, including a cooling cycle comprised of a plurality of heat sinks, at least one heat exchanger, and at least one liquid pump to carry liquid coolant through the system. Each heat sink has a vapor inlet, a liquid inlet, a vapor outlet, and a liquid outlet. The liquid coolant is pumped into the heat sink through the liquid inlet where the coolant splits in to two streams, where one stream flows out of the liquid outlet towards the next heat sink downstream, and the other stream flows through the heat sink, and through the heat exchanger core to absorb heat from the heat sources and become at least partially vaporized by the heat. This stream then merges with vapor from other heat sinks upstream and flows out through the vapor outlet back towards the heat exchanger of the system.

8. 发明申请

US20220418160A1 Electronic Devices 有权
公开(公告)号：US20220418160A1
公开(公告)日：2022-12-29
申请号：US17487013
申请日：2021-09-28
申请人： Nan Chen , He Zhao , Yunshui Chen
发明人： Nan Chen , He Zhao , Yunshui Chen
IPC分类号： H05K7/20
摘要： A system having a shell with a shell interior for housing a heat exchanger that is configured to be operable for heat transfer between a first fluid and a second fluid; a refrigerant inlet, wherein the first fluid passes from the refrigerant inlet to the shell interior for heat transfer; a refrigerant inlet manifold, wherein the refrigerant inlet manifold is configured to collect the first fluid from the refrigerant inlet for the heat transfer; a refrigerant outlet, the refrigerant outlet is configured to be operable for supplying the first fluid for electronic device cooling; a coolant inlet, wherein the second fluid flows from the coolant inlet and into the shell interior for the heat transfer; and a coolant outlet for discharging the second fluid out of the shell interior.

9. 发明授权

US10197607B2 System and method for estimating component parameters 有权
公开(公告)号：US10197607B2
公开(公告)日：2019-02-05
申请号：US13532900
申请日：2012-06-26
申请人： Shu-Hung Henry Chung , Nan Chen
发明人： Shu-Hung Henry Chung , Nan Chen
IPC分类号： G01R27/02
摘要： A system and a method for estimating component parameters relating to electric components of an electric circuit comprising the steps of receiving one or more sample variables associated with the electric circuit, applying the one or more sample variables to one or more component relationships associated with an arrangement of the electric components of the electric circuit, and processing the one or more component relationships with an approximation process to determine one or more estimated component parameters.

10. 发明授权

US08575856B2 Driver circuit for powering a DC lamp in a non-DC lamp fitting 有权
标题翻译：用于为非直流灯配件中的直流灯供电的驱动电路
公开(公告)号：US08575856B2
公开(公告)日：2013-11-05
申请号：US13150435
申请日：2011-06-01
申请人： Shu Hung Henry Chung , Nan Chen
发明人： Shu Hung Henry Chung , Nan Chen
IPC分类号： H05B37/03
CPC分类号： H05B33/0818 , Y02B20/346 , Y02B20/383
摘要： A driver circuit for adapting an LED lamp or an LED lamp array to be used in a lamp fitting for a non-LED type lamp without modification of the lamp fitting. The LED lamp or LED lamp array can be inserted into the lamp fitting as a replacement for a non-LED lamp. The driver circuit has a first stage with a filter circuit and having an input connectable to any of an ac power supply, an electromagnetic ballast or an electronic ballast of the lamp fitting; a second stage with a high frequency switched network and having an input connected to an output of the first stage; and a third stage with an ac/dc converter and having an input connected to an output of the second stage and an output connectable to an LED lamp. The third stage is configured to deliver dc power to a connected LED lamp. The second stage is configured to operate in a low frequency mode and in a high frequency mode.
摘要翻译：一种驱动电路，用于适应用于非LED型灯的灯具中的LED灯或LED灯阵列，而不改变灯具。 LED灯或LED灯阵列可以插入灯具中作为非LED灯的替代品。驱动器电路具有第一级，其具有滤波电路，并且具有可连接到灯配件的交流电源，电磁镇流器或电子镇流器中的任一者的输入端; 具有高频交换网络并具有连接到第一级的输出的输入的第二级; 以及具有ac / dc转换器并且具有连接到第二级的输出的输入的第三级和可连接到LED灯的输出。第三级配置为向连接的LED灯提供直流电。第二级被配置为以低频模式和高频模式操作。

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